Patents by Inventor Jin An

Jin An has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • PACKET FORWARDING METHOD IN THE CASE OF THE HANDOVER BETWEEN BASE STATIONS
    Publication number: 20100091734
    Abstract: A method for forwarding packets in handover between base stations (eNBs) is provided. A source eNB confirming handover success sends control data indicating an EOD of a forwarding packet to a target eNB when there are no more packets to be forwarded to the target eNB, and the target eNB receiving the control data recognizes from the control data that there are no more packets to be forwarded from the source eNB, thus preventing delay in the handover between the eNBs.
    Type: Application
    Filed: July 28, 2008
    Publication date: April 15, 2010
    Applicants: Electronics and Telecommunications Research Institute, Samsung Electronics Co. Ltd
    Inventors: Ji-soo Park, Cheol-hye Cho, Yeong-jin Kim, Young-jick Bahg
  • CIRCUIT AND METHOD FOR SAMPLING VALID COMMAND USING EXTENDED VALID ADDRESS WINDOW IN DOUBLE PUMPED ADDRESS SCHEME MEMORY DEVICE
    Publication number: 20100091600
    Abstract: Provided are a circuit and method for sampling a valid command using a valid address window extended for a high-speed operation in a double pumped address scheme memory device. A method for extending the valid address window includes: inputting a valid command signal and a first address signal at the first cycle of a clock signal; inputting a second address signal at the second cycle of the clock signal; generating a decoded command signal and extended first and second internal address signals respectively in response to the command signal and the address signals; and latching and decoding the extended first and second internal address signals in response to the decoded command signal.
    Type: Application
    Filed: December 11, 2009
    Publication date: April 15, 2010
    Applicant: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Hyun-Jin Kim, Seong-Jin Jang, Jeong-Don Lim, Kwang-Il Park, Ho-Young Song, Woo-Jin Lee
  • Energy Sources for Curing in an Imprint Lithography System
    Publication number: 20100090130
    Abstract: Energy sources and methods for curing in an imprint lithography system are described. The energy sources may include one or more energy elements positioned outside of the viewing range of an imaging unit monitoring elements of the imprint lithography system. Each energy source is configured to provide energy along a path to solidify polymerizable material on a substrate.
    Type: Application
    Filed: July 29, 2009
    Publication date: April 15, 2010
    Applicant: MOLECULAR IMPRINTS, INC.
    Inventors: Mahadevan Ganapathisubramanian, Byung-Jin Choi, Liang Wang, Alex Ruiz
  • Apparatus and method for a power control in a system using an embedded CPU
    Publication number: 20100095141
    Abstract: A portable communication apparatus is configured to perform a method for a power control of a Central Processing Unit (CPU) in a portable communication apparatus. The portable communication apparatus for a power control of the CPU includes a CPU for reporting an operation status of the CPU. The CPU is configured to change a power control level according to a control of an overhead determiner by using a pin and the overhead determiner for determining an overhead of the CPU by using the pin and for controlling the power control level of the CPU according to the overhead of the CPU.
    Type: Application
    Filed: October 14, 2009
    Publication date: April 15, 2010
    Applicant: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Tae-Jin Kim, Jung-Hun Park, Hyuk-Chan Park, Ho-Seung Lee, Kang-Min Lee
  • PSK DEMODULATOR USING TIME-TO-DIGITAL CONVERTER
    Publication number: 20100090761
    Abstract: A PSK demodulator using a time-to-digital converter includes: a filter unit that performs band pass filtering on a PSK signal; an amplitude limiting unit that limits the amplitude of an output signal of the filter unit; a clock signal generating unit that generates a clock signal; and a time-to-digital converter that samples the phase of an output signal of the amplitude limiting unit according to the clock signal and outputs a digital signal having a value corresponding to the phase of the PSK signal. Power consumption can be reduced and a circuit implementation can be simplified.
    Type: Application
    Filed: July 29, 2009
    Publication date: April 15, 2010
    Applicant: Electronics and Telecommunications Research Institute
    Inventors: Sang Jin Byun, Jae Hoon Shim, Hyun Kyu Yu
  • CMOS RF IC
    Publication number: 20100090752
    Abstract: Provided is a CMOS RF IC comprises an inductor that is formed in the uppermost two or more metal layers among a plurality of metal layers; and a DC bias circuit that is formed in a metal layer provided at the bottom of the metal layers in which the inductor is formed.
    Type: Application
    Filed: November 19, 2008
    Publication date: April 15, 2010
    Applicant: SAMSUNG ELECTRO-MECHANICS CO., LTD.
    Inventors: Yu Sin KIM, Chang Seok LEE, Nam Jin OH, IIZUKA SHINICHI
  • LIQUID CRYSTAL DISPLAY
    Publication number: 20100091219
    Abstract: A liquid crystal display including a first substrate; a light-blocking member disposed on the first substrate; an emission layer disposed on the first substrate; an ultraviolet-light blocking filter disposed on the emission layer; a lower polarizer disposed on the ultraviolet-light blocking filter; a gate line and a data line disposed on the lower polarizer and substantially perpendicular to each other; a thin film transistor electrically connected to the gate line and the data line; a pixel electrode electrically connected to the thin film transistor; a second substrate disposed facing the first substrate; a common electrode disposed on the second substrate; and a liquid crystal layer interposed between the first substrate and the second substrate.
    Type: Application
    Filed: April 1, 2009
    Publication date: April 15, 2010
    Applicant: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Soon-Joon Rho, Hyeok-Jin Lee, Hee-Keun Lee, Baek-Kyun Jeon
  • BUFFER OF SEMICONDUCTOR MEMORY APPARATUS
    Publication number: 20100090721
    Abstract: A buffer of a semiconductor memory apparatus includes a buffering section configured to generate an output signal by buffering an input signal. A mismatch compensation section generates a control voltage in correspondence with sizes of a second transistor of the same type as a first transistor constituting the buffering section, wherein the buffering section controls a transition time of the output signal in response to a level of the control voltage.
    Type: Application
    Filed: June 30, 2009
    Publication date: April 15, 2010
    Applicant: Hynix Semiconductor Inc.
    Inventor: Sang Jin BYEON
  • OMNI-DIRECTIONAL PLANAR ANTENNA
    Publication number: 20100090903
    Abstract: Provided is a planar antenna having omni-directional radiation patterns. The planar antenna includes a circular patch located on one dielectric substrate of the plurality of dielectric substrates; a planar transmission line applied with signals from the exterior; a signal via for coupling the circular patch with the planar transmission line and supplying the signals incoming through the planar transmission line to the circular patch; and a metal ground plane having a slot having a certain shape through which the signal via passes, and located on the dielectric substrate.
    Type: Application
    Filed: November 29, 2007
    Publication date: April 15, 2010
    Inventors: Woo-Jin Byun, Bong-Su Kim, Kwang-Seon Kim, Myung-Sun Song
  • Nonvolatile Memory Devices Having Built-in Memory Cell Recovery During Block Erase and Methods of Operating Same
    Publication number: 20100091578
    Abstract: Nonvolatile memory devices include support memory cell recovery during operations to erase blocks of nonvolatile (e.g., flash) memory cells. A nonvolatile memory system includes a flash memory device and a memory controller electrically coupled to the flash memory device. The memory controller is configured to control memory cell recovery operations within the flash memory device by issuing a first instruction(s) to the flash memory device that causes erased memory cells in the block of memory to become at least partially programmed memory cells and then issuing a second instruction(s) to the flash memory device that causes the at least partially programmed memory cells become fully erased.
    Type: Application
    Filed: July 7, 2009
    Publication date: April 15, 2010
    Inventors: Yong-June Kim, Jae-Hong Kim, Kyoung-Lae Cho, Seung-Hwan Song, Jun-Jin Kong
  • PHASE DELAY ELEMENT FOR TRANSMISSIVE AND REFLECTIVE TYPE LIQUID CRYSTAL DISPLAY
    Publication number: 20100091216
    Abstract: A phase delay element includes a brightness enhancement layer intermediate a reflection layer and an artificial light. The brightness enhancement layer is defined by a first surface and an opposite second surface. The first surface faces the reflection layer. A first light from the artificial light is incident on the second surface. A phase of the first light is delayed by about 1/4 phase (?/4) so that a second light is emitted from the first surface toward the reflection layer. The second light is reflected from the reflection layer so that a third light is emitted from the reflection layer toward the first surface. A phase of the third light is delayed by about 1/4 phase (?/4) so that a fourth light is emitted from the second surface. Therefore, a portion of the artificial light, which is reflected from the reflection layer, is recycled to improve a luminance of an LCD apparatus.
    Type: Application
    Filed: December 1, 2009
    Publication date: April 15, 2010
    Applicant: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Akira HIRAI, Jin-Hyuk YUN, Kee-Han UH, Min-Soo PARK
  • WASHING MACHINE AND METHOD OF CONTROLLING THE SAME
    Publication number: 20100088828
    Abstract: A washing machine and a method of controlling the washing machine are provided. In the washing machine and the method of controlling the washing machine, a liquid detergent is automatically supplied into a washing tub, thereby improving user convenience. In addition, in the washing machine and the method of controlling the washing machine, a liquid detergent is supplied into the washing tub by water supplied by a water supply unit. Thus, no liquid detergent remains in a liquid detergent supply path, and the liquid detergent supply path can be prevented from being blocked due to the solidification of a liquid detergent.
    Type: Application
    Filed: March 29, 2008
    Publication date: April 15, 2010
    Applicant: LG Electronics Inc.
    Inventors: Kyeong Hwan Kim, Ii Hyeon Jo, Jin Ho Chang
  • MEMORY DEVICE HAVING LATCH FOR CHARGING OR DISCHARGING DATA INPUT/OUTPUT LINE
    Publication number: 20100091583
    Abstract: A semiconductor memory device of the claimed invention, having an active state for performing a read or write operation and an inactive state except for the active state includes a data input/output (I/O) line; a pull-up latch unit for pulling-up the data I/O line when the semiconductor memory device is in the inactive state; a pull-down latch unit for pulling-down the data I/O line when the semiconductor memory device is in the inactive state; and a selection unit for selectively driving one of the pull-up latch unit and the pull-down latch unit.
    Type: Application
    Filed: December 17, 2009
    Publication date: April 15, 2010
    Inventors: Sang-Jin BYEON, Beom-Ju Shin
  • SEMICONDUCTOR PACKAGE HAVING SOLDER BALL WHICH HAS DOUBLE CONNECTION STRUCTURE
    Publication number: 20100090324
    Abstract: A semiconductor package having a solder ball having a double connection structure which reduces a total height of a package on package (POP). The semiconductor package includes a first semiconductor package in which a semiconductor device is mounted on a lower surface of a first substrate, and a through hole is formed in a solder ball pad region of the first substrate, a second semiconductor package in which a semiconductor device is mounted on an upper surface of a second substrate, and a solder ball pad of the second substrate is formed to correspond to the through hole of the first substrate and is mounted on the first substrate, and a common solder ball that is disposed below the first substrate and is connected to the solder ball pad of the second substrate through the through hole.
    Type: Application
    Filed: May 29, 2009
    Publication date: April 15, 2010
    Applicant: Samsung Electronics Co., Ltd
    Inventor: Hye-Jin KIM
  • NANOPARTICULATE ENCAPSULATION BARRIER STACK
    Publication number: 20100089636
    Abstract: A barrier stack for encapsulating a moisture and/or oxygen sensitive electronic device is provided. The barrier stack comprises a multilayer film having at least one barrier layer having low moisture and/or oxygen permeability, and at least one sealing layer arranged to be in contact with a surface of the barrier layer, wherein the sealing material comprises reactive nanoparticles capable of interacting with moisture and/or oxygen, thereby retarding the permeation of moisture and/or oxygen through defects present in the barrier layer.
    Type: Application
    Filed: November 6, 2006
    Publication date: April 15, 2010
    Inventors: Senthil Kumar Ramadas, Soo Jin Chua
  • DOCUMENT TRANSLATION APPARATUS AND METHOD
    Publication number: 20100094615
    Abstract: A document translation apparatus includes a document processing module for analyzing associative relations between nouns or noun phrases within an input document to be translated to generate analysis information on texts; and a document translation module for selecting target words for the respective texts in reference to the text analysis information to generate morphemes corresponding to the target words, thereby producing a translated document corresponding to the input document.
    Type: Application
    Filed: June 15, 2009
    Publication date: April 15, 2010
    Applicant: ELECTRONICS AND TELECOMMUNICATIONS RESEARCH INSTITUTE
    Inventors: Yoon Hyung Roh, Sung Kwon Choi, Ki Young Lee, Oh Woog Kwon, Young Kil Kim, Cheng Hyun Kim, Younge Ae Seo, Seong Il Yang, Yun Jin, Eun Jin Park, Ying Shun Wu, Changhao Yin, Sang Kyu Park
  • APPARATUS FOR IMPLEMENTING INTERLOCK OF ELECTRIC POWER STEERING SYSTEM
    Publication number: 20100094506
    Abstract: An apparatus for implementing interlock of an electric power steering system is disclosed. The interlock apparatus can generate the output torque current value for achieving the steering system interlock with current values of two phases and the rectifying positional value for the 1-bit feedback current of one phase out of the 3-phase feedback current values and the rectifying positional value for the 3-bit 3-phase feedback current values. The disclosed interlock apparatus receives the 3-phase feedback current values from the current sensor and the rectifying positional values for the 3-bit 3-phase feedback current values from the rectifying positional sensor, and retrieves therefrom the current values of two phases and the rectifying positional value for the 1-bit feedback current of one phase for use with a substantially cost effective processor in generating the output torque current value.
    Type: Application
    Filed: August 10, 2009
    Publication date: April 15, 2010
    Applicant: MANDO CORPORATION
    Inventor: Jong-hak JIN
  • Analog sampling apparatus for liquid crystal display
    Publication number: 20100091007
    Abstract: An analog sampling apparatus for a liquid crystal display device includes: a data driver to generate an analog data voltage; a data output bus line to receive the analog data voltage; a first sampling and holding circuit connected to the data output bus line to compensate an offset voltage in the analog data voltage and to supply the analog data voltage to a data line of a liquid crystal display panel; and a second sampling and holding circuit connected to the data output bus line arranged to sample the analog data voltage while the analog data voltage is supplied to the data line by the first sampling and holding circuit. The first sampling and holding circuit is arranged to supply the analog data voltage while the second sampling and holding circuit samples the analog data voltage, and to sample the analog data voltage while the second sampling and holding circuit supplies the analog data voltage.
    Type: Application
    Filed: December 11, 2009
    Publication date: April 15, 2010
    Inventors: Jin Mo Yoon, Jhun Suk Yoo
  • TELEMATICS TERMINAL AND METHOD FOR CONTROLLING VEHICLE USING THE SAME
    Publication number: 20100094500
    Abstract: A device and method for controlling a vehicle with a telematics terminal installed in or on the vehicle. The method includes a) receiving coordinates of a geo-fence area by the telematics terminal; b) determining whether or not the vehicle is located within the geo-fence area or is on a route that will intercept the geo-fence area; and c) if the vehicle is determined to have entered into the geo-fence area, controlling the vehicle to meet predetermined drive requirements previously set for the geo-fence area.
    Type: Application
    Filed: March 13, 2009
    Publication date: April 15, 2010
    Inventor: Seung-Hee JIN
  • SEMICONDUCTOR DEVICE HAVING RESISTANCE BASED MEMORY ARRAY AND METHOD OF OPERATION ASSOCIATED THEREWITH
    Publication number: 20100091553
    Abstract: In one embodiment, the semiconductor device includes a non-volatile memory cell array, a write circuit configured to write to the non-volatile memory cell array, and a control circuit. The control circuit is configured to store at least one erase indicator. The erase indicator is associated with at least a portion of the non-volatile memory cell array and indicates a logic state. The control circuit is configured to control the write circuit to write the logic state indicated by the erase indicator in the non-volatile memory cell array during an erase operation of the associated portion of the non-volatile memory cell array.
    Type: Application
    Filed: December 23, 2009
    Publication date: April 15, 2010
    Inventors: Yong-Jun Lee, Kwangjin Lee, Taek-Sung Kim, Kwangho Kim, Wooyeong Cho, Hyunho Choi, Hye-Jin Kim, Qi Wang