Patents by Inventor Jin Chang

Jin Chang has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240138033
    Abstract: An electromagnetic induction heating apparatus for heating an aerosol-forming article of an electronic cigarette includes: a power supply unit configured to supply DC power; a power amplifier including a switch unit comprising a pair of transistor switches having a differential structure and receiving DC power from the power supply unit, and a parallel-structured LC resonant network including a resonant inductor connected to an output terminal of the switch unit and electromagnetically inductively coupled with an inductor component of a heat-generating body for heating the aerosol-forming article of the electronic cigarette, and a resonant capacitor connected in parallel to the resonant inductor; and a driving unit configured to adjust a temperature of the heat-generating body by adjusting an operating frequency of the switch unit of the power amplifier to control an amount of current of the resonant inductor electromagnetically inductively coupled with the inductor component of the heat-generating body.
    Type: Application
    Filed: June 29, 2023
    Publication date: April 25, 2024
    Applicants: SILICON MITUS, INC., Hangzhou Silicon-Magic Semiconductor Technology Co., Ltd.
    Inventors: Jun Ho Moon, Il Kwon Chang, Sung Jin Park
  • Publication number: 20240137507
    Abstract: The present invention relates to a video encoding/decoding method and apparatus. The video decoding method according to the present invention may comprise decoding filter information on a coding unit; classifying samples in the coding unit into classes on a per block classification unit basis; and filtering the coding unit having the samples classified into the classes on a per block classification unit basis by using the filter information.
    Type: Application
    Filed: December 28, 2023
    Publication date: April 25, 2024
    Inventors: Sung Chang LIM, Jung Won KANG, Ha Hyun LEE, Dong San JUN, Hyun Suk KO, Jin Ho LEE, Hui Yong KIM
  • Publication number: 20240137511
    Abstract: Disclosed herein are a video decoding method and apparatus and a video encoding method and apparatus. In video encoding and decoding, multiple partition blocks are generated by splitting a target block. A prediction mode is derived for at least a part of the multiple partition blocks, among the multiple partition blocks, and prediction is performed on the multiple partition blocks based on the derived prediction mode. When prediction is performed on the partition blocks, information related to the target block may be used, and information related to an additional partition block, which is predicted prior to the partition block, may be used.
    Type: Application
    Filed: January 4, 2024
    Publication date: April 25, 2024
    Applicants: ELECTRONICS AND TELECOMMUNICATIONS RESEARCH INSTITUTE, INDUSTRY-UNIVERSITY COOPERATION FOUNDATION KOREA AEROSPACE UNIVERSITY, HANBAT NATIONAL UNIVERSITY INDUSTRY-ACADEMIC COOPERATION FOUNDATION
    Inventors: Jin-Ho LEE, Jung-Won KANG, Hyunsuk KO, Sung-Chang LIM, Dong-San JUN, Ha-Hyun LEE, Seung-Hyun CHO, Hui-Yong KIM, Hae-Chul CHOI, Dae-Hyeok GWON, Jae-Gon KIM, A-Ram BACK
  • Publication number: 20240137503
    Abstract: An image encoding/decoding method is disclosed. A method of decoding an image, the method comprising, deriving an intra prediction mode for a current block, decoding at least one original sample that is present in a rightmost column and a bottommost row (a bottom row) of the current block, constructing a reference sample by using the at least one decoded original sample and performing intra prediction on the current block by using the constructed reference sample.
    Type: Application
    Filed: January 3, 2024
    Publication date: April 25, 2024
    Inventors: Hyun Suk KO, Jin Ho LEE, Sung Chang LIM, Jung Won KANG, Ha Hyun LEE, Dong San JUN, Hui Yong KIM
  • Publication number: 20240136300
    Abstract: An overlay mark forming a Moire pattern, an overlay measurement method using the overlay mark, an overlay measurement apparatus using the overlay mark, and a manufacturing method of a semiconductor device using the overlay mark are provided. The overlay mark for measuring an overlay based on an image is configured to determine a relative misalignment between at least two pattern layers. The overlay mark includes a first overlay mark including a pair of first grating patterns which has a first pitch along a first direction and which is rotationally symmetrical by 180 degrees, and includes a second overlay mark including a pair of second grating patterns and a pair of third grating patterns. The second grating patterns partially overlap the first grating patterns and are rotationally symmetrical by 180 degrees, and the third grating patterns partially overlap the first grating patterns and are rotationally symmetrical by 180 degrees.
    Type: Application
    Filed: May 4, 2023
    Publication date: April 25, 2024
    Inventors: Hyun Chul LEE, Hyun Jin CHANG
  • Patent number: 11958987
    Abstract: The present disclosure relates to a cover window for a flexible display device including a polymer substrate including a polyamide resin; and a hard coating layer formed on at least one surface of the polymer substrate, wherein a yellow index of the polymer substrate measured in accordance with STM E 313 is 4.00 or less, and an elastic modulus of the polymer substrate measured at a strain rate of 12.5 mm/min in accordance with ISO 527-3 is 4 to 9 GPa.
    Type: Grant
    Filed: October 25, 2019
    Date of Patent: April 16, 2024
    Assignee: LG CHEM, LTD.
    Inventors: Jin Young Park, Bi Oh Ryu, Young Ji Tae, Youngseok Park, Yongjoon Heo, Yeongrae Chang
  • Patent number: 11962766
    Abstract: The present invention relates to an encoding method and decoding method, and a device using the same. The encoding method according to the present invention comprises the steps of: specifying an intra prediction mode for a current block; and scanning a residual signal by intra prediction of the current block, wherein the step of scanning the residual signal can determine a scanning type for a luminance signal and a chroma signal of the current block according to an intra prediction mode for a luminance sample of the current block.
    Type: Grant
    Filed: April 9, 2021
    Date of Patent: April 16, 2024
    Assignees: Electronics and Telecommunications Research Institute, University-Industry Cooperation Group of Kyung Hee University
    Inventors: Hui Yong Kim, Gwang Hoon Park, Kyung Yong Kim, Sung Chang Lim, Jin Ho Lee, Jin Soo Choi, Jin Woong Kim
  • Patent number: 11959875
    Abstract: Composition and electrode for phosphate sensing. In one embodiment, the composition includes a first component, a second component, and a third component. The first component is selected from a group consisting of cobalt oxide nanoparticles, tin (IV) chloride, diphenyl tin dichloride, and ammonium molybdate. The second component includes graphene oxide or reduced graphene oxide. The third component includes pyrrole or polypyrrole.
    Type: Grant
    Filed: August 10, 2018
    Date of Patent: April 16, 2024
    Assignee: UWM Research Foundation, Inc.
    Inventors: Woo-Jin Chang, Misong Ryu, Mohammad Rizwen Ur Rahman
  • Patent number: 11962803
    Abstract: The multi sample prediction method of the present invention comprises the steps of: determining a sample group consisting of a plurality of samples inside a decoding target block; determining a representative position corresponding to the sample group, inside the decoding target block; determining a representative prediction value for the sample group, on the basis of the determined representative position; and determining the determined representative prediction value as the final prediction value for each of the plurality of samples making up the sample group. The present invention enhances efficiency in encoding/decoding and reduces complexity thereof.
    Type: Grant
    Filed: May 31, 2023
    Date of Patent: April 16, 2024
    Assignee: ELECTRONICS AND TELECOMMUNICATIONS RESEARCH INSTITUTE
    Inventors: Jin Ho Lee, Hui Yong Kim, Sung Chang Lim, Jong Ho Kim, Ha Hyun Lee, Jin Soo Choi, Jin Woong Kim
  • Publication number: 20240119297
    Abstract: A processor-implemented method with checkpointing includes: performing an operation for learning of an artificial neural network (ANN) model; and performing a checkpointing to store information about a state of the ANN model, simultaneously with performing the operation for the learning of the ANN model.
    Type: Application
    Filed: February 3, 2023
    Publication date: April 11, 2024
    Applicants: SAMSUNG ELECTRONICS CO., LTD., Seoul National University R&DB Foundation
    Inventors: Junyeon LEE, Jin-soo KIM, Seongyeop JEONG, Uiseok SONG, Byungwoo BANG, Wooseok CHANG, Hun Seong CHOI
  • Publication number: 20240121385
    Abstract: The present invention relates to an intra prediction method and apparatus. The image decoding method according to the present invention may comprise decoding information on intra prediction; and generating a prediction block by performing intra prediction for a current block based on the information on intra prediction. The information on intra prediction may include information on an intra prediction mode, and the intra prediction mode may include a curved intra prediction mode.
    Type: Application
    Filed: October 4, 2023
    Publication date: April 11, 2024
    Inventors: Hyun Suk KO, Jin Ho LEE, Sung Chang LIM, Jung Won KANG, Ha Hyun LEE, Dong San JUN, Seung Hyun CHO, Hui Yong KIM, Jin Soo CHOI
  • Publication number: 20240120904
    Abstract: A semiconductor device includes an on-die resistor circuit comprising an on-die resistor, a calibration circuit configured to perform a calibration operation on the on-die resistor, and a calibration control circuit configured to control the calibration operation of the calibration circuit. The calibration circuit includes a current generating circuit configured to supply a calibration current to the on-die resistor and a comparing circuit configured to compare the magnitude of a first input signal that is generated by the calibration current and the on-die resistor with a magnitude of a second input signal that is generated by the calibration current and an external resistor.
    Type: Application
    Filed: February 15, 2023
    Publication date: April 11, 2024
    Applicant: SK hynix Inc.
    Inventors: Dong Seok KIM, Joo Won OH, Keun Jin CHANG
  • Publication number: 20240121122
    Abstract: Disclosed are an apparatus and method for electing a committee node in a blockchain. The apparatus for electing a committee node in a blockchain is configured to transmit a staking transaction including validator information to a blockchain system to register a validator node, generate a draw pool for electing a committee node based on the validator information, change entries of the draw pool using a predefined shuffling algorithm, select a preset number of top entries as votes of a committee member from among the entries of the shuffled draw pool, and elect, as the committee node, the validator node that has acquired votes of a committee.
    Type: Application
    Filed: August 23, 2023
    Publication date: April 11, 2024
    Inventors: Jong-Choul YIM, Jin-Tae OH, Young-Chang KIM, Chang-Hyun LEE
  • Publication number: 20240119064
    Abstract: Disclosed herein is an apparatus and method for synchronizing a block in a blockchain network. The apparatus synchronizes node information of existing participating nodes connected to a blockchain network by joining the blockchain network, determines synchronization target blocks by calculating the current section of a blockchain using an agreed-upon block received from the existing participating nodes, receives a block header of each section and the segment hash table of a snapshot that are verification data for verifying synchronization target data for the synchronization target blocks from participating nodes that are not connected as peers, among the existing participating nodes, generates a snapshot by receiving snapshot segments and the blocks of the current section, which are the synchronization target data, from participating nodes connected as peers, among the existing participating nodes, verifies the snapshot generated from the snapshot segments, and synchronizes the verified snapshot.
    Type: Application
    Filed: October 10, 2023
    Publication date: April 11, 2024
    Applicant: ELECTRONICS AND TELECOMMUNICATIONS RESEARCH INSTITUTE
    Inventors: Young-Chang KIM, Jong-Choul YIM, Jin-Tae OH, Chang-Hyun LEE
  • Patent number: 11956426
    Abstract: Disclosed herein are a decoding method and apparatus and an encoding method and apparatus for deriving an intra-prediction mode. An intra-prediction mode may be derived using a method for deriving an intra-prediction mode based on a neighbor block of the target block, a method for deriving an intra-prediction mode using signaling of the intra-prediction mode of the target block, or a method for deriving an adaptive intra-prediction mode based on the type of a target slice. An MPM list may be used to derive the intra-prediction mode, and a temporal neighbor block or the like may be used to configure the MPM list.
    Type: Grant
    Filed: May 9, 2022
    Date of Patent: April 9, 2024
    Assignees: Electronics and Telecommunications Research Institute, Industry-University Cooperation Foundation Korea Aerospace University, Industry-Academia Cooperation Group of Sejong University
    Inventors: Jin-Ho Lee, Jae-Gon Kim, Jung-Won Kang, Do-Hyeon Park, Yung-Lyul Lee, Ha-Hyun Lee, Sung-Chang Lim, Hui-Yong Kim, Ji-Hoon Do, Yong-Uk Yoon
  • Patent number: 11955943
    Abstract: A semiconductor device includes an on-die resistor circuit comprising an on-die resistor, a calibration circuit configured to perform a calibration operation on the on-die resistor, and a calibration control circuit configured to control the calibration operation of the calibration circuit. The calibration circuit includes a current generating circuit configured to supply a calibration current to the on-die resistor and a comparing circuit configured to compare the magnitude of a first input signal that is generated by the calibration current and the on-die resistor with a magnitude of a second input signal that is generated by the calibration current and an external resistor.
    Type: Grant
    Filed: February 15, 2023
    Date of Patent: April 9, 2024
    Assignee: SK hynix Inc.
    Inventors: Dong Seok Kim, Joo Won Oh, Keun Jin Chang
  • Patent number: 11955752
    Abstract: An electrical connector includes at least one electrical module. The electrical module includes: an insulating body, where multiple first accommodating slots are concavely provided on a first side toward a second side of the insulating body; multiple first terminal assemblies, respectively accommodated in the corresponding first accommodating slots; and a first grounding member, having multiple first spokes and multiple second spokes. Each first terminal assembly includes a first insulating block, a pair of first signal terminals, and a first shielding shell. Each first shielding shell has a first shielding side surface exposed to the first side. Each first spoke is in mechanical contact with the first shielding shells of a same electrical module, and each second spoke is in contact with the first shielding side surface of the corresponding first shielding shell, thus achieving conduction between the first shielding shells and the first grounding member.
    Type: Grant
    Filed: January 25, 2022
    Date of Patent: April 9, 2024
    Assignee: LOTES CO., LTD
    Inventors: Zhi Li He, Wen Chang Chang, Jie Liao, Jin Zhu Wang
  • Publication number: 20240111785
    Abstract: Disclosed herein is a method for adding an additional chain to a blockchain. The method includes depositing, by a node of the blockchain, an asset corresponding to the additional chain; selecting the node as one of consensus nodes for connecting an additional block to the additional chain based on a share value corresponding to the asset; and performing, by the node, distributed consensus for connecting the additional block. Here, nodes constituting the blockchain include major shareholder nodes for processing transactions.
    Type: Application
    Filed: April 10, 2023
    Publication date: April 4, 2024
    Inventors: Jin-Tae OH, Young-Chang KIM, Chang-Hyun LEE, Jong-Choul YIM
  • Patent number: 11946070
    Abstract: The present invention relates to a medium composition for reinforcing the efficacy of stem cells, including ethionamide, a method of reinforcing the efficacy of stem cells, including culturing stem cells in the medium composition, a method of preparing stem cells with reinforced efficacy, stem cells prepared by the above-mentioned method, and a use thereof. According to the present invention, the anti-inflammatory effect of mesenchymal stem cells and expression levels of paracrine factors may be effectively improved by a simple method of treating mesenchymal stem cells with ethionamide, and the stem cells obtained by the above method may be effectively used for preventing or treating an inflammatory disease or a degenerative brain disease.
    Type: Grant
    Filed: July 15, 2020
    Date of Patent: April 2, 2024
    Assignee: SAMSUNG LIFE PUBLIC WELFARE FOUNDATION
    Inventors: Duk Lyul Na, Jong Wook Chang, Hyo Jin Son
  • Publication number: 20240103809
    Abstract: Provided is a computation method of a memory processor configured to perform an operation between a first vector including first elements and a second vector including second elements, the first elements including respective first bits and the second elements including respective second bits, the method performed by the memory processor including: applying, to single-bit operation gates, the respective first bits and the respective second bits; obtaining bit operation result sum values for the respective first and second elements based on bit operation results obtained using the single-bit operation gates; and obtaining an operation result of the first vector and the second vector based on the bit operation result sum value.
    Type: Application
    Filed: April 26, 2023
    Publication date: March 28, 2024
    Applicant: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Dong-Jin CHANG, Soon-Wan KWON, Seok Ju YUN, Jaehyuk LEE, Sungmeen MYUNG, Daekun YOON