Patents by Inventor Jin-Chuan Bai

Jin-Chuan Bai has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20020192860
    Abstract: A semiconductor device is proposed, in which a chip is placed in an opening penetratingly formed in a substrate in a manner as not to come into contact with the substrate, and an encapsulant formed on the substrate fills up the opening for encapsulating the chip. This arrangement of the chip accommodated in the substrate therefore reduces the overall height of the semiconductor device. Moreover, a plurality of conductive elements disposed on the substrate are also encapsulated by the encapsulant in a manner that, bottom sides of the conductive elements are exposed to outside of the encapsulant, and coplanarly positioned with a bottom side of the encapsulant. This therefore provides good planarity for a bottom side of the semiconductor device, allowing the semiconductor device to be well electrically connected to external devices. A method for fabricating the foregoing semiconductor device is also proposed.
    Type: Application
    Filed: August 9, 2002
    Publication date: December 19, 2002
    Inventor: Jin-Chuan Bai
  • Publication number: 20020187591
    Abstract: A packaging process for a semiconductor package is proposed, in which a plurality of conductive elements disposed on a substrate are electrically connected to the substrate and encapsulated by a first encapsulant formed on the substrate. Further, a semiconductor chip having a plurality of bond pads is mounted on a top surface of the first encapsulant and is electrically connected to the substrate through the bond pads being electrically connected to the corresponding conductive elements. Moreover, as the conductive elements have ends thereof coplanarly formed with the top surface of the first encapsulant, quality of the electrical connection between the chip and the conductive elements can be assured. In addition, as the conductive elements for electrically connecting the chip to the substrate are disposed on the substrate, the packaging cost can be reduced and quality of the packaged product can be improved.
    Type: Application
    Filed: August 2, 2001
    Publication date: December 12, 2002
    Applicant: UNITED TEST CENTER, INC.
    Inventor: Jin Chuan Bai
  • Publication number: 20020153581
    Abstract: A chip photoelectric sensor assembly comprises a substrate with a printed circuit board mounted thereon. A photoelectric sensor chip is provided with a plurality of photoelectric sensors and is mounted on the substrate such that the photoelectric sensor chip is electrically connected with the substrate. The photoelectric sensors of the photoelectric sensor chip are masked by a photosensitive protective layer made of a photosensitive hard coating material. The photosensitive protective layer has a thickness ranging between 1 and 10 microns. The very thin photosensitive protective layer is thus capable of minimizing the light refraction distortion.
    Type: Application
    Filed: April 5, 2000
    Publication date: October 24, 2002
    Inventors: Hong-Ming Lin, Jin-Chuan Bai
  • Patent number: 6459163
    Abstract: A semiconductor device is proposed, in which a chip is placed in an opening penetratingly formed in a substrate in a manner as not to come into contact with the substrate, and an encapsulant formed on the substrate fills up the opening for encapsulating the chip. This arrangement of the chip accommodated in the substrate therefore reduces the overall height of the semiconductor device. Moreover, a plurality of conductive elements disposed on the substrate are also encapsulated by the encapsulant in a manner that, bottom sides of the conductive elements are exposed to outside of the encapsulant, and coplanarly positioned with a bottom side of the encapsulant. This therefore provides good planarity for a bottom side of the semiconductor device, allowing the semiconductor device to be well electrically connected to external devices. A method for fabricating the foregoing semiconductor device is also proposed.
    Type: Grant
    Filed: October 12, 2001
    Date of Patent: October 1, 2002
    Assignee: United Test Center, Inc.
    Inventor: Jin-Chuan Bai
  • Publication number: 20020135080
    Abstract: A semiconductor device is proposed, in which a chip is placed in an opening penetratingly formed in a substrate in a manner as not to come into contact with the substrate, and an encapsulant formed on the substrate fills up the opening for encapsulating the chip. This arrangement of the chip accommodated in the substrate therefore reduces the overall height of the semiconductor device. Moreover, a plurality of conductive elements disposed on the substrate are also encapsulated by the encapsulant in a manner that, bottom sides of the conductive elements are exposed to outside of the encapsulant, and coplanarly positioned with a bottom side of the encapsulant. This therefore provides good planarity for a bottom side of the semiconductor device, allowing the semiconductor device to be well electrically connected to external devices. A method for fabricating the foregoing semiconductor device is also proposed.
    Type: Application
    Filed: October 12, 2001
    Publication date: September 26, 2002
    Inventor: Jin-Chuan Bai
  • Publication number: 20020041039
    Abstract: A semiconductor device without used of a chip carrier and method for making the same are proposed, in which a semiconductor chip has an active surface for disposing a plurality of conductive elements and forming a first encapsulant thereon, and a non-active surface for forming a second encapsulant thereon. The conductive elements are used to electrically connect the semiconductor chip to external devices. The first encapsulant is used to prevent the active surface from exposure to the atmosphere and encapsulate the conductive elements, for allowing one end of each of the conductive elements to be exposed to outside of the first encapsulant and coplanarly positioned with an outer surface of the first encapsulant. The second encapsulant together with the first encapsulant are able to provide sufficient structural strength for the semiconductor chip.
    Type: Application
    Filed: August 29, 2001
    Publication date: April 11, 2002
    Applicant: UNITED TEST CENTER, INC
    Inventor: Jin Chuan Bai
  • Publication number: 20010029059
    Abstract: A chip photoelectric sensor assembly comprises a substrate with a printed circuit board mounted thereon. A photoelectric sensor chip is provided with a plurality of photoelectric sensors and is mounted on the substrate such that the photoelectric sensor chip is electrically connected with the substrate. The photoelectric sensors of the photoelectric sensor chip are masked by a photosensitive protective layer made of a photosensitive hard coating material. The photosensitive protective layer has a thickness ranging between 1 and 10 microns. The very thin photosensitive protective layer is thus capable of minimizing the light refraction distortion.
    Type: Application
    Filed: June 18, 2001
    Publication date: October 11, 2001
    Inventors: Hong-Ming Lin, Jin-Chuan Bai