Patents by Inventor Jin-Dong Song

Jin-Dong Song has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20230404453
    Abstract: A device for monitoring brain-object interactions in a community includes a probe module attached to each individual and including a stimulation device, a specific wavelength emitting device, an infrared (IR) receiving device and a recording memory; a central controller to regulate a connection between the probe module and at least one object to control and monitor the probe module or the object; a plurality of IR emitters to transmit a time sync signal and a command to the probe module to monitor the individual; and a plurality of specific wavelength receivers to transmit the electrical signal received by the probe module to the central controller. Accordingly, it is possible to integratedly control the connection between the probe module and the object through the central controller and prevent confusion and loss of data transmission, thereby achieving efficient monitoring of the community.
    Type: Application
    Filed: March 28, 2023
    Publication date: December 21, 2023
    Applicant: KOREA INSTITUTE OF SCIENCE AND TECHNOLOGY
    Inventors: Jin-Dong SONG, Jee Hyun CHOI
  • Patent number: 11107894
    Abstract: Provided is a Group III-V compound semiconductor device. The device includes a substrate, a compound semiconductor layer provided on the substrate; and a buffer layer interposed between the compound semiconductor layer and the substrate. The compound semiconductor layer includes a first semiconductor area having a first conductivity type and a second semiconductor area having a second conductivity type. The buffer layer includes a high electron density area. In the buffer layer, an electron density of the high electron density area is higher than an electron density outside the high electron density area.
    Type: Grant
    Filed: February 22, 2019
    Date of Patent: August 31, 2021
    Assignee: KOREA INSTITUTE OF SCIENCE AND TECHNOLOGY
    Inventors: Hyunsu Ju, Jin-Dong Song, Joonyeon Chang, Gyosub Lee
  • Patent number: 10901246
    Abstract: An optical phase shifter according to an embodiment for achieving the object of the present disclosure includes a first semiconductor layer formed on a substrate, a second semiconductor layer having opposite polarity to the first semiconductor layer, an insulating layer formed between the first semiconductor layer and the second semiconductor layer, and including ferroelectrics, a first electrode connected to the first semiconductor layer, and a second electrode connected to the second semiconductor layer. According to an embodiment, the introduction of ferroelectric materials to a semiconductor-insulator-semiconductor (SIS) optical phase shifter brings about improvement in charge collection efficiency resulting from the negative capacitance effect, thereby achieving higher phase modulation efficiency and lower power consumption. Additionally, it is possible to realize a new structure of optical switch or modulator device through design changes of the type of ferroelectrics and the structural variables.
    Type: Grant
    Filed: August 1, 2019
    Date of Patent: January 26, 2021
    Assignee: KOREA INSTITUTE OF SCIENCE AND TECHNOLOGY
    Inventors: Jae-Hoon Han, Sanghyeon Kim, Pavlo Bidenko, Subin Lee, Jin-Dong Song
  • Patent number: 10686534
    Abstract: A method for optical interconnection between semiconductor chips according to an embodiment include converting an electrical signal to an optical signal, transmitting the optical signal to a second substrate disposed above or below a first substrate using an optical transmitter provided on the first substrate, receiving the optical signal using an optical detector provided on the second substrate, and converting the received optical signal to an electrical signal. Accordingly, using a mid-infrared wavelength range of light that is transparent to semiconductor materials such as silicon and next-generation high-mobility materials, it is possible to enable interconnection between stacked semiconductor chips without using metal wiring.
    Type: Grant
    Filed: April 5, 2019
    Date of Patent: June 16, 2020
    Assignee: KOREA INSTITUTE OF SCIENCE AND TECHNOLOGY
    Inventors: Jaehoon Han, Sanghyeon Kim, Hyunsu Ju, Jin-Dong Song
  • Patent number: 10566427
    Abstract: A high output and high speed electronic device having low cost and high productivity is disclosed. The copper halide semiconductor based electronic device, includes a substrate, a copper halide channel layer formed on the substrate, an insulating layer formed on the copper halide channel layer, a gate electrode formed on the insulating layer, a first n+copper halide layer formed on the copper halide channel layer to be disposed at a first side of the gate electrode, the first n+copper halide layer comprising n-type impurities, a drain electrode formed on the first n+copper halide layer, a second n+copper halide layer formed on the copper halide channel layer to be disposed at a second side of the gate electrode, which is opposite to the first side, the second n+copper halide layer comprising n-type impurities, and a source electrode formed on the second n+copper halide layer.
    Type: Grant
    Filed: November 30, 2016
    Date of Patent: February 18, 2020
    Assignee: PETALUX INC.
    Inventors: Do Yeol Ahn, Sang Joon Park, Seung Hyun Yang, Jin Dong Song
  • Publication number: 20200041825
    Abstract: An optical phase shifter according to an embodiment for achieving the object of the present disclosure includes a first semiconductor layer formed on a substrate, a second semiconductor layer having opposite polarity to the first semiconductor layer, an insulating layer formed between the first semiconductor layer and the second semiconductor layer, and including ferroelectrics, a first electrode connected to the first semiconductor layer, and a second electrode connected to the second semiconductor layer. According to an embodiment, the introduction of ferroelectric materials to a semiconductor-insulator-semiconductor (SIS) optical phase shifter brings about improvement in charge collection efficiency resulting from the negative capacitance effect, thereby achieving higher phase modulation efficiency and lower power consumption. Additionally, it is possible to realize a new structure of optical switch or modulator device through design changes of the type of ferroelectrics and the structural variables.
    Type: Application
    Filed: August 1, 2019
    Publication date: February 6, 2020
    Inventors: Jae-Hoon HAN, Sanghyeon KIM, Pavlo BIDENKO, Subin LEE, Jin-Dong SONG
  • Publication number: 20190312654
    Abstract: A method for optical interconnection between semiconductor chips according to an embodiment include converting an electrical signal to an optical signal, transmitting the optical signal to a second substrate disposed above or below a first substrate using an optical transmitter provided on the first substrate, receiving the optical signal using an optical detector provided on the second substrate, and converting the received optical signal to an electrical signal. Accordingly, using a mid-infrared wavelength range of light that is transparent to semiconductor materials such as silicon and next-generation high-mobility materials, it is possible to enable interconnection between stacked semiconductor chips without using metal wiring.
    Type: Application
    Filed: April 5, 2019
    Publication date: October 10, 2019
    Inventors: Jaehoon HAN, Sanghyeon KIM, Hyunsu JU, Jin-Dong SONG
  • Publication number: 20190267453
    Abstract: Provided is a Group III-V compound semiconductor device. The device includes a substrate, a compound semiconductor layer provided on the substrate; and a buffer layer interposed between the compound semiconductor layer and the substrate. The compound semiconductor layer includes a first semiconductor area having a first conductivity type and a second semiconductor area having a second conductivity type. The buffer layer includes a high electron density area. In the buffer layer, an electron density of the high electron density area is higher than an electron density outside the high electron density area.
    Type: Application
    Filed: February 22, 2019
    Publication date: August 29, 2019
    Inventors: Hyunsu JU, Jin-Dong SONG, Joonyeon CHANG, Gyosub LEE
  • Publication number: 20180350920
    Abstract: A high output and high speed electronic device having low cost and high productivity is disclosed. The copper halide semiconductor based electronic device, includes a substrate, a copper halide channel layer formed on the substrate, an insulating layer formed on the copper halide channel layer, a gate electrode formed on the insulating layer, a first n+copper halide layer formed on the copper halide channel layer to be disposed at a first side of the gate electrode, the first n+copper halide layer comprising n-type impurities, a drain electrode formed on the first n+copper halide layer, a second n+copper halide layer formed on the copper halide channel layer to be disposed at a second side of the gate electrode, which is opposite to the first side, the second n+copper halide layer comprising n-type impurities, and a source electrode formed on the second n+copper halide layer.
    Type: Application
    Filed: November 30, 2016
    Publication date: December 6, 2018
    Applicant: PETALUX INC.
    Inventors: Do Yeol AHN, Sang Joon PARK, Seung Hyun YANG, Jin Dong SONG
  • Publication number: 20180226526
    Abstract: A trasparent PN junction device and an electronic device using the PN junction device are provided. The PN junction device to achieve above objects of the invention includes a support substrate, a capper chloride (CuCl) thin film layer, a transparent electrode layer, a first electrode and a second electrode. The capper chloride thin film layer is formed on the supporting substrate and operates as a P-type semiconductor layer. The transparent electrode layer is formed on the capper chloride thin film layer and operates as an N-type semiconductor layer. The first electrode is formed on the capper chloride thin film layer. The second electrode is formed on the transparent electrode layer. Further, the transparent electrode layer may include indium tin oxide (ITO) or indium zinc oxide (IZO).
    Type: Application
    Filed: September 30, 2016
    Publication date: August 9, 2018
    Applicant: PETALUX INC.
    Inventors: Do Yeol AHN, Sang Joon PARK, Jin Dong SONG, Seung Hyun YANG
  • Patent number: 9331266
    Abstract: A non-volatile reconfigurable logic device executing logical operations and a memory function and controlled by a magnetic field is provided. The reconfigurable logic device includes i) at least one semiconductor device; and ii) a pair of magnetic field controlled devices respectively spaced apart from both sides of the semiconductor device and that are adapted to generate magnetic field leakage to control the semiconductor device. The semiconductor device includes i) a first semiconductor layer; and ii) a second semiconductor layer located on the first semiconductor layer. One of the first semiconductor layer and the second semiconductor layer is a p-type semiconductor layer and the other is an n-type semiconductor layer.
    Type: Grant
    Filed: December 18, 2013
    Date of Patent: May 3, 2016
    Assignees: KOREA INSTITUTE OF SCIENCE AND TECHNOLOGY, THE UNITED STATES OF AMERICA, AS REPRESENTED BY THE SECRETARY OF THE NAVY
    Inventors: Joon Yeon Chang, Jin Ki Hong, Jin Dong Song, Mark Johnson
  • Patent number: 9240511
    Abstract: Disclosed is a photodetector including an electrically conductive substrate, a first electrode formed on the substrate, a second electrode disposed to be spaced apart from the first electrode, a plasmonic nanostructure positioned between the first electrode and the second electrode and having surface plasmon resonance, and a resistance measuring device or an electrical conductivity measuring device connected to the first electrode and the second electrode.
    Type: Grant
    Filed: December 30, 2013
    Date of Patent: January 19, 2016
    Assignee: KOREA INSTITUTE OF SCIENCE AND TECHNOLOGY
    Inventors: Seung Yong Lee, Jin Dong Song, So-Hye Cho, Jin Ock Park, Jong-Ku Park
  • Patent number: 9190541
    Abstract: In an aspect of the present disclosure, there is disclosed a manufacture method of an antireflection coating using a self-assembly nano structure, which includes forming a first metal droplet on a substrate by means of droplet epitaxy, depositing a first non-metal on the formed first metal droplet, and forming a first nano compound crystal by means of self-assembly of the deposited first non-metal and the first metal droplet.
    Type: Grant
    Filed: May 31, 2013
    Date of Patent: November 17, 2015
    Assignee: KOREA INSTITUTE OF SCIENCE AND TECHNOLOGY
    Inventors: Jin-Dong Song, Eunhye Lee, Min Hwan Bae, Won Jun Choi, Jae Jin Yoon, Il Ki Han
  • Publication number: 20150053980
    Abstract: Disclosed is a photodetector including an electrically conductive substrate, a first electrode formed on the substrate, a second electrode disposed to be spaced apart from the first electrode, a plasmonic nanostructure positioned between the first electrode and the second electrode and having surface plasmon resonance, and a resistance measuring device or an electrical conductivity measuring device connected to the first electrode and the second electrode.
    Type: Application
    Filed: December 30, 2013
    Publication date: February 26, 2015
    Applicant: KOREA INSTITUTE OF SCIENCE AND TECHNOLOGY
    Inventors: Seung Yong LEE, Jin Dong SONG, So-Hye CHO, Jin Ock PARK, Jong-Ku PARK
  • Patent number: 8895412
    Abstract: Disclosed is a nano-structure manufacturing method which includes: forming a first semiconductor composite layer, a semiconductor quantum structure layer, a second semiconductor composite layer, and a semiconductor quantum dot layer on a substrate in order; thermally treating the semiconductor quantum dot layer so that quantum dots of the semiconductor quantum dot layer are aggregated; and performing an etching process by using the aggregated quantum dots as a mask.
    Type: Grant
    Filed: November 5, 2012
    Date of Patent: November 25, 2014
    Assignee: Korea Institute of Science and Technology
    Inventors: Seung Kyu Ha, Su Youn Kim, Il Ki Han, Jin Dong Song, Won Jun Choi
  • Publication number: 20140217441
    Abstract: In an aspect of the present disclosure, there is disclosed a manufacture method of an antireflection coating using a self-assembly nano structure, which includes forming a first metal droplet on a substrate by means of droplet epitaxy, depositing a first non-metal on the formed first metal droplet, and forming a first nano compound crystal by means of self-assembly of the deposited first non-metal and the first metal droplet.
    Type: Application
    Filed: May 31, 2013
    Publication date: August 7, 2014
    Inventors: Jin-Dong SONG, Eunhye LEE, Min Hwan BAE, Won Jun CHOI, Jae Jin YOON, Il KI HAN
  • Patent number: 8780951
    Abstract: There is provided a distributed Bragg's reflector (DBR) comprising a substrate and an unit distributed Bragg's reflector (DBR) layer, wherein a multi-layer is laminated on the substrate. The unit DBR layer is composed of a multi-layer laminated structure of unit digital-alloy multinary compound semiconductor layer/multinary compound semiconductor layer or unit digital-alloy multinary compound semiconductor layer/unit digital-alloy multinary compound semiconductor layer. The unit digital-alloy multinary compound semiconductor layer is composed of the multi-layer laminated structure of the first layer of multinary compound semiconductor and the second layer of a different multinary compound semiconductor on said first layer. The digital-alloy distributed Bragg's reflector of the present invention has a uniform quality on the substance area and the filter and reflector having uniformly high quality can be mass produced by using the reflector.
    Type: Grant
    Filed: November 19, 2009
    Date of Patent: July 15, 2014
    Assignee: Korea Institute of Science and Technology
    Inventors: Jin Dong Song, Won Jun Choi, Jung Il Lee
  • Patent number: 8775139
    Abstract: A method for simulating fluid flow includes: discretizing a space in which a fluid flows into a regular lattice; assuming that fluid particles repetitively move and collide in the lattice; deriving a univariate polynomial equation by comparing the n-th (n is a non-negative integer) order momentum of velocity between the Maxwell-Boltzmann distribution and the discretized Maxwell-Boltzmann distribution; calculating the weight coefficients corresponding to the discrete velocities of the fluid particles based on the univariate polynomial equation; and deriving a lattice Boltzmann model using the weight coefficients. A lattice Boltzmann model with superior stability and accuracy may be derived easily.
    Type: Grant
    Filed: June 16, 2011
    Date of Patent: July 8, 2014
    Assignee: Korea Institute of Science and Technology
    Inventors: Jae Wan Shim, Hyun Cheol Koo, Suk Hee Han, Byoung Chul Min, Jun Woo Choi, Kyung Ho Shin, Jin Dong Song
  • Publication number: 20140167814
    Abstract: A non-volatile reconfigurable logic device executing logical operations and a memory function and controlled by a magnetic field is provided. The reconfigurable logic device includes i) at least one semiconductor device; and ii) a pair of magnetic field controlled devices respectively spaced apart from both sides of the semiconductor device and that are adapted to generate magnetic field leakage to control the semiconductor device. The semiconductor device includes i) a first semiconductor layer; and ii) a second semiconductor layer located on the first semiconductor layer. One of the first semiconductor layer and the second semiconductor layer is a p-type semiconductor layer and the other is an n-type semiconductor layer.
    Type: Application
    Filed: December 18, 2013
    Publication date: June 19, 2014
    Applicants: KOREA INSTITUTE OF SCIENCE AND TECHNOLOGY
    Inventors: Joon Yeon CHANG, Jin Ki HONG, Jin Dong SONG, Mark JOHNSON
  • Publication number: 20140030872
    Abstract: Disclosed is a nano-structure manufacturing method which includes: forming a first semiconductor composite layer, a semiconductor quantum structure layer, a second semiconductor composite layer, and a semiconductor quantum dot layer on a substrate in order; thermally treating the semiconductor quantum dot layer so that quantum dots of the semiconductor quantum dot layer are aggregated; and performing an etching process by using the aggregated quantum dots as a mask.
    Type: Application
    Filed: November 5, 2012
    Publication date: January 30, 2014
    Applicant: KOREA INSTITUTE OF SCIENCE AND TECHNOLOGY
    Inventors: Seung Kyu HA, Su Youn KIM, Il Ki HAN, Jin Dong SONG, Won Jun CHOI