Patents by Inventor Jin-Dong Song

Jin-Dong Song has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20130330083
    Abstract: An underwater communication apparatus for performing an optical communication with an external device under water includes: a current control unit that modulates first data to be transmitted to the external device into a first current; and a light transmitting unit that transmits light with a wavelength of 450 to 500 nm corresponding to the first current to the external device.
    Type: Application
    Filed: January 18, 2013
    Publication date: December 12, 2013
    Applicant: KOREA INSTITUTE OF SCIENCE AND TECHNOLOGY
    Inventors: Jin-Dong SONG, Il Ki HAN, Won Jun CHOI, Jung Il LEE
  • Patent number: 8586964
    Abstract: Disclosed herein are a method of generating a two-dimensional hole gas (2DHG) using a type-2 quantum well formed using semiconductors with different electron affinities or band gap, and a high-speed p-type semiconductor device using the 2DHG. To this end, the method includes providing a semiconductor substrate; growing a first semiconductor layer on the semiconductor substrate, growing a second semiconductor layer with a different electron affinity or band gap from the first semiconductor layer on the first semiconductor layer, and growing a third semiconductor layer with a different electron affinity or band gap from the second semiconductor layer, thereby forming a type-2 quantum well; and forming a p-type doping layer in the vicinity of the type-2 quantum well, thereby generating the 2DHG.
    Type: Grant
    Filed: October 25, 2010
    Date of Patent: November 19, 2013
    Assignee: Korea Institute of Science and Technology
    Inventors: Jin-Dong Song, Sang Hoon Shin, Hyung-jun Kim, Hyun Cheol Koo, Suk Hee Han, Joonyeon Chang
  • Publication number: 20130172962
    Abstract: A probe-type light-emitting diode (LED) chip module for biostimulation includes: an LED chip, a substrate supporting the LED chip, an optical waveguide collecting light emitted from the LED chip; and an insulator coupling the substrate with the optical waveguide and providing insulation from outside. The optical waveguide includes: a body extending from one end facing the LED chip with a cylindrical shape; a variable layer having a diameter decreasing gradually from the other end of the body; and a probe extending from the end of the variable layer and having a diameter equivalent to that of an optical fiber. The probe-type LED chip module for biostimulation may be manufactured with a small size to have superior portability and applicability.
    Type: Application
    Filed: March 6, 2012
    Publication date: July 4, 2013
    Applicant: Korea Institute of Science and Technology
    Inventors: Jin Dong Song, Ji Hyun Choi, Ju Hyeon Lee
  • Publication number: 20120296615
    Abstract: A method for simulating fluid flow includes: discretizing a space in which a fluid flows into a regular lattice; assuming that fluid particles repetitively move and collide in the lattice; deriving a univariate polynomial equation by comparing the n-th (n is a non-negative integer) order momentum of velocity between the Maxwell-Boltzmann distribution and the discretized Maxwell-Boltzmann distribution; calculating the weight coefficients corresponding to the discrete velocities of the fluid particles based on the univariate polynomial equation; and deriving a lattice Boltzmann model using the weight coefficients. A lattice Boltzmann model with superior stability and accuracy may be derived easily.
    Type: Application
    Filed: June 16, 2011
    Publication date: November 22, 2012
    Applicant: KOREA INSTITUTE OF SCIENCE AND TECHNOLOGY
    Inventors: Jae Wan SHIM, Hyun Cheol KOO, Suk Hee HAN, Byoung Chul MIN, Jun Woo CHOI, Kyung Ho SHIN, Jin Dong SONG
  • Patent number: 8237236
    Abstract: An InSb-based switching device, which operates at room temperature by using a magnetic field controlled avalanche process for applying to magneto-logic elements, is provided. A switching device of one embodiment includes a p-type semiconductor layer; an n-type semiconductor layer; and contact layers disposed on one of the p-type and n-type semiconductor layers, the p-type semiconductor layer being in contact with the n-type semiconductor layer such that a current can be applied through the contact layers to the p-type and n-type semiconductor layers to cause a current flow from one of the contact layers to the p-type and n-type semiconductor layers and from the p-type and n-type semiconductor layers to the other of the contact layers, whereby the current flow can be controlled by an intensity of a magnetic field applied to the p-type and n-type semiconductor layers substantially perpendicularly thereto.
    Type: Grant
    Filed: April 19, 2010
    Date of Patent: August 7, 2012
    Assignee: Korea Institute of Science and Technology
    Inventors: Jin Dong Song, Sung Jung Joo, Jin Ki Hong, Sang Hoon Shin, Kyung Ho Shin, Tae Yueb Kim, Ju Young Lim, Jin Seo Lee, Kung Won Rhie
  • Patent number: 8183611
    Abstract: A spin transistor that includes: a semiconductor substrate including an upper cladding layer and a lower cladding layer, and a channel layer interposed between the upper and lower cladding layers; a ferromagnetic source and a ferromagnetic drain formed on the semiconductor substrate and spaced from each other in a length direction of the channel layer; and a gate electrode formed on the semiconductor substrate between the source and the drain and having applied a gate voltage thereto to control a spin precession of an electron passing through the channel layer, wherein the semiconductor substrate includes a first carrier supply layer of a first conductivity type disposed below the lower cladding layer and supplying carriers to the channel layer, and a second carrier supply layer of a second conductivity type opposite to the first conductivity type formed on the upper cladding layer and supplying the carriers to the channel layer.
    Type: Grant
    Filed: August 18, 2010
    Date of Patent: May 22, 2012
    Assignee: Korea Institute of Science and Technology
    Inventors: Hyung Jun Kim, Jin Dong Song, Hyun Cheol Koo, Kyung Ho Kim, Suk Hee Han
  • Publication number: 20120007045
    Abstract: Disclosed herein are a method of generating a two-dimensional hole gas (2DHG) using a type-2 quantum well formed using semiconductors with different electron affinities or band gap, and a high-speed p-type semiconductor device using the 2DHG. To this end, the method includes providing a semiconductor substrate; growing a first semiconductor layer on the semiconductor substrate, growing a second semiconductor layer with a different electron affinity or band gap from the first semiconductor layer on the first semiconductor layer, and growing a third semiconductor layer with a different electron affinity or band gap from the second semiconductor layer, thereby forming a type-2 quantum well; and forming a p-type doping layer in the vicinity of the type-2 quantum well, thereby generating the 2DHG.
    Type: Application
    Filed: October 25, 2010
    Publication date: January 12, 2012
    Inventors: JIN-DONG SONG, Sang Hoon Shin, Hyung-jun Kim, Hyun Cheol Koo, Suk Hee Han, Joonyeon Chang
  • Publication number: 20110284937
    Abstract: A spin transistor that includes: a semiconductor substrate including an upper cladding layer and a lower cladding layer, and a channel layer interposed between the upper and lower cladding layers; a ferromagnetic source and a ferromagnetic drain formed on the semiconductor substrate and spaced from each other in a length direction of the channel layer; and a gate electrode formed on the semiconductor substrate between the source and the drain and having applied a gate voltage thereto to control a spin precession of an electron passing through the channel layer, wherein the semiconductor substrate includes a first carrier supply layer of a first conductivity type disposed below the lower cladding layer and supplying carriers to the channel layer, and a second carrier supply layer of a second conductivity type opposite to the first conductivity type formed on the upper cladding layer and supplying the carriers to the channel layer.
    Type: Application
    Filed: August 18, 2010
    Publication date: November 24, 2011
    Inventors: Hyung Jun KIM, Jin Dong Song, Hyun Cheol Koo, Kyung Ho Kim, Suk Hee Han
  • Publication number: 20100308378
    Abstract: The present invention provides an InSb-based switching device operating at room temperature by using a magnetic field controlled avalanche process for applying to magneto-logic elements. A switching device of one embodiment includes a p-type semiconductor layer; an n-type semiconductor layer; and contact layers disposed on one of the p-type and n-type semiconductor layers, the p-type semiconductor layer being in contact with the n-type semiconductor layer such that a current can be applied through the contact layers to the p-type and n-type semiconductor layers to cause a current flow from one of the contact layers to the p-type and n-type semiconductor layers and from the p-type and n-type semiconductor layers to the other of the contact layers, whereby the current flow can be controlled by an intensity of a magnetic field applied to the p-type and n-type semiconductor layers substantially perpendicularly thereto.
    Type: Application
    Filed: April 19, 2010
    Publication date: December 9, 2010
    Applicant: KOREA INSTITUTE OF SCIENCE AND TECHNOLOGY
    Inventors: Jin Dong Song, Sung Jung Joo, Jin Ki Hong, Sang Hoon Shin, Kyung Ho Shin, Tae Yueb Kim, Ju Young Lim, Jin Seo Lee, Kung Won Rhie
  • Patent number: 7687379
    Abstract: Disclosed is a method of manufacturing a semiconductor device whereby InAs(1-x)Sbx semiconductor layer is formed on an easily available and economical semiconductor substrate such as a GaAs substrate or a Si substrate. According to the method, a quantum dot layer is formed between a semiconductor substrate and a semiconductor layer to reduce defects caused by lattice mismatch between the semiconductor layer and the semiconductor layer. The method may improve the growth speed of the semiconductor layer. In addition, because the InSb layer provided by the present invention has an electron mobility greater at room temperature, it may improve the quality and productivity of the semiconductor device.
    Type: Grant
    Filed: December 28, 2007
    Date of Patent: March 30, 2010
    Assignee: Korea Institute of Science and Technology
    Inventors: Jin-Dong Song, Ju-Young Lim, Joonyeon Chang, Won Jun Choi
  • Publication number: 20100068843
    Abstract: There is provided a distributed Bragg's reflector (DBR) comprising a substrate and an unit distributed Bragg's reflector (DBR) layer, wherein a multi-layer is laminated on the substrate. The unit DBR layer is composed of a multi-layer laminated structure of unit digital-alloy multinary compound semiconductor layer/multinary compound semiconductor layer or unit digital-alloy multinary compound semiconductor layer/unit digital-alloy multinary compound semiconductor layer. The unit digital-alloy multinary compound semiconductor layer is composed of the multi-layer laminated structure of the first layer of multinary compound semiconductor and the second layer of a different multinary compound semiconductor on said first layer. The digital-alloy distributed Bragg's reflector of the present invention has a uniform quality on the substance area and the filter and reflector having uniformly high quality can be mass produced by using the reflector.
    Type: Application
    Filed: November 19, 2009
    Publication date: March 18, 2010
    Inventors: Jin Dong Song, Won Jun Choi, Jung Il Lee
  • Publication number: 20090101888
    Abstract: Disclosed is a method of manufacturing a semiconductor device whereby InAs(1-x)Sbx semiconductor layer is formed on an easily available and economical semiconductor substrate such as a GaAs substrate or a Si substrate. According to the method, a quantum dot layer is formed between a semiconductor substrate and a semiconductor layer to reduce defects caused by lattice mismatch between the semiconductor layer and the semiconductor layer. The method may improve the growth speed of the semiconductor layer. In addition, because the InSb layer provided by the present invention has an electron mobility greater at room temperature, it may improve the quality and productivity of the semiconductor device.
    Type: Application
    Filed: December 28, 2007
    Publication date: April 23, 2009
    Applicant: Korea Institute of Science and Technology
    Inventors: Jin-Dong Song, Ju-Young Lim, Joonyeon Chang, Won Jun Choi