Patents by Inventor Jin-Gi Hong

Jin-Gi Hong has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 7439192
    Abstract: In a method of forming a thin layer for a semiconductor device through an ALD process and a CVD process in the same chamber, a semiconductor substrate is introduced into a processing chamber, and an interval between a showerhead and the substrate is adjusted to a first gap distance. A first layer is formed on the substrate at a first temperature through an ALD process. The interval between the showerhead and the substrate is additionally adjuted to a second gap distance, and a second layer is formed on the first layer at a second temperature through a CVD process. Accordingly, the thin layer has good current characteristics, and the manufacturing throughput of a semiconductor device is improved.
    Type: Grant
    Filed: June 15, 2005
    Date of Patent: October 21, 2008
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Jung-Hun Seo, Young-Wook Park, Jin-Gi Hong
  • Publication number: 20080048274
    Abstract: A semiconductor device may include a gate insulating layer on a semiconductor substrate, a polysilicon layer doped with impurities on the gate insulating layer, an interface reaction preventing layer on the polysilicon layer, a barrier layer on the interface reaction preventing layer, and a conductive metal layer on the barrier layer. The interface reaction preventing layer may reduce or prevent the occurrence of a chemical interfacial reaction with the barrier layer, and the barrier layer may reduce or prevent the diffusion of impurities doped to the polysilicon layer. The interface reaction preventing layer may include a metal-rich metal silicide having a metal mole fraction greater than a silicon mole fraction, so that the interface reaction preventing layer may reduce or prevent the dissociation of the barrier layer at higher temperatures. Thus, a barrier characteristic of a poly-metal gate electrode may be improved and surface agglomerations may be reduced or prevented.
    Type: Application
    Filed: July 20, 2007
    Publication date: February 28, 2008
    Inventors: Jung-Hun Seo, Hyun-Young Kim, Jin-Gi Hong
  • Patent number: 7311109
    Abstract: A method for cleaning a processing chamber and manufacturing a semiconductor device by removing impurities from a substrate in the processing chamber with a plasma of a first gas including hydrogen gas. After the substrate is removed from the processing chamber, the processing chamber is etched with the plasma of a non-hydrogenous second gas. Thus, the etching selectivity can be improved and the particles are prevented from depositing and/or forming on the substrate.
    Type: Grant
    Filed: June 26, 2003
    Date of Patent: December 25, 2007
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Jung-wook Kim, Hyeon-Deok Lee, Jin-Gi Hong, Ji-Soon Park, Eung-Joon Lee
  • Publication number: 20070202694
    Abstract: In a method of forming a layer, a titanium layer and a titanium nitride layer may be successively formed on a first wafer. By-products adhered to the inside of a chamber during the formation of the titanium nitride layer may be removed from the chamber. Processes of forming the titanium layer, forming the titanium nitride layer, and removing the by-products may be repeated relative to a second wafer.
    Type: Application
    Filed: October 31, 2006
    Publication date: August 30, 2007
    Inventors: Jung-Hun Seo, Jin-Gi Hong, Yun-Ho Choi, Hyun-Chul Kwun, Eun-Taeck Lee, Jin-Ho Kim
  • Publication number: 20070042132
    Abstract: A method of forming plasma used in a process of manufacturing a semiconductor device and a method of forming a layer for a semiconductor device using the plasma are disclosed. The plasma forming method includes forming a plasma region in a sealed space by supplying a plasma source gas into the sealed space at a first flow rate and maintaining the plasma region by supplying a plasma maintenance gas into the sealed space at a second flow rate higher than the first flow rate. The plasma source gas includes a first gas having a first atomic weight, and the plasma maintenance gas includes a second gas having a second atomic weight lower than the first atomic weight. The plasma source gas includes argon and the plasma maintenance gas includes helium. The method may further include forming the layer on a wafer by supplying a source gas into the sealed space.
    Type: Application
    Filed: June 12, 2006
    Publication date: February 22, 2007
    Inventors: Jung-Hun Seo, Young-Wook Park, JIn-Gi Hong, Kyung-Bum Koo, Eun-Taeck Lee, Yun-Ho Choi
  • Publication number: 20070022953
    Abstract: A source gas-supplying unit may include a chamber for receiving a liquid source. A first pipe may extend into the chamber to dip into the liquid source. The first pipe may provide a carrier gas to bubble through the liquid source to generate a vapor source. A second pipe may be connected to the chamber. The vapor source and the carrier gas may be supplied by the second pipe to a process chamber in which a semiconductor-manufacturing process may be carried out. A blocking structure may be provided in the sealed chamber. The blocking structure may block the liquid source that may be splashed toward the second pipe due to the bubbling.
    Type: Application
    Filed: July 21, 2006
    Publication date: February 1, 2007
    Inventors: Yun-Ho Choi, Tae-Hong Ha, Jung-Hun Seo, Jin-Gi Hong, Jung-Suk Seo, Sung-Guen Park, Hyun-Chul Kwun
  • Publication number: 20070000109
    Abstract: Chamber inserts and apparatuses for processing a substrate. In an example, the chamber insert may include a cylindrical body portion including an open top end portion and an open bottom end portion, a first protruding portion extending outwardly from a first portion of the cylindrical body portion, the first portion positioned circumferentially along the cylindrical body portion and a second protruding portion extending outwardly from a second portion of the cylindrical body portion, the second portion positioned circumferentially along less than all of the cylindrical body portion. In another example, the chamber insert may include a cylindrical body portion including an open top end portion and an open bottom end portion, the cylindrical body portion including a slit and at least one hole, the slit and the at least one hole positioned circumferentially along the cylindrical body portion and a first protruding portion extending outwardly from a first portion of the cylindrical body portion.
    Type: Application
    Filed: June 7, 2006
    Publication date: January 4, 2007
    Inventors: Jung-Hun Seo, Jin-Gi Hong, Kyung-Bum Koo, Yun-Ho Choi, Eun-Taeck Lee, Hyun Kwun
  • Publication number: 20060292810
    Abstract: In methods of manufacturing capacitors, a first metal compound may be deposited on a substrate using first and second source gases. The first and the second source gases may be provided onto the substrate by a first flow rate ratio in which a deposition rate of the first metal compound by surface reaction between the source gases is higher than that by mass transfer between the source gases. A second metal compound may be deposited on the first metal compound and undesired materials may be removed by providing the source gases with a second flow rate ratio different from the first flow rate ratio. Depositing the first and the second metal compounds may be repeated to form a lower electrode. A dielectric layer and an upper electrode may be formed on the lower electrode. Accordingly, permeation of an etching liquid or gas may be reduced during an etching process.
    Type: Application
    Filed: June 8, 2006
    Publication date: December 28, 2006
    Inventors: Jung-Hun Seo, Hyun-Young Kim, Young-Wook Park, Jin-Gi Hong, Kun-Sang Park, Jin-Ho Kim, Kyung-Bum Koo
  • Patent number: 7074671
    Abstract: Disclosed are an electrode of a semiconductor device and a method of forming the same. A polysilicon layer is formed on a semiconductor substrate. An amorphous silicon capping layer is then formed on the polysilicon layer. A silicide layer is formed on the capping layer. The capping layer prevents chlorine ions from diffusing downward to the polysilicon layer. Accordingly, abnormal growth of the polysilicon layer can be prevented, thus improving the stability of the electrical characteristics of a semiconductor device electrode.
    Type: Grant
    Filed: July 23, 2003
    Date of Patent: July 11, 2006
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Seung-Jae Lee, Jin-Gi Hong
  • Publication number: 20060137607
    Abstract: A chemical vapor deposition apparatus has a showerhead, and temperature control apparatus including a heater and a heat dissipation plate for regulating the temperature of the showerhead. The showerhead includes a bottom plate having gas spray openings, and an upper plate. The heater is disposed on an upper plate of the showerhead. The heat dissipation plate contacts an upper portion of the upper plate of the showerhead above the heater so that heat dissipates from the showerhead through the plate. The temperature control apparatus also includes a coolant system by which coolant is fed into a space defined between the heater and the heat dissipation plate. The temperature of the showerhead is precisely controlled using the heater, the heat dissipation plate and the coolant system.
    Type: Application
    Filed: December 27, 2005
    Publication date: June 29, 2006
    Inventors: Jung-Hun Seo, Young-Wook Park, Jin-Gi Hong, Kyung-Bum Koo, Eun-Taeck Lee, Yun-Ho Choi
  • Publication number: 20060128127
    Abstract: In a method and an apparatus for depositing a metal compound layer, a first source gas and a second source gas may be provided onto a substrate to deposit a first metal compound layer on the substrate. The first source gas may include a metal and halogen elements, and the second source gas may include a first material capable of being reacted with the metal and a second material capable of being reacted with the halogen element. The first and the second source gases may be provided at a first flow rate ratio. A second metal compound layer may be deposited on the first metal compound layer by providing the first and the second source gases with a second flow rate ratio different from the first flow rate ratio. The apparatus may include a process chamber configured to receive a substrate, a gas supply system, and a flow rate control device.
    Type: Application
    Filed: December 1, 2005
    Publication date: June 15, 2006
    Inventors: Jung-Hun Seo, Young-Wook Park, Jin-Gi Hong, Kyung-Bum Koo, Eun-Taeck Lee
  • Publication number: 20060096541
    Abstract: In an apparatus for forming a layer, the apparatus includes a processing chamber, a chuck, a gas-supplying unit, and a pipe unit. The chuck for supporting a substrate is disposed in the processing chamber. The gas-supplying unit supplies a source gas for forming a layer on the substrate and a purge gas for purging the inside of the processing chamber to the processing chamber. The pipe unit transfers the source gas and the purge gas to the processing chamber at a temperature that falls between the temperature of condensation and a reaction temperature for the source gas so that condensation or deposition reaction does not occur until the source gas enters the processing chamber. A heater located outside of the chamber heats the purge gas that is supplied to the processing chamber to a predetermined temperature.
    Type: Application
    Filed: October 25, 2005
    Publication date: May 11, 2006
    Inventors: Jung-Hun Seo, Young-Wook Park, Jin-Gi Hong, Kyung-Bum Koo, Eun-Taeck Lee
  • Publication number: 20060045970
    Abstract: An atomic layer deposition (ALD) thin film deposition apparatus is provided. The atomic layer deposition (ALD) thin film deposition apparatus comprises a reactor including a support on which at least one substrate is placed and a member from which gases are sprayed, a first reaction gas supply line which is coupled with a first reaction gas supply portion which allows a first reaction gas to flow from the first reaction gas supply portion to the reactor, a second reaction gas supply line which is coupled with a second reaction gas supply portion which allows a second reaction gas to flow from the second reaction gas supply portion to the reactor for reacting with the first reaction gas, a purge gas supply line which is coupled with a purge gas supply portion and allows a purge gas to flow from the purge gas supply portion to the reactor for conducting a purge step, and an exhaust line which exhausts a gas from within the reactor to a location outside the reactor.
    Type: Application
    Filed: August 30, 2005
    Publication date: March 2, 2006
    Inventors: Jung-Hun Seo, Young-Wook Park, Jin-Gi Hong, Eun-Taeck Lee
  • Publication number: 20060021578
    Abstract: A chemical vapor deposition apparatus and method are provided. The apparatus includes a heater disposed on a bottom of a process chamber for heating a wafer laid on the heater. A shower head is disposed above the heater for injecting a reaction gas. The apparatus comprises a shutter chamber provided at an outer side of the process chamber. A transfer robot is installed in the shutter chamber having a blade at a front end thereof. The transfer robot is reciprocated within the process chamber by driving device. A shutter disk is laid on the blade of the transfer robot. The shutter disk is located on the heater of the process chamber by the transfer robot to prevent radiant heat generated from the heater from being transferred to the shower head.
    Type: Application
    Filed: June 16, 2005
    Publication date: February 2, 2006
    Inventors: Jung-Hun Seo, Young-Wook Park, Jin-Gi Hong
  • Publication number: 20060024964
    Abstract: The method of forming a TiN thin film using an atomic layer deposition (ALD) method includes thermally decomposing TiCl4; introducing a pyrolyzed product of the TiCl4 into the chamber; supplying a first purge gas into the chamber; supplying a reactant gas into the chamber, thereby forming a TiN thin film; and supplying a second purge gas into the chamber. The apparatus of forming a TiN thin film includes a gas conduit having an entrance line into which a source gas, TiCl4 is introduced; a heater installed around the gas conduit and thermally decomposing the introduced source gas, TiCl4, in advance to make a secondary source gas; and a chamber being connected to the gas conduit and having a reaction room in which the TiN thin film is formed by the reaction of the secondary source gas and NH3 as a reactant gas. Therefore, a TiN thin film growth rate can be improved.
    Type: Application
    Filed: June 15, 2005
    Publication date: February 2, 2006
    Inventors: Jung-Hun Seo, Young-Wook Park, Jin-Gi Hong
  • Publication number: 20060000411
    Abstract: In a method of forming a thin layer for a semiconductor device through an ALD process and a CVD process in the same chamber, a semiconductor substrate is introduced into a processing chamber, and an interval between a showerhead and the substrate is adjusted to a first gap distance. A first layer is formed on the substrate at a first temperature through an ALD process. The interval between the showerhead and the substrate is additionally adjusted to a second gap distance, and a second layer is formed on the first layer at a second temperature through a CVD process. Accordingly, the thin layer has good current characteristics, and the manufacturing throughput of a semiconductor device is improved.
    Type: Application
    Filed: June 15, 2005
    Publication date: January 5, 2006
    Inventors: Jung-Hun Seo, Young-Wook Park, Jin-Gi Hong
  • Publication number: 20050279282
    Abstract: In a method of processing a semiconductor substrate, a source gas is primarily excited into a first plasma state having a first energy. The primarily excited source gas is provided to a process chamber. The excited source gas in the process chamber is secondarily excited into a second plasma state having a second energy higher than the first energy. The secondarily excited source gas contacts a semiconductor substrate to process the semiconductor substrate.
    Type: Application
    Filed: June 16, 2005
    Publication date: December 22, 2005
    Inventors: Kun-Sang Park, Young-Wook Park, Jin-Gi Hong
  • Publication number: 20040126949
    Abstract: Disclosed are an electrode of a semiconductor device and a method of forming the same. A polysilicon layer is formed on a semiconductor substrate. An amorphous silicon capping layer is then formed on the polysilicon layer. A silicide layer is formed on the capping layer. The capping layer prevents chlorine ions from diffusing downward to the polysilicon layer. Accordingly, abnormal growth of the polysilicon layer can be prevented, thus improving the stability of the electrical characteristics of a semiconductor device electrode.
    Type: Application
    Filed: July 23, 2003
    Publication date: July 1, 2004
    Applicant: Samsung Electronics Co., Ltd.
    Inventors: Seung-Jae Lee, Jin-Gi Hong
  • Publication number: 20040074515
    Abstract: A method for cleaning a processing chamber and manufacturing a semiconductor device by removing impurities from a substrate in the processing chamber with a plasma of a first gas including hydrogen gas. After the substrate is removed from the processing chamber, the processing chamber is etched with the plasma of a non-hydrogenous second gas. Thus, the etching selectivity can be improved and the particles are prevented from depositing and/or forming on the substrate.
    Type: Application
    Filed: June 26, 2003
    Publication date: April 22, 2004
    Inventors: Jung-Wook Kim, Hyeon-Deok Lee, Jin-Gi Hong, Ji-Soon Park, Eung-Joon Lee
  • Patent number: 6649503
    Abstract: Methods are provided for forming integrated circuit devices. A spin on glass (SOG) insulating layer is formed on an integrated circuit substrate. The SOG insulating layer includes sidewalls that define contact holes therein and spacers are formed on the sidewalls of the SOG insulating layer. Integrated circuit devices are also provided. The integrated circuit devices include an integrated circuit substrate, a spin on glass (SOG) insulating layer on the integrated circuit substrate. The SOG insulating layer includes sidewalls that define contact holes therein and spacers are provided on sidewalls of the SOG insulating layer.
    Type: Grant
    Filed: October 30, 2001
    Date of Patent: November 18, 2003
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Won-Jin Kim, Jin-Gi Hong