Patents by Inventor Jin-ho Ryu
Jin-ho Ryu has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
-
Publication number: 20240153791Abstract: The inventive concept provides a substrate treating method for etching a specific region on a substrate. The substrate treating method includes supplying a treating liquid to the substrate; and irradiating a laser to the specific region to locally heat the specific region; and wherein at the irradiating the laser, the laser is irradiated a plurality of times within the specific region, and the laser is irradiated to a region which does not overlap on the substrate, but which overlaps within the specific region.Type: ApplicationFiled: November 6, 2023Publication date: May 9, 2024Applicant: SEMES CO., LTD.Inventors: Jin Yeong SUNG, Ki Hoon CHOI, Hyun YOON, Sang Hyeon RYU, Young Ho PARK
-
Publication number: 20240154229Abstract: A battery module includes a plurality of cell assemblies including a plurality of secondary batteries; a module housing including an accommodation space configured to accommodate the plurality of cell assemblies; and a blocking member configured to, when a gas pressure more than a predetermined gas pressure or a heat more than a predetermined temperature is generated in at least some cell assemblies among the plurality of cell assemblies, block the generated gas or heat from moving to the other cell assemblies.Type: ApplicationFiled: August 20, 2020Publication date: May 9, 2024Applicant: LG ENERGY SOLUTION, LTD.Inventors: Seung-Joon KIM, Jin-Hak KONG, Ja-Eon GU, Min-Ho KWON, Jae-Uk RYU, Jeong Bin YU, Young-Bum CHO
-
Publication number: 20130075499Abstract: A nozzle for a burner boom water spray system of an offshore plant that can more efficiently shield a high heat source generating when combusting gas generating upon drilling crude oil is provided. The nozzle includes: a front ejecting portion having a first nozzle tap at the center; a first side ejecting portion formed at a lower side of the front ejecting portion; a second side ejecting portion formed at a lower side of the first side ejecting portion; and a fastening portion formed at a lower side of the second side ejecting portion and coupled to a member for supplying a nozzle injection fluid. The nozzle provides a side ejecting portion of two stages in addition to a front ejecting portion, and thus an efficient water curtain pattern can be embodied.Type: ApplicationFiled: August 15, 2012Publication date: March 28, 2013Applicant: SEBO TECH CO., LTD.Inventors: Hong-Woo JEON, Hang-Bum Cho, Do-Kyeong Lee, Tae-Uk Heo, Jin-Ho Ryu
-
Patent number: 8286873Abstract: Provided is a combi-card, i.e. a combination type IC card, which can be used in either contact and non-contact manner, and a communication system using the same, and the combi-card is provided with a transponder chip module formed with a RF antenna and attached in a recess region of a card body and is characterized by the use of the RF antenna of the transponder chip alone as a transmitting and receiving antenna.Type: GrantFiled: June 18, 2010Date of Patent: October 16, 2012Assignee: Korea Mining, Security Printing & ID Card Operating Corp.Inventors: Jin Ho Ryu, Jong Hoon Chae, Ho Sang Lee, Ho Geun Song, Jin Ki Hong, Hyun Mi Kim
-
Patent number: 8289109Abstract: An electromagnetic bandgap (EBG) pattern structure includes a nonconductive substrate and a pattern assembly formed on the substrate. The EBG pattern structure also includes regularly arranged closed-loop patterns and open-loop patterns, both of which are made of a conductive material. The EBG pattern structure can be used to manufacture new security products by applying its frequency characteristics to securities or IDs and variously used in security technologies for preventing forgery and alteration because various security codes can be created by adjusting the variables of its EBG pattern.Type: GrantFiled: May 20, 2010Date of Patent: October 16, 2012Assignee: Korea Minting, Security Printing & ID Card Operating Corp.Inventors: Jong Won Yu, Won Gyu Lim, Hyeong Seok Jang, Dong Hoon Shin, Jin Ho Ryu, Hyun Mi Kim, Won Gyun Choe
-
Patent number: 8181880Abstract: The present invention relates to a combi-card which can be used in a contact-type or noncontact-type fashion and a method for manufacturing the same. More particularly, this invention relates to a combi-card and a method for making the same, in which an inlay layer on which an antenna terminal made of a coil or conductive fiber is formed and a COB (chip on board) on which ACF (anisotropic conductor film) is applied, are pre-treated by a heating head and the like, the COB is attached to an antenna coil insertion layer, and an upper printing sheet with a protection film, and a lower printing sheet with a protection film, which are cut out to be suitable for the COB shape, are stacked to construct a combi-card.Type: GrantFiled: June 15, 2005Date of Patent: May 22, 2012Assignee: Korea Minting & Security Printing CorporationInventors: Sang-Chel Kwon, Jin-Ho Ryu, Jong-Hoon Chae, Jin-Ki Hong
-
Patent number: 8146800Abstract: In an apparatus for recognizing a security code having an electromagnetic band gap (EBG) pattern which uses reflection and transmission characteristics of the EBG pattern, a voltage controlled oscillator generates a signal to a power divider, which divides the power of the signal into halves, and outputs a first signal through a waveguide to be incident on the EBG pattern. The waveguide receives a signal reflected from the EBG pattern and outputs the reflected signal to a phase detector. A circulator outputs the second signal to the phase detector, which detects the phase difference between the reflected signal and the second signal, and outputs phase difference data to a data control unit, which determines whether the security code having the EBG pattern is recognized using the phase difference data. In an alternate embodiment, the voltage control oscillator is controlled to sequentially generate signals using power difference data.Type: GrantFiled: June 4, 2010Date of Patent: April 3, 2012Assignee: Korea Minting, Security Printing & ID Card Operating Corp.Inventors: Jong Won Yu, Hyeong Seok Jang, Won Gyu Lim, Won Seok Jeong, Jin Ho Ryu, Hyun Mi Kim
-
Patent number: 8053148Abstract: Provided is a method for fabricating a photomask. A light blocking layer is formed on a transparent substrate having a first region and a second region. A hard mask layer is formed on the light blocking layer. A first polymer film is formed on the hard mask layer. Here, the first polymer film is formed of single strand polymers that can form a complementary binding. A portion of the first polymer film corresponding to the first region is changed to comprise polymers having partial complementary binding. A hard mask pattern for exposing a portion of the light blocking layer under the first polymer film is formed by performing an etching process using the changed portion as an etch stop. A light blocking pattern is formed by removing an exposed portion of the light blocking layer by performing an etching process using the hard mask pattern as an etch mask, and then removing the hard mask pattern.Type: GrantFiled: December 30, 2008Date of Patent: November 8, 2011Assignee: Hynix Semiconductor Inc.Inventor: Jin Ho Ryu
-
Patent number: 8003302Abstract: Disclosed herein is a method for fabricating a pattern using a photomask that includes forming a first light shielding layer pattern over a substrate; forming a first resist layer pattern aligned to the first light shielding layer pattern over the first light shielding layer pattern; forming a phase shift region by selectively etching a portion of the substrate exposed by the first light shielding layer pattern; forming a second resist layer pattern by reducing the line width of the first resist layer pattern; forming a second light shielding layer pattern, having a reduced line width, by etching an exposed portion of the first light shielding layer pattern, and exposing a portion of the substrate adjacent the groove to form a rim region; removing the second resist layer pattern to form a photomask; and transferring a second pattern onto a wafer by performing an exposure process using the photomask.Type: GrantFiled: December 30, 2008Date of Patent: August 23, 2011Assignee: Hynix Semiconductor Inc.Inventor: Jin Ho Ryu
-
Publication number: 20110108617Abstract: In an apparatus for recognizing a security code having an electromagnetic band gap (EBG) pattern which uses reflection and transmission characteristics of the EBG pattern, a voltage controlled oscillator generates a signal to a power divider, which divides the power of the signal into halves, and outputs a first signal through a waveguide to be incident on the EBG pattern. The waveguide receives a signal reflected from the EBG pattern and outputs the reflected signal to a phase detector. A circulator outputs the second signal to the phase detector, which detects the phase difference between the reflected signal and the second signal, and outputs phase difference data to a data control unit, which determines whether the security code having the EBG pattern is recognized using the phase difference data. In an alternate embodiment, the voltage control oscillator is controlled to sequentially generate signals using power difference data.Type: ApplicationFiled: June 4, 2010Publication date: May 12, 2011Inventors: Jong Won Yu, Hyeong Seok Jang, Won Gyu Lim, Won Seok Jeong, Jin Ho Ryu, Hyun Mi Kim
-
Patent number: 7901848Abstract: A method of fabricating a photomask includes includes forming a light blocking layer over a transparent substrate, and forming a hard mask pattern over the light blocking layer. The hard mask pattern exposes a portion of the light blocking layer. The method also includes depositing a self assembly molecule (SAM) layer over the hard mask pattern. The SAM layer covers the hard mask pattern and a portion of the exposed light blocking layer. The method also includes forming a resist layer pattern over an exposed portion of the light blocking layer that is not covered by the deposited SAM layer. The method further includes removing the SAM layer to expose the hard mask pattern and the light blocking layer, and etching the light blocking layer with the hard mask pattern and the resist layer pattern to form the photomask. Still further, the method includes removing the hard mask pattern and the resist layer pattern.Type: GrantFiled: December 29, 2008Date of Patent: March 8, 2011Assignee: Hynix Semiconductor Inc.Inventor: Jin Ho Ryu
-
Publication number: 20100320270Abstract: Provided is a combi-card, i.e. a combination type IC card, which can be used in either contact and non-contact manner, and a communication system using the same, and the combi-card is provided with a transponder chip module formed with a RF antenna and attached in a recess region of a card body and is characterized by the use of the RF antenna of the transponder chip alone as a transmitting and receiving antenna.Type: ApplicationFiled: June 18, 2010Publication date: December 23, 2010Applicant: Korea Minting, Security Printing & ID Card Operating Corp.Inventors: Jin Ho RYU, Jong Hoon CHAE, Ho Sang LEE, Ho Geun SONG, Jin Ki HONG, Hyun Mi KIM
-
Publication number: 20100295633Abstract: Disclosed herein is an electromagnetic bandgap (EBG) pattern structure, including: a nonconductive substrate; and a pattern assembly formed on the substrate and including regularly arranged closed-loop patterns and open-loop patterns both of which are made of a conductive material. The EBG pattern structure is advantageous in that it can be used to manufacture new security products by applying its frequency characteristics to securities or IDs and in that it can be variously used in security technologies for preventing forgery and alteration because various security codes can be created by adjusting the variables of its EBG pattern.Type: ApplicationFiled: May 20, 2010Publication date: November 25, 2010Inventors: Jong Won YU, Won Gyu Lim, Hyeong Seok Jang, Dong Hoon Shin, Jin Ho Ryu, Hyun Mi Kim, Won Gyun Choe
-
Patent number: 7838179Abstract: In a method for fabricating a photo mask, first resist patterns are formed on a transparent substrate where a light blocking layer and a phase shift layer are formed. Line widths of the first resist patterns are measured to define a region requiring a line width correction. Second resist patterns exposing the defined region are formed on the first resist patterns. The line width of the light blocking layer is corrected by over-etching the exposed light blocking layer to a predetermined thickness. The second resist patterns are removed. Phase shift patterns and light blocking patterns are formed using the first resist patterns as an etch mask. Then, the first resist patterns are removed.Type: GrantFiled: December 5, 2007Date of Patent: November 23, 2010Assignee: Hynix Semiconductor Inc.Inventor: Jin Ho Ryu
-
Patent number: 7823031Abstract: Provided are a method and system for testing a semiconductor memory device using an internal clock signal of the semiconductor memory device as a data strobe signal. The internally-generated data strobe signal may be delayed to synchronize with test data. Because a test device need not supply the data strobe signal, the number of semiconductor memory modules that can be simultaneously tested can be increased, and an average test time for a unit memory module can be decreased.Type: GrantFiled: July 23, 2007Date of Patent: October 26, 2010Assignee: Samsung Electronics Co., Ltd.Inventors: Jun-bae Kim, Jin-ho Ryu, Sung-man Park
-
Publication number: 20100233590Abstract: A method for fabricating a photo mask using a fluorescence layer, comprising: forming a fluorescence layer on a frame region of a light-transmitting substrate that defines a main cell region and the frame region; forming a phase-shift layer and a light-shielding layer on the light-transmitting substrate and the fluorescence layer; forming a light-shielding main pattern in the main cell region and a light-shielding frame pattern in the frame region by patterning the light-shielding layer; forming a phase-shift main pattern and a phase-shift frame pattern to expose a portion of a surface of the fluorescence layer on side walls thereof, by etching the phase-shift layer using the light-shielding main pattern and the light-shielding frame pattern as an etch mask; irradiating light from a light source on the light-transmitting substrate and detecting an intensity of fluorescence of a fluorescence layer residue emitted from the exposed surface of the fluorescence layer; and determining under-etch or over-etch usingType: ApplicationFiled: December 28, 2009Publication date: September 16, 2010Applicant: HYNIX SEMICONDUCTOR INC.Inventor: Jin Ho Ryu
-
Patent number: 7794898Abstract: A method for fabricating a photomask includes forming a phase shift layer and a light blocking layer on a transparent substrate, forming a light blocking pattern including a space through which the phase shift layer is selectively exposed by etching light blocking layer, forming a resist pattern to fill the space, reducing a critical dimension (CD) of the resist pattern by irradiating ultraviolet (UV) rays onto the resist pattern, forming a phase shift pattern by etching the phase shift layer exposed during the reducing of the CD of the resist pattern using the reduced resist pattern and the light blocking pattern as an etch mask, and removing the resist pattern.Type: GrantFiled: April 17, 2008Date of Patent: September 14, 2010Assignee: Hynix Semiconductor Inc.Inventor: Jin Ho Ryu
-
Patent number: 7663397Abstract: A semiconductor device according to example embodiments that may include an on-die termination (ODT) control circuit having a pipe line structure which changes in response to a frequency of a clock signal and a termination resistance generator for generating termination resistance in response to a termination resistance control signal.Type: GrantFiled: December 27, 2007Date of Patent: February 16, 2010Assignee: Samsung Electronics Co., Ltd.Inventors: Jeong Suk Yang, Jin Ho Ryu
-
Publication number: 20090325082Abstract: Disclosed herein is a method for fabricating a pattern using a photomask that includes forming a first light shielding layer pattern over a substrate; forming a first resist layer pattern aligned to the first light shielding layer pattern over the first light shielding layer pattern; forming a phase shift region by selectively etching a portion of the substrate exposed by the first light shielding layer pattern; forming a second resist layer pattern by reducing the line width of the first resist layer pattern; forming a second light shielding layer pattern, having a reduced line width, by etching an exposed portion of the first light shielding layer pattern, and exposing a portion of the substrate adjacent the groove to form a rim region; removing the second resist layer pattern to form a photomask; and transferring a second pattern onto a wafer by performing an exposure process using the photomask.Type: ApplicationFiled: December 30, 2008Publication date: December 31, 2009Applicant: HYNIX SEMICONDUCTOR INC.Inventor: Jin Ho Ryu
-
Publication number: 20090258303Abstract: A method of fabricating a photomask includes includes forming a light blocking layer over a transparent substrate, and forming a hard mask pattern over the light blocking layer. The hard mask pattern exposes a portion of the light blocking layer. The method also includes depositing a self assembly molecule (SAM) layer over the hard mask pattern. The SAM layer covers the hard mask pattern and a portion of the exposed light blocking layer. The method also includes forming a resist layer pattern over an exposed portion of the light blocking layer that is not covered by the deposited SAM layer. The method further includes removing the SAM layer to expose the hard mask pattern and the light blocking layer, and etching the light blocking layer with the hard mask pattern and the resist layer pattern to form the photomask. Still further, the method includes removing the hard mask pattern and the resist layer pattern.Type: ApplicationFiled: December 29, 2008Publication date: October 15, 2009Applicant: HYNIX SEMICONDUCTOR INCInventor: Jin Ho Ryu