METHOD FOR FABRICATING PATTERNS USING A PHOTOMASK
Disclosed herein is a method for fabricating a pattern using a photomask that includes forming a first light shielding layer pattern over a substrate; forming a first resist layer pattern aligned to the first light shielding layer pattern over the first light shielding layer pattern; forming a phase shift region by selectively etching a portion of the substrate exposed by the first light shielding layer pattern; forming a second resist layer pattern by reducing the line width of the first resist layer pattern; forming a second light shielding layer pattern, having a reduced line width, by etching an exposed portion of the first light shielding layer pattern, and exposing a portion of the substrate adjacent the groove to form a rim region; removing the second resist layer pattern to form a photomask; and transferring a second pattern onto a wafer by performing an exposure process using the photomask.
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Priority to Korean patent application no. 10-2008-0061041, filed on Jun. 26, 2008, the disclosure of which is incorporated herein by reference in its entirety, is claimed.
BACKGROUND OF THE INVENTIONThe invention relates to photolithography, and more particularly, to a method for fabricating patterns using a photomask.
A semiconductor device, for example, a Dynamic Random Access Memory (DRAM) device, is made up of numerous fine patterns formed using a lithography process. In the lithography process, a resist layer is coated on a target layer to be patterned, and an exposure process and a development process are performed on the resist layer to form a resist layer pattern, which exposes a portion of the target layer. An etching process using the resist layer pattern as a mask is performed to remove the exposed portion of the target layer, to form the pattern. The resist layer pattern is then removed. As a design rule of the patterns formed on a semiconductor substrate is decreased with an increase in integration degree of the semiconductor device, a Critical Dimension (CD) of the pattern is also decreased. Therefore, a photomask having a fine pattern is required to form a highly integrated circuit using a lithography process. A binary mask has been used as the photomask. The binary mask includes a light shielding layer pattern formed on a transparent substrate. Transmitted light can be made incident on a wafer after passing through the substrate alone. In order to fabricate finer patterns on the wafer, a half-tone phase shift mask using a phase shift material having a transmittance of several percent has also been suggested and employed.
In the application of the lithography technology using this photomask, design data which contains a layout for the pattern is required to fabricate one pattern. Design data is information made with design layout data. For example, another completed design layout data for a hole-type pattern is required to fabricate or modify a CD and a shape of a hole-type pattern. Therefore, if modification or change of the pattern is required, it is necessary to establish new design layout data. Since this additional design takes much time to develop, it can lead to a delay of the development of the photomask. Consequently, increased time and effort are required to obtain the finally completed mask.
SUMMARY OF THE INVENTIONIn one embodiment, a method for fabricating a pattern using a photomask includes obtaining design data of a first pattern layout; forming a first light shielding layer pattern having the first pattern layout over a substrate, wherein a portion of the substrate is exposed between adjacent elements of the first light shielding layer pattern; forming a first resist layer pattern aligned to the first light shielding layer pattern over the first light shielding layer pattern; forming a phase shift region having a groove by selectively etching the exposed portion of the substrate using the first resist layer pattern as an etching mask; forming a second resist layer pattern that exposes a portion of the first light shielding layer pattern by reducing the line width of the first resist layer pattern; forming a second light shielding layer pattern having a reduced line width by removing the exposed portion of the first light shielding layer pattern using the second resist layer pattern as an etching mask, an exposing a portion of the substrate adjacent to the groove to form a rim region; removing the second resist layer pattern to form a photomask including a light shielding region defined by the second light shielding layer pattern, the phase shift region, and the rim region by removing the second resist layer pattern; and transferring a second pattern onto a wafer with an exposure process using the photomask.
Preferably, the first pattern layout is an island pattern layout designed as a layout for defining an active region over the wafer.
Preferably, the island pattern layout is designed as a layout in which cross shapes having a major axis and a minor axis of different lengths are repeatedly arranged for the active region. The second pattern is preferably a hole pattern when the first pattern layout is an island pattern layout.
Preferably, the first resist layer pattern is formed by coating a resist layer to cover the first light shielding layer pattern; selectively exposing a portion of the resist layer disposed between adjacent elements of the first light shielding layer pattern by irradiating a backside exposure light from a backside of the substrate; and developing and removing the exposed portion of the resist layer.
Preferably, the second resist layer pattern is formed by irradiating UV light onto the first resist layer pattern.
Preferably, the UV light is irradiated on the first resist layer in an atmosphere including nitrogen (N2) gas and oxygen (O2) gas.
Preferably, a width of the second light shielding layer pattern is varied depending on the length of time the first resist layer pattern is irradiated with UV light.
In another embodiment, a method for fabricating a pattern using a photomask includes obtaining design data of a first pattern layout; forming a primary photomask by forming a first light shielding layer pattern having the first pattern layout over a first substrate; transferring the first pattern layout onto the wafer by performing a first exposure process using the primary photomask; forming a second light shielding layer pattern having the first pattern layout over a second substrate, wherein a portion of the substrate is exposed between adjacent elements of the second light shielding layer pattern; forming a first resist layer pattern aligned to the second light shielding layer pattern over the second light shielding layer pattern; forming a phase shift region having a groove by selectively etching the exposed portion of the second substrate using the first resist layer pattern as an etching mask; forming a second resist layer pattern that exposes a portion of the second light shielding layer pattern by reducing the line width of the first resist layer pattern; forming a third light shielding layer pattern, having a reduced line width by etching an exposed portion of the second light shielding layer pattern using the second resist layer pattern as an etching mask, wherein a portion of the second substrate adjacent the groove is exposed to form a rim region; removing the second resist layer pattern to form a secondary photomask including a light shielding region defined by the third light shielding layer pattern, the phase shift region, and the rim region; and transferring a second pattern layout onto a wafer by performing a second exposure process on the wafer using the secondary photomask.
Preferably, the first pattern layout is an island pattern for an isolation region which defines an active region over the wafer. Preferably, the second pattern layout is a hole pattern. More preferably, the hole pattern is transferred overlappingly onto an active region of the wafer.
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Meanwhile, it is possible to control the printability by performing, for example, an Optical Proximity Correction (OPC), while controlling the major axis 300, 305 or minor axis 310, 315 of the island pattern. This is because it is possible to control the transfer amount of the exposure energy from the mask to the wafer. Referring to
As is apparent from the above description, in a method for fabricating the hole-type pattern using a photomask according to the invention, it is possible to form hole patterns of various forms using a design data of an existing island pattern without separate design change. Also, it is possible to fabricate a variable mask, which can be used to form various hole patterns. In addition, it is possible to improve the problem of irregular registration since the fabrication process begins from the same design data.
The above embodiments of the invention are illustrative and not limitative. Throughout the specification, where methods and compositions are described as include steps or materials, it is contemplated that the methods and compositions can also consist essential of, or consist of, any combination of the recited steps or materials, unless described otherwise. While the invention has been described with respect to the specific embodiments, it will be apparent to those skilled in the art that various changes and modifications may be made without departing from the spirit and scope of the invention as defined in the following claims.
Claims
1. A method for fabricating a pattern using a photomask, the method comprising:
- obtaining design data of an island pattern layout;
- forming a first light shielding layer pattern having a first pattern layout over a substrate, wherein the substrate is exposed between adjacent elements of the first light shielding layer pattern;
- forming a first resist layer pattern aligned with the first light shielding layer pattern over the first light shielding layer pattern;
- forming a phase shift region having a groove by selectively etching the exposed portion of the substrate using the first resist layer pattern as an etching mask;
- forming a second resist layer pattern that exposes a portion of the first light shielding layer pattern by reducing a line width of the first resist layer pattern;
- forming a second light shielding layer pattern having a reduced line width by etching the exposed portion of the first light shielding layer pattern using the second resist layer pattern as an etching mask, wherein a portion of the substrate adjacent the groove is exposed to form a rim region;
- removing the second resist layer pattern to form a photomask comprising a light shielding region defined by the second light shielding layer pattern, the phase shift region, and the rim region; and
- transferring a second pattern onto a wafer by performing an exposure process using the photomask.
2. The method of claim 1, comprising forming a first light shielding layer pattern to have an island pattern layout designed as a layout for defining an active region over the wafer.
3. The method of claim 2, comprising forming the first light shielding layer pattern having the island pattern layout designed as a layout in which cross shapes having major axis and minor axis of different lengths are repeatedly arranged for the active region.
4. The method of claim 2, comprising transferring a hole-type pattern on the wafer.
5. The method of claim 1, comprising forming the first resist layer pattern by:
- coating a resist layer to cover the first light shielding layer pattern;
- selectively exposing a portion of the resist layer, the portion disposed between adjacent elements of the first light shielding layer pattern by irradiating a exposure light from a backside of the substrate; and
- developing and removing the exposed portion of the resist layer.
6. The method of claim 1, comprising forming the second resist layer pattern by irradiating UV light onto the first resist layer pattern.
7. The method of claim 6, comprising irradiating the first resist layer pattern with the UV light in an atmosphere comprising nitrogen (N2) gas and oxygen (O2) gas.
8. The method of claim 6, comprising controlling the line width of the second light shielding layer pattern by varying the length of time the first resist layer pattern is irradiated with UV light, and controlling a line width of the second pattern by varying the size of the line width of the second light shielding layer pattern.
9. A method for fabricating a pattern using a photomask, the method comprising:
- forming a primary photomask by forming a first light shielding layer pattern having a first pattern layout over a first substrate;
- transferring a first pattern onto a wafer by performing a first exposure process using the primary photomask;
- forming a second light shielding layer pattern having the first pattern layout over a second substrate, wherein a portion of the second substrate is exposed between adjacent elements of the second light shielding layer pattern;
- forming a first resist layer pattern aligned with the second light shielding layer pattern over the second light shielding layer pattern;
- forming a phase shift region having a groove by selectively etching the exposed portion of the second substrate using the first resist layer pattern as an etching mask;
- forming a second resist layer pattern that exposes a portion of the second light shielding layer pattern by reducing a line width of the first resist layer pattern;
- forming a third light shielding layer pattern having a decreased line width by etching an exposed portion of the second light shielding layer pattern using the second resist layer pattern as an etching mask, and exposing a portion of the second substrate adjacent to the groove to form a rim region;
- removing the second resist layer pattern to form a secondary photomask comprising a light shielding region defined by the third light shielding layer pattern, the phase shift region, and the rim region; and
- transferring a second pattern onto a wafer by performing a second exposure process on the wafer using the secondary photomask.
10. The method of claim 9, comprising forming the first and second light shielding layer patterns to have an island pattern layout for an isolation region, which defines an active region over a wafer.
11. The method of claim 10, comprising forming the first and second light shielding layer patterns to have the island pattern layout designed as a layout in which cross shapes having major axis and minor axis of different lengths are repeatedly arranged for the active region.
12. The method of claim 10, comprising transferring a hole pattern onto the wafer using the secondary photomask.
13. The method of claim 9, comprising forming the first resist layer pattern by:
- coating a resist layer to cover the second light shielding layer pattern;
- selectively exposing a portion of the resist layer, the portion disposed between adjacent elements of the second light shielding layer pattern by irradiating exposure light from a backside of the substrate; and
- developing and removing the exposed portion of the resist layer.
14. The method of claim 9, comprising forming the second resist layer pattern by irradiating UV light onto the first resist layer pattern.
15. The method of claim 13, comprising controlling the line width of the third light shielding layer pattern by varying the length of time the first resist layer pattern is irradiated with UV light, and controlling a line width of the second pattern by varying the line width of the third light shielding layer pattern.
16. The method of claim 10, comprising transferring the second pattern overlappingly with the first pattern.
17. A method of fabricating a photomask, the method comprising:
- forming a first light shielding layer pattern having a first pattern layout over a substrate, wherein the substrate is exposed between adjacent elements of the first light shielding layer pattern;
- forming a first resist layer pattern aligned with the first light shielding layer pattern over the first light shielding layer pattern;
- forming a phase shift region having a groove by selectively etching the exposed portion of the substrate using the first resist layer pattern as an etching mask;
- forming a second resist layer pattern that exposes a portion of the first light shielding layer pattern by reducing a line width of the first resist layer pattern;
- forming a second light shielding layer pattern having a reduced line width by etching the exposed portion of the first light shielding layer pattern using the second resist layer pattern as an etching mask, wherein a portion of the substrate adjacent the groove is exposed to form a rim region; and
- removing the second resist layer pattern to form a photomask comprising a light shielding region defined by the second light shielding layer pattern, the phase shift region, and the rim region.
18. A photomask comprising:
- a substrate;
- a light shielding region formed over the substrate and defined by a light shielding layer pattern having a reduced line width;
- a phase shift region defined by a groove formed in a portion of the substrate exposed between adjacent elements of the light shielding layer pattern; and
- a rim region defined by the portion of the substrate exposed between adjacent elements of the light shielding layer pattern and adjacent the groove.
Type: Application
Filed: Dec 30, 2008
Publication Date: Dec 31, 2009
Patent Grant number: 8003302
Applicant: HYNIX SEMICONDUCTOR INC. (Icheon-si)
Inventor: Jin Ho Ryu (Seoul)
Application Number: 12/346,303
International Classification: G03F 1/00 (20060101); G03F 7/20 (20060101);