Patents by Inventor Jin-Hyuk Yoo

Jin-Hyuk Yoo has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 9214409
    Abstract: Provided is a semiconductor device. The semiconductor device includes a conductive pattern disposed on a semiconductor substrate. First and second conductive lines disposed on the conductive pattern and located at the same level as each other, are provided. An isolation pattern is disposed between the first and second conductive lines. A first vertical structure passing through the first conductive line and conductive pattern is provided. A second vertical structure passing through the second conductive line and conductive patterns is provided. An auxiliary pattern passing through the conductive pattern and in contact with the isolation pattern is provided.
    Type: Grant
    Filed: March 6, 2013
    Date of Patent: December 15, 2015
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Jin-Hyuk Yoo, Dae-Hyun Jang, Yoo-Chul Kong, Kyoung-Sub Shin
  • Publication number: 20130320486
    Abstract: Provided is a semiconductor device. The semiconductor device includes a conductive pattern disposed on a semiconductor substrate. First and second conductive lines disposed on the conductive pattern and located at the same level as each other, are provided. An isolation pattern is disposed between the first and second conductive lines. A first vertical structure passing through the first conductive line and conductive pattern is provided. A second vertical structure passing through the second conductive line and conductive patterns is provided. An auxiliary pattern passing through the conductive pattern and in contact with the isolation pattern is provided.
    Type: Application
    Filed: March 6, 2013
    Publication date: December 5, 2013
    Inventors: Jin-Hyuk YOO, Dae-hyun Jang, Yoo-Chul Kong, Kyoung-Sub Shin
  • Publication number: 20120255601
    Abstract: A hybrid solar cell and a method for manufacturing the same is disclosed, wherein the hybrid solar cell comprises a semiconductor wafer having a predetermined polarity; a first semiconductor layer on one surface of the semiconductor wafer; a second semiconductor layer on the other surface of the semiconductor wafer, wherein the second semiconductor layer is different in polarity from the first semiconductor layer; a first electrode on the first semiconductor layer; a second electrode on the second semiconductor layer; and at least one of first and second interfacial layers, wherein the first interfacial layer containing ZnO is formed between the first semiconductor layer and the first electrode, and the second interfacial layer containing ZnO is formed between the second semiconductor layer and the second electrode, wherein the hybrid solar cell is provided with the interfacial layer between the first semiconductor layer and the first electrode and/or between the second semiconductor layer and the second elec
    Type: Application
    Filed: January 1, 2010
    Publication date: October 11, 2012
    Inventor: Jin Hyuk Yoo
  • Publication number: 20120204943
    Abstract: A hybrid solar cell is disclosed, which is capable of preventing a defect from occurring in a surface of a semiconductor wafer when forming a thin-film type semiconductor layer on the semiconductor wafer, to thereby improve cell efficiency by the increase of open-circuit voltage, the hybrid solar cell comprising a semiconductor wafer having a predetermined polarity; a first semiconductor layer on one surface of the semiconductor wafer; a second semiconductor layer on the other surface of the semiconductor wafer, wherein the second semiconductor layer is different in polarity from the first semiconductor layer; a first electrode on the first semiconductor layer; and a second electrode on the second semiconductor layer; wherein the first semiconductor layer comprises a lightly doped first semiconductor layer on one surface of the semiconductor wafer; and a highly doped first semiconductor layer on the lightly doped first semiconductor layer.
    Type: Application
    Filed: January 1, 2010
    Publication date: August 16, 2012
    Inventor: Jin Hyuk Yoo
  • Patent number: 8039406
    Abstract: A method of filling a gap on a substrate comprises disposing the substrate, on which the gap is formed, on a susceptor in a chamber; applying a source power to the chamber to generate plasmas into the chamber; supplying a process gas into the chamber; filling a thin film into a gap by applying a first bias power to the susceptor, an amplitude of the first bias power being periodically modulated; stopping supply of the process gas and cutting off the first bias power; and extinguish the plasmas in the chamber.
    Type: Grant
    Filed: September 13, 2009
    Date of Patent: October 18, 2011
    Assignee: Jusung Engineering Co., Ltd.
    Inventors: Jeong Hoon Han, Jin Hyuk Yoo, Young Rok Kim
  • Patent number: 8017485
    Abstract: Methods of fabricating a semiconductor device are provided, the methods include forming a first dielectric layer, a data storage layer, and a second dielectric layer, which are sequentially stacked, on a semiconductor substrate. A mask having a first opening exposing a first region of the second dielectric layer is formed on the second dielectric layer. A gate electrode filling at least a portion of the first opening is formed. A second opening exposing a second region of the second dielectric layer is formed by etching the mask such that the second region is spaced apart from the first region. A second dielectric pattern and a data storage pattern are formed by sequentially etching the exposed second region of the second dielectric layer and the data storage layer. The second dielectric pattern is formed to have a greater width than a lower surface of the gate electrode.
    Type: Grant
    Filed: October 20, 2009
    Date of Patent: September 13, 2011
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Du-Hyun Cho, Tae-Hyuk Ahn, Sang-Sup Jeong, Jin-Hyuk Yoo
  • Patent number: 7866341
    Abstract: An apparatus includes a transfer unit under an atmospheric condition and having a robot therein; and at least one process chamber connected to one side of the transfer unit with a slot valve there between, and being alternately under a vacuum condition and under an atmospheric condition.
    Type: Grant
    Filed: February 25, 2010
    Date of Patent: January 11, 2011
    Assignee: Jusung Engineering Co., Ltd.
    Inventors: Hong-Seub Kim, Hyun-Soo Park, Soon-Bin Jung, Sung-Ho Cha, Dong-Jin Kim, Wook-Jung Hwang, Jin-Hyuk Yoo
  • Publication number: 20100215513
    Abstract: An apparatus includes a transfer unit under an atmospheric condition and having a robot therein; and at least one process chamber connected to one side of the transfer unit with a slot valve there between, and being alternately under a vacuum condition and under an atmospheric condition.
    Type: Application
    Filed: February 25, 2010
    Publication date: August 26, 2010
    Applicant: JUSUNG ENGINEERING CO., LTD.
    Inventors: Hong-Seub KIM, Hyun-Soo PARK, Soon-Bin JUNG, Sung-Ho CHA, Dong-Jin KIM, Wook-Jung HWANG, Jin-Hyuk YOO
  • Publication number: 20100099248
    Abstract: Methods of fabricating a semiconductor device are provided, the methods include forming a first dielectric layer, a data storage layer, and a second dielectric layer, which are sequentially stacked, on a semiconductor substrate. A mask having a first opening exposing a first region of the second dielectric layer is formed on the second dielectric layer. A gate electrode filling at least a portion of the first opening is formed. A second opening exposing a second region of the second dielectric layer is formed by etching the mask such that the second region is spaced apart from the first region. A second dielectric pattern and a data storage pattern are formed by sequentially etching the exposed second region of the second dielectric layer and the data storage layer. The second dielectric pattern is formed to have a greater width than a lower surface of the gate electrode.
    Type: Application
    Filed: October 20, 2009
    Publication date: April 22, 2010
    Inventors: Du-Hyun Cho, Tae-Hyuk Ahn, Sang-Sup Jeong, Jin-Hyuk Yoo
  • Patent number: 7695231
    Abstract: An apparatus includes a transfer unit under an atmospheric condition and having a robot therein; and at least one process chamber connected to one side of the transfer unit with a slot valve there between, and being alternately under a vacuum condition and under an atmospheric condition.
    Type: Grant
    Filed: March 8, 2005
    Date of Patent: April 13, 2010
    Assignee: JUSUNG Engineering Co., Ltd.
    Inventors: Hong-Seub Kim, Hyun-Soo Park, Soon-Bin Jung, Sung-Ho Cha, Dong-Jin Kim, Wook-Jung Hwang, Jin-Hyuk Yoo
  • Publication number: 20100031886
    Abstract: A method of filling a gap on a substrate comprises disposing the substrate, on which the gap is formed, on a susceptor in a chamber; applying a source power to the chamber to generate plasmas into the chamber; supplying a process gas into the chamber; filling a thin film into a gap by applying a first bias power to the susceptor, an amplitude of the first bias power being periodically modulated; stopping supply of the process gas and cutting off the first bias power; and extinguish the plasmas in the chamber.
    Type: Application
    Filed: September 13, 2009
    Publication date: February 11, 2010
    Applicant: JUSUNG Engineering Co., Ltd.
    Inventors: Jeong Hoon Han, Jin Hyuk Yoo, Young Rok Kim
  • Patent number: 7605084
    Abstract: A method of filling a gap on a substrate comprises disposing the substrate, on which the gap is formed, on a susceptor in a chamber; applying a source power to the chamber to generate plasmas into the chamber; supplying a process gas into the chamber; filling a thin film into a gap by applying a first bias power to the susceptor, an amplitude of the first bias power being periodically modulated; stopping supply of the process gas and cutting off the first bias power; and extinguish the plasmas in the chamber.
    Type: Grant
    Filed: May 9, 2007
    Date of Patent: October 20, 2009
    Assignee: Jusung Engineering Co., Ltd.
    Inventors: Jeong-Hoon Han, Jin-Hyuk Yoo, Young-Rok Kim
  • Publication number: 20070264791
    Abstract: A method of filling a gap on a substrate comprises disposing the substrate, on which the gap is formed, on a susceptor in a chamber; applying a source power to the chamber to generate plasmas into the chamber; supplying a process gas into the chamber; filling a thin film into a gap by applying a first bias power to the susceptor, an amplitude of the first bias power being periodically modulated; stopping supply of the process gas and cutting off the first bias power; and extinguish the plasmas in the chamber.
    Type: Application
    Filed: May 9, 2007
    Publication date: November 15, 2007
    Applicant: JUSUNG ENGINEERING CO., LTD.
    Inventors: Jeong Hoon Han, Jin Hyuk Yoo, Young Rok Kim
  • Publication number: 20050196254
    Abstract: An apparatus includes a transfer unit under an atmospheric condition and having a robot therein; and at least one process chamber connected to one side of the transfer unit with a slot valve there between, and being alternately under a vacuum condition and under an atmospheric condition.
    Type: Application
    Filed: March 8, 2005
    Publication date: September 8, 2005
    Applicant: JUSUNG Engineering Co., Ltd.
    Inventors: Hong-Seub Kim, Hyun-Soo Park, Soon-Bin Jung, Sung-Ho Cha, Dong-Jin Kim, Wook-Jung Hwang, Jin-Hyuk Yoo
  • Publication number: 20040237894
    Abstract: An apparatus for a semiconductor device includes: a chamber having upper and lower portions, a volume of the lower portion being greater than a volume of the upper portion; a susceptor in the chamber, the susceptor having a substrate on a top surface thereof; an injector injecting process gases into the chamber; a coil unit over the chamber; a radio frequency power supply connected to the coil unit; and an exhaust through the chamber.
    Type: Application
    Filed: June 1, 2004
    Publication date: December 2, 2004
    Inventors: Jung-Hun Han, Young-Suk Lee, Soon-Bin Jung, Jeong-Beom Lee, Chul-Sik Kim, Chang-Yeop Jeon, Jae-Euk Ko, Young-Rok Kim, Seong-Eun Sim, Yeng-Hyun Lee, Jin-Hyuk Yoo, Dae-Bong Kang