Abstract: A first phase change material layer vertically aligned above a bottom electrode, a dielectric layer vertically aligned above the first phase change material layer, a second phase change material layer vertically aligned above the dielectric layer, an inner electrode physically and electrically connected to the first phase change material layer and the second phase change material layer, the inner electrode surrounded by the dielectric layer, a top electrode vertically aligned above the second phase change material layer. A first phase change material layer vertically aligned above a bottom electrode, a filament layer vertically aligned above the first phase change material layer, a second phase change material layer vertically aligned above the filament layer, an inner break in the filament layer connecting the first phase change material layer and the second phase change material layer, a top electrode vertically aligned above the second phase change material layer.

Abstract: A resistive random access memory device comprises: a bottom electrode; a bottom layer of dielectric material formed on the bottom electrode; a plurality of conductive contacts extending from the bottom electrode through the bottom layer of dielectric material; a top layer of dielectric material formed on the bottom layer of dielectric material and on the conductive contacts; a top electrode on the top layer of dielectric material; and at least one filament extending from the plurality of conductive contacts through the top layer of dielectric material to the top electrode.

Abstract: A phase change memory device that includes a composite phase change material layer comprising a mixture of a dispersed phase of a projection material of a first resistivity, and a matrix of a phase-change material of a second resistivity or third resistivity dependent on phase. The first resistivity of the projection material has a resistance that is greater than the second resistance for the phase change material, and is less than the third resistance of the phase change material. The phase change memory device further includes a first electrode; and a second electrode on opposing faces of the composite phase change material layer. The projection material forms a percolated conducting path from the first electrode to the second electrode.

Abstract: An integrated circuit includes a field effect transistor (FET) and a phase change memory (PCM) cell. The PCM cell includes a heater, wherein a bottom surface of the heater is at or below a top surface of the FET.

Abstract: Embodiments of present invention provide a vertical magnetic tunnel junction (MTJ) structure. The structure includes an L-shaped MTJ stack including an L-shaped reference layer conformally on an L-shaped performance enhancing layer; an L-shaped tunnel barrier layer conformally on the L-shaped reference layer; and an L-shaped free layer conformally on the L-shaped tunnel barrier layer, where a vertical portion of the L-shaped MTJ stack is adjacent to a sidewall of a metal stud, the metal stud being directly on top of a metal wire in a dielectric layer. The structure further includes a first and a second electrode contacting a horizontal portion and a vertical portion of the L-shaped MTJ stack. A method of forming the same is also provided.

Abstract: An electrical device includes a first electrode in series with a second electrode. A phase change memory (PCM) is in series with the second electrode. A variable electrical element is in series with the phase change memory.

Abstract: A computer memory device includes a bottom electrode, a top electrode, and a memory component arranged between the top electrode and the bottom electrode. The memory component is made of a dielectric solid-state material and is in direct contact with the top electrode and the bottom electrode. The computer memory device further includes a proximity heater configured to increase a temperature of a portion of the memory component. The computer memory device further includes a layer of dielectric material in direct contact with the proximity heater. The layer of dielectric material is in direct contact with one of the bottom electrode and the top electrode.

Abstract: A method of making a mobile ion regulated device includes stacking a dielectric layer on a substrate. Mobile ions are placed within the dielectric layer. An electrode layer is provided on the dielectric layer. The mobile ions are directed to a designated area of the dielectric layer.

Abstract: Embodiments of present invention provide a magnetic tunnel junction (MTJ) structure. The MTJ structure includes a MTJ stack, the MTJ stack including a tunnel barrier layer on a reference layer and a free layer on the tunnel barrier layer, wherein the free layer includes multiple sub free layers, the multiple sub free layers being multiple ferromagnetic strips placed parallel to each other on the tunnel barrier layer, the multiple ferromagnetic strips having respective first ends connected to a first electrode and respective second ends connected to a second electrode. A method of forming the MTJ structure is also provided.

Abstract: An integrated circuit includes a field effect transistor (FET) and a phase change memory (PCM) cell. The PCM cell includes a heater, wherein a bottom surface of the heater is at or below a top surface of the FET.

Abstract: A method for power saving and encryption during analysis of media captured by an information capture device using a partitioned neural network includes replicating, by an information capture device, an artificial neural network (ANN) from a computer server to the information capture device. The ANN on the computer server and a replicated ANN, both, include M layers. The method further includes, in response to captured data being input to be processed, partially processing, by the information capture device, the captured data by executing a first k layers using the replicated ANN, wherein only the k layers are selected to execute on the information capture device. The method further includes transmitting, by the information capture device, an output of the k-th layer to the computer server, which partially processes the captured data by executing the remainder of the M layers using the ANN and the output of the k-th layer.

Abstract: A semiconductor integrated circuit device includes: an active bridge; a first chiplet and a second chiplet mounted onto the active bridge; and a short-to-long converter circuit (SLCC) that has analog and digital portions. The active bridge includes at least the analog portion of the SLCC, which is electrically connected to at least the first chiplet; and a short-reach physical layer that electrically connects the first chiplet and the second chiplet. The first chiplet includes a first logic core; a first chiplet interface that is electrically connected between the first logic core and the SLCC; and a second chiplet interface that is electrically connected between the first logic core and the second chiplet. The second chiplet includes a second logic core; and a third chiplet interface that is electrically connected between the second logic core and the second chiplet interface. The active bridge also can include a built-in-self-test (BIST) circuit.

Abstract: A structure including alternating layers of phase change material layers and dielectric encapsulated heater element layers, the alternating layers of phase change material layers and the dielectric encapsulated heater element layers are sandwiched between a first electrode and a second electrode. A structure including horizontally aligned alternating layers of phase change material layers and dielectric encapsulated heater element layers, the alternating layers of phase change material layers and the dielectric encapsulated heater element layers are sandwiched between a first electrode and a second electrode. A method including forming alternating layers of phase change material layers and dielectric encapsulated heater element layers, the alternating layers of phase change material layers and the dielectric encapsulated heater element layers are sandwiched between a first electrode and a second electrode.

Abstract: A memory device and method of forming a projection liner under a mushroom phase change memory device with sidewall electrode process scheme to provide self-aligned patterning of resistive projection liner during sidewall electrode formation.

Abstract: A phase change memory cell for a semiconductor device that includes a heater element on a first conductive layer with a spacer surrounding sides of the heater element. The phase change memory cell includes a first dielectric layer on the conductive layer and on a bottom portion of the spacer surrounding the heater element and a second dielectric layer on the first dielectric layer surrounding a top portion of the heater element. The phase change memory cell includes a phase change material on a top surface of the heater element and on the second dielectric material.

Abstract: A phase change memory (PCM) cell comprises a first electrode comprised of a first electrically conductive material, a second electrode comprised of a second electrically conductive material, a first phase change layer positioned between the first electrode and the second electrode and being comprised of a first phase change material, and a second phase change layer positioned between the first electrode and the second electrode and being comprised of a second phase change material. The first phase change material has a first resistivity, the second phase change material has a second resistivity, and wherein the first resistivity is at least two times the second resistivity.

Abstract: Memory cells and methods of forming the same include forming a hole in an interlayer dielectric to expose an end of a conductive top electrode. A phase change material is conformally deposited on surfaces of the hole. A remaining portion of the hole is filled with a dielectric material after conformally depositing the phase change material.

Abstract: A structure comprising a top electrode and a bottom electrode. The structure further comprises a multilayer stack disposed between the top electrode and the bottom electrode, where the multilayer stack comprises alternating confinement layers and phase-change material layers, and where at least two of the phase-change material layers have different doping concentrations of at least one dopant.

Abstract: A structure including an inner electrode and an outer electrode on a substrate and a phase change material layer, the phase change material layer vertically aligned above both the inner electrode and the outer electrode. A structure including an inner electrode and an outer electrode on a substrate and a phase change material layer, the phase change material layer vertically aligned above both the inner electrode and the outer electrode, where the inner electrode and the outer electrode are on the same horizontal plane. A method including forming an inner electrode and an outer electrode simultaneously on a substrate, forming a phase change material layer above both the inner electrode and the outer electrode.

Abstract: A first phase change material layer vertically aligned above a bottom electrode, a dielectric layer vertically aligned above the first phase change material layer, a second phase change material layer vertically aligned above the dielectric layer, an inner electrode physically and electrically connected to the first phase change material layer and the second phase change material layer, the inner electrode surrounded by the dielectric layer, a top electrode vertically aligned above the second phase change material layer. A first phase change material layer vertically aligned above a bottom electrode, a filament layer vertically aligned above the first phase change material layer, a second phase change material layer vertically aligned above the filament layer, an inner break in the filament layer connecting the first phase change material layer and the second phase change material layer, a top electrode vertically aligned above the second phase change material layer.