Patents by Inventor Jin Tae Kim

Jin Tae Kim has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • METHOD FOR MANUFACTURING TRANSPARENT PATTERN PRINT STEEL PLATE
    Publication number: 20170354991
    Abstract: A method of manufacturing a transparent pattern printed steel plate includes forming a printed paint film layer by jetting transparent ink onto at least one surface of a steel plate, and curing the printed paint film layer with ultraviolet light to form a cured printed paint film layer. Further, a method of manufacturing a transparent pattern printed steel plate includes preparing a steel plate having a color painted film layer formed on at least one surface thereof, forming a printed paint film layer by jetting transparent ink onto the color painted film layer, and curing the printed paint film layer to form a cured printed paint film layer.
    Type: Application
    Filed: August 19, 2015
    Publication date: December 14, 2017
    Inventors: Jin-Tae KIM, Jong-Sang KIM, Bong-Woo HA, Yang-Ho CHOI, Jung-Hwan LEE, Ha-Na CHOI, Jong-Kook KIM
  • CORRECTIVE LENS FOR VIEWING TARGET LOCATED AT EXTREMELY SHORT DISTANCE
    Publication number: 20170336599
    Abstract: The present invention relates to a corrective lens for viewing a target located at an extremely short distance from the human eye, for example, a display of a head-mounted display (HMD), (hereinafter, called “a target”), namely, for viewing a target that is located at an extremely short distance of 10 mm 100 mm from the center of the pupil (the ‘extremely short distance’ means a distance of 10 mm˜100 mm in the present invention). The corrective lens for viewing a target located at an extremely short distance has S+18 D˜+50 D; C±0.00 D Ax 0°˜360° to C±6.00 D Ax 0°˜360°; and prismatic power of 0˜8?, wherein the corrective lens is provided in front of the display of the head-mounted display (HMD).
    Type: Application
    Filed: October 20, 2016
    Publication date: November 23, 2017
    Inventor: Jin-Tae KIM
  • STANDARD CELL FOR REMOVING ROUTING INTERFERENCE BETWEEN ADJACENT PINS AND DEVICE INCLUDING THE SAME
    Publication number: 20170294430
    Abstract: An integrated circuit including a first standard cell including, first transistors, the first transistors being first unfolded transistors, a first metal pin, a second metal pin, and a third metal pin on a first layer, the first metal pin and the second metal pin having a first minimum metal center-to-metal center pitch therebetween less than or equal to 80 nm, a fourth metal pin and a fifth metal pin at a second layer, the fourth metal pin and the fifth metal pin extending in a second direction, the second direction being perpendicular to the first direction, a first via between the first metal pin and the fourth metal pin, and a second via between the third metal pin and the fifth metal pin such that a first via center-to-via center space between the first via and the second via is greater than double the first minimum metal center-to-metal center pitch.
    Type: Application
    Filed: October 20, 2016
    Publication date: October 12, 2017
    Applicant: Samsung Electronics Co., Ltd.
    Inventors: Jae-Woo SEO, Jin Tae KIM, Tae Joong SONG, Hyoung-Suk OH, Keun Ho LEE, Dal Hee LEE, Sung We CHO
  • ELECTROSTATIC DISCHARGE PROTECTION DEVICE
    Publication number: 20170256533
    Abstract: An electrostatic discharge (ESD) protection device includes a substrate including a plurality of fins extending in a first direction, with an insulation layer on the fins. A gate electrode extending in a second direction, an electrode pattern of a capacitor, and a resistor are on the insulation layer. A drain is on a first side of the gate electrode, and a source is on a second side of the gate electrode. A connection structure electrically connects the electrode pattern, the gate electrode and the resistor. The electrode pattern is on the first side or the second side of the gate electrode, and the resistor is on the other of the first side or the second side. At least a portion of the resistor extends in the second direction.
    Type: Application
    Filed: May 24, 2017
    Publication date: September 7, 2017
    Applicant: Samsung Electronics Co., Ltd.
    Inventors: Jae-Hyun YOO, Jin-Tae KIM, Jong-Sung JEON
  • Integrated circuit and method of designing layout of the same
    Patent number: 9734276
    Abstract: A method of designing a layout of an integrated circuit (IC) includes: preparing a standard cell library that stores a first standard cell and a second standard cell, each of the first standard cell and the second standard cell including a plurality of conductive lines that extend in a first direction, placing the first standard cell and the second standard cell to be adjacent to each other in a first boundary parallel to the plurality of conductive lines, and generating a decoupling capacitor by using at least one first conductive line of the plurality of conductive lines when a same voltage is applied to a first pattern adjacent to the first boundary in the first standard cell and a second pattern adjacent to the first boundary in the second standard cell, the at least one first conductive line being adjacent to the first boundary.
    Type: Grant
    Filed: October 6, 2015
    Date of Patent: August 15, 2017
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Jin-tae Kim, Chang-beom Kim
  • Method for designing layout of semiconductor device and method for manufacturing semiconductor device using the same
    Patent number: 9698056
    Abstract: A method of manufacturing a semiconductor device includes providing pre-conductive lines and post-conductive lines for forming a first logic cell and a second logic cell, which are adjacent to each other, and a dummy cell and a third logic cell, which are adjacent to each other. A first conductive line, adjacent to the second logic cell, from among conductive lines of the first logic cell is spaced a first reference distance apart from a second conductive line, adjacent to the first logic cell, from among conductive lines of the second logic cell. A dummy line, which is adjacent to the third logic cell, from among conductive lines of the dummy cell is spaced a second reference distance apart from a third conductive line, which is adjacent to the dummy cell, from among conductive lines of the third logic cell. The second reference distance is greater than the first reference distance.
    Type: Grant
    Filed: April 8, 2016
    Date of Patent: July 4, 2017
    Assignee: SAMSUNG ELECTRONICS., LTD.
    Inventors: Ha-Young Kim, Jin Tae Kim, Jae-Woo Seo, Dong-yeon Heo
  • Electrostatic discharge protection device
    Patent number: 9679886
    Abstract: An electrostatic discharge (ESD) protection device includes a substrate including a plurality of active fins and a plurality of grooves. The ESD protection device includes an insulation layer on the active fins and the grooves, and a gate electrode on the active fins. The ESD protection device includes a first impurity region adjacent to a first side of the gate electrode, and a second impurity region adjacent to a second side of the gate electrode. The second side of the gate electrode may be arranged opposite to the first side. The ESD protection device includes an electrode pattern of a capacitor overlapping the first impurity region, a resistor overlapping the second impurity region, and a connection structure electrically connecting the electrode pattern, the gate electrode, and the resistor to each other.
    Type: Grant
    Filed: October 8, 2014
    Date of Patent: June 13, 2017
    Assignee: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Jae-Hyun Yoo, Jin-Tae Kim, Jong-Sung Jeon
  • Reader control system
    Patent number: 9679172
    Abstract: An RFID reader control system and method is provided. A protocol for controlling an RFID reader and an RFID reader control unit of a mobile phone is defined. Messages, information, commands, responses, and notification are constructed and transmitted between the RFID reader and the RFID reader control unit.
    Type: Grant
    Filed: March 12, 2014
    Date of Patent: June 13, 2017
    Assignee: LG ELECTRONICS INC.
    Inventors: Seung Hyup Ryoo, Jin Tae Kim, Sang Cheol Min, Hee Seung Kim, Jae Joon Park, Dong Hyun Lee, Yong Sam Kim
  • Reader control system
    Patent number: 9672395
    Abstract: An RFID reader control system and method is provided. A protocol for controlling an RFID reader and an RFID reader control unit of a mobile phone is defined. Messages, information, commands, responses, and notification are constructed and transmitted between the RFID reader and the RFID reader control unit.
    Type: Grant
    Filed: March 12, 2014
    Date of Patent: June 6, 2017
    Assignee: LG ELECTRONICS INC.
    Inventors: Seung Hyup Ryoo, Jin Tae Kim, Sang Cheol Min, Hee Seung Kim, Jae Joon Park, Dong Hyun Lee, Yong Sam Kim
  • Method and program for designing integrated circuit
    Patent number: 9665678
    Abstract: A method of designing an integrated circuit includes a processor receiving input data initially-defining the integrated circuit using a plurality of first standard cells designed to optimize a performance or yield characteristic. The processor substitutes at least one second standard cell designed to optimize a different performance or yield characteristic from that for which the first standard cells were optimized for a corresponding one of the first standard cells. The processor generates output data defining the integrated circuit including the second standard cell. The substituted second standard cell has the same function as the corresponding first standard cell for which it was substituted.
    Type: Grant
    Filed: June 19, 2015
    Date of Patent: May 30, 2017
    Assignee: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Sung-we Cho, Dal-hee Lee, Ha-young Kim, Jae-woo Seo, Jin-tae Kim
  • Layout design system for generating layout design of semiconductor device
    Patent number: 9659130
    Abstract: According to example embodiments, a layout design system includes a processor, a storage module configured to store a standard cell design, and a generation module. The standard cell design includes an active area and a normal gate area on the active area. The generation module is configured to receive the standard cell design, to adjust a width of an active cut design crossing the active area of the standard cell design, and to output a chip design including a design element using the processor. The design element includes the active cut design having the width adjusted.
    Type: Grant
    Filed: October 23, 2014
    Date of Patent: May 23, 2017
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Jin-Tae Kim, Jae-Woo Seo
  • Photo detector
    Patent number: 9614110
    Abstract: Disclosed is a photo detector. The photo detector includes: a conductive substrate; an insulating layer formed on the conductive substrate; a single-layer graphene formed at one part of an upper end of the insulating layer and formed in one layer; a multi-layer graphene formed at the other part of the upper end of the insulating layer and formed in multiple layers; a first electrode formed at an end of the single-layer graphene; and a second electrode formed at an end of the multi-layer graphene.
    Type: Grant
    Filed: March 16, 2016
    Date of Patent: April 4, 2017
    Assignee: ELECTRONICS AND TELECOMMUNICATIONS RESEARCH INSTITUTE
    Inventors: Jin Tae Kim, Choon Gi Choi, Young Jun Yu, Kwang Hyo Chung, Jin Sik Choi, Hong Kyw Choi
  • GAS SENSOR AND METHOD OF MANUFACTURING THE SAME
    Publication number: 20170045473
    Abstract: Provided herein is a gas sensor that includes a substrate, an insulating layer provided on the substrate, a first active layer disposed on the insulating layer, a second active layer which is disposed on the insulating layer and undergoes heterojunction with a portion of the first active layer, a first electrode and a second electrode which are disposed on the first active layer and are spaced apart from each other at a predetermined interval, and a third electrode and a fourth electrode which are disposed on the second active layer and are spaced apart from each other at a predetermined interval. The first active layer and the second active layer include different materials.
    Type: Application
    Filed: June 23, 2016
    Publication date: February 16, 2017
    Applicant: ELECTRONICS AND TELECOMMUNICATIONS RESEARCH INSTITUTE
    Inventors: Young-Jun YU, Hong Kyw CHOI, Choon Gi CHOI, Jin Tae KIM, Young Kyu CHOI, Jin Sik CHOI
  • METHOD OF DRIVING A DISPLAY PANEL AND A DISPLAY APPARATUS FOR PERFORMING THE SAME
    Publication number: 20170032730
    Abstract: A display panel includes a plurality of pixels arranged in a matrix, each of the pixels including a high sub-pixel and a low sub-pixel. A method of driving the display panel may include detecting a first pixel which corresponds to a first pattern in an image, and changing a gray scale value of the high or low sub-pixel of a second pixel which is adjacent to the first pixel.
    Type: Application
    Filed: January 13, 2016
    Publication date: February 2, 2017
    Inventors: Yeun-Mo Yeon, Seung-Hyun Ko, Choong-Yull Kwak, Dal-Jung Kwon, Jin-Tae Kim, Se-Young Oh
  • Coated steel sheet having superior welding, scratch-resistance, and corrosion-resistance properties
    Patent number: 9534143
    Abstract: Provided is a resin composition for an under coat of an UV coating layer and a coated steel sheet using the resin composition. The coated steel sheet comprises a material steel sheet; an under coat layer including a cured product of a resin composition for the under coat layer which contains a main resin and a metal powder, the under coat layer being formed on one side or both sides of the material steel sheet; and a top coat layer formed on the under coat layer and containing a radical compound, thereby providing a superior appearance, scratch resistance, corrosion resistance and superior weldability.
    Type: Grant
    Filed: October 25, 2012
    Date of Patent: January 3, 2017
    Assignee: POSCO
    Inventors: Hye Jin Yoo, Jin Ho Jung, Jung Su Kim, Bong Woo Ha, Chang Se Byeon, Jung Hwan Lee, Jong-Sang Kim, Jin Tae Kim
  • Layout design system providing extended active area in filler design and semiconductor device fabricated using the system
    Patent number: 9514260
    Abstract: A layout design system includes a storage unit storing first and second standard cell designs, and a displacement module that arranges the first and second standard cell designs to generate an intermediate design in accordance with the chip design requirement. A first area for the first standard cell design and a second area for the second standard cell design are separated in the intermediate design by a filler design having no active area. Extended active areas are formed in the filler design in relation to the first standard cell design and second standard cell design.
    Type: Grant
    Filed: September 2, 2014
    Date of Patent: December 6, 2016
    Assignee: Samsung Electronics Co., Ltd.
    Inventor: Jin-Tae Kim
  • Nanoplatelet-type zirconium phosphate and method for preparing same
    Patent number: 9481936
    Abstract: A platelet-type zirconium phosphate, which has a P—OH group contained in a structure thereof, and has a crystalline peak at a 2? value of 11.6±2 degrees and no crystalline peak at a 2? value of less than 11.6±2 degrees in X-ray diffraction analysis, is provided. The platelet-type zirconium phosphate has a platelet-type structure and can be uniformly dispersed at a nanoscale level in a coating film to exhibit excellent surface gloss and barrier capability. Also, the platelet-type zirconium phosphate can exhibit excellent corrosion resistance due to the presence of the P—OH group on a surface thereof, and can be dispersed not only in an aqueous solution but also in an organic solvent.
    Type: Grant
    Filed: December 27, 2011
    Date of Patent: November 1, 2016
    Assignee: POSCO
    Inventors: Bongwoo Ha, Jin Tae Kim, Jong Sang Kim, Yang-Ho Choi
  • PHOTO DETECTOR
    Publication number: 20160308077
    Abstract: Disclosed is a photo detector. The photo detector includes: a conductive substrate; an insulating layer formed on the conductive substrate; a single-layer graphene formed at one part of an upper end of the insulating layer and formed in one layer; a multi-layer graphene formed at the other part of the upper end of the insulating layer and formed in multiple layers; a first electrode formed at an end of the single-layer graphene; and a second electrode formed at an end of the multi-layer graphene.
    Type: Application
    Filed: March 16, 2016
    Publication date: October 20, 2016
    Applicant: ELECTRONICS AND TELECOMMUNICATIONS RESEARCH INSTIT UTE
    Inventors: Jin Tae KIM, Choon Gi CHOI, Young Jun YU, Kwang Hyo CHUNG, Jin Sik CHOI, Hong Kyw CHOI
  • Platelet-Type Zirconium Phosphate and Method for Preparing Same
    Publication number: 20160244886
    Abstract: A platelet-type zirconium phosphate, which has a P—OH group contained in a structure thereof, and has a crystalline peak at a 2? value of 11.6±2 degrees and no crystalline peak at a 2? value of less than 11.6±2 degrees in X-ray diffraction analysis, is provided. The platelet-type zirconium phosphate has a platelet-type structure and can be uniformly dispersed at a nanoscale level in a coating film to exhibit excellent surface gloss and barrier capability. Also, the platelet-type zirconium phosphate can exhibit excellent corrosion resistance due to the presence of the P—OH group on a surface thereof, and can be dispersed not only in an aqueous solution but also in an organic solvent.
    Type: Application
    Filed: May 4, 2016
    Publication date: August 25, 2016
    Inventors: Bongwoo Ha, Jin Tae Kim, Jong Sang Kim, Yang-Ho Choi
  • Optical detector
    Patent number: 9425335
    Abstract: Disclosed is an optical detector. The optical detector includes: a first dielectric layer; a graphene optical transmission line formed on the first dielectric layer; a graphene optical detector formed on the first dielectric layer and configured to detect light transmitted along the graphene optical transmission line; electric wires formed on the graphene optical detector; metal pads positioned at both ends of the graphene optical detector and connected with the electric wires; and a second dielectric layer formed on the graphene optical transmission line, in which the graphene optical detector detects an intensity of light incident in a horizontal direction with respect to a surface of the graphene optical transmission line.
    Type: Grant
    Filed: June 6, 2014
    Date of Patent: August 23, 2016
    Assignee: ELECTRONICS AND TELECOMMUNICATIONS RESEARCH INSTITUTE
    Inventors: Jin Tae Kim, Young Jun Yu, Hong Kyw Choi, Choon Gi Choi