Abstract: Disclosed is a battery system, including several parallel-connected battery clusters, each battery cluster being connected to a power conversion system via a battery bus, and any one of battery clusters includes several series-connected battery packs; pack equalizers, corresponding to the battery packs on a one-to-one basis, a first end of the pack equalizer being connected to two ends of a corresponding battery pack, and a second end thereof being connected to a power source; and a cluster equalizer, a first end of the cluster equalizer being connected in series to the battery packs, and a second end thereof being connected to the power source. According to the battery system, the pack equalizer is used between the battery packs to regulate the equalization of the battery packs in each cluster; in addition, each battery cluster is connected to the cluster equalizer to realize equalization regulation of the battery cluster.

Abstract: A method for fabricating a semiconductor device includes the steps of: forming a first inter-metal dielectric (IMD) layer on a substrate; forming a contact hole in the first IMD layer; forming a bottom electrode layer in the contact hole; forming a magnetic tunneling junction (MTJ) stack on the bottom electrode layer; and removing the MTJ stack and the bottom electrode layer to form a MTJ on a bottom electrode. Preferably, the bottom electrode protrudes above a top surface of the first IMD layer.

Abstract: A structure of capacitors connected in parallel includes a substrate. A trench embedded in the substrate. Numerous electrode layers respectively conformally fill in and cover the trench. The electrode layers are formed of numerous nth electrode layers, wherein n is a positive integer from 1 to M, and M is not less than 3. The nth electrode layer with smaller n is closer to the sidewall of the trench. When n equals to M, the Mth electrode layer fills in the center of the trench, and the top surface of the Mth electrode is aligned with the top surface of the substrate. A capacitor dielectric layer is disposed between the adjacent electrode layers. A first conductive plug contacts the nth electrode layer with odd-numbered n. A second conductive plug contacts the nth electrode layer with even-numbered n.

Abstract: A method for controlling a device for automatically adjusting an airway opening body position is provided. The device includes a horizontal base plate, a head support block, a back support plate, a neck support apparatus, a head cover assembly, and a programmable logic controller (PLC). The neck support apparatus is positioned between the head support block and the back support plate. The PLC is configured to controls a stroke of an electric cylinder according to the following equations: ?=1.235?+?, and ?=KX+B+C, where ? is a body position angle, the body position angle is an angle between a positive projection line of a connecting line from a mandibular angle to an external acoustic meatus on a symmetrical surface of a human body and the back support plate, and ? is a preset value ranging from 90° to 100°.

Abstract: A structure of capacitors connected in parallel includes a substrate. A trench embedded in the substrate. Numerous electrode layers respectively conformally fill in and cover the trench. The electrode layers are formed of numerous nth electrode layers, wherein n is a positive integer from 1 to M, and M is not less than 3. The nth electrode layer with smaller n is closer to the sidewall of the trench. When n equals to M, the Mth electrode layer fills in the center of the trench, and the top surface of the Mth electrode is aligned with the top surface of the substrate. A capacitor dielectric layer is disposed between the adjacent electrode layers. A first conductive plug contacts the nth electrode layer with odd-numbered n. A second conductive plug contacts the nth electrode layer with even-numbered n.

Abstract: Systems and methods for preventing the fraudulent sending of data from a computer application to a malicious third party are disclosed. In one embodiment, a method for preventing a computer application from sending data to an unauthorized website may include: (1) receiving, at a computer application executed by an electronic device and from a first website, an identification of a second website for receiving data from the computer application; (2) providing, by the computer application and to a certificate authority, the identification of the second website, wherein the certificate authority validates that the second website is on a list of allowed websites for the first website; (3) receiving, by the computer application and from the certificate authority, validation; and (4) communicating, by the computer application, the data to the second website.

Abstract: Methods of analyzing cells, including interactions among different populations of cells. Methods include cell-containing liquid droplets with oligonucleotide-containing liquid droplets, hybridizing oligonucleotides to target nucleic acids from cells, extending the hybridized oligonucleotides on the target nucleic acids into cell identifier sequences on the target nucleic acids, and thereby identifying the type of cells initially present. The methods can be implemented in a high-throughput manner in a microfluidic system.

Abstract: The present disclosure relates to the field of medicines, in particular to the use of IGSF10 in the preparation of a bone tissue regeneration product, especially the use of IGSF10 in combination with BMP in the preparation of a product for promoting bone tissue regeneration. The product includes a periodontal bone defect repair product, a jaw bone defect repair product and/or a skull defect repair product. The new use of IGSF10 of the present disclosure can reduce the effective concentration of BMP without obvious adverse reactions, thereby exploring a method to promote bone tissue regeneration and providing new ideas for the treatment of bone defects.

Abstract: Methods and structures of a three-dimensional memory device are disclosed. In an example, the memory device includes a substrate having one or more first recesses in a first region and one or more second recesses in a second region. A liner layer is disposed over the sidewalls and bottom of the one or more first recesses in the first region and an epitaxially-grown material is formed in the one or more second recesses in the second region. One or more NAND strings are formed over the epitaxially-grown material disposed in the one or more second recesses, and one or more vertical structures are formed over the one or more first recesses in the first region.

Abstract: A method for forming a three-dimensional memory device includes disposing a material layer over a substrate, forming a plurality of channel-forming holes and a plurality of sacrificial holes around the plurality of channel-forming holes in an array-forming region of the material layer, and forming a plurality of semiconductor channels based on the channel-forming holes and at least one gate line slit (GLS) based on at least one of the plurality of sacrificial holes. A location of the at least one GLS overlaps with the at least one of the plurality of sacrificial holes.

Abstract: Methods and structures of a three-dimensional memory device are disclosed. In an example, the memory device includes a substrate having one or more first recesses in a first region and one or more second recesses in a second region. A liner layer is disposed over the sidewalls and bottom of the one or more first recesses in the first region and an epitaxially-grown material is formed in the one or more second recesses in the second region. One or more NAND strings are formed over the epitaxially-grown material disposed in the one or more second recesses, and one or more vertical structures are formed over the one or more first recesses in the first region.

Abstract: Methods and structures of a three-dimensional memory device are disclosed. In an example, the memory device includes a substrate having one or more first recesses in a first region and one or more second recesses in a second region. A liner layer is disposed over the sidewalls and bottom of the one or more first recesses in the first region and an epitaxially-grown material is formed in the one or more second recesses in the second region. One or more NAND strings are formed over the epitaxially-grown material disposed in the one or more second recesses, and one or more vertical structures are formed over the one or more first recesses in the first region.

Abstract: Various embodiments disclose a 3D memory device, including a substrate; a plurality of conductor layers disposed on the substrate; a plurality of NAND strings disposed on the substrate; and a plurality of slit structures disposed on the substrate. The plurality of NAND strings can be arranged perpendicular to the substrate and in a hexagonal lattice orientation including a plurality of hexagons, and each hexagon including three pairs of sides with a first pair perpendicular to a first direction and parallel to a second direction. The second direction is perpendicular to the first direction. The plurality of slit structures can extend in the first direction.

Abstract: Systems and methods for preventing the fraudulent sending of data from a computer application to a malicious third party are disclosed. In one embodiment, a method for preventing a computer application from sending data to an unauthorized website may include: (1) receiving, at a computer application executed by an electronic device and from a first website, an identification of a second website for receiving data from the computer application; (2) providing, by the computer application and to a certificate authority, the identification of the second website, wherein the certificate authority validates that the second website is on a list of allowed websites for the first website; (3) receiving, by the computer application and from the certificate authority, validation; and (4) communicating, by the computer application, the data to the second website.

Abstract: Various embodiments disclose a 3D memory device, including a substrate; a plurality of conductor layers disposed on the substrate; a plurality of NAND strings disposed on the substrate; and a plurality of slit structures disposed on the substrate. The plurality of NAND strings can be arranged perpendicular to the substrate and in a hexagonal lattice orientation including a plurality of hexagons, and each hexagon including three pairs of sides with a first pair perpendicular to a first direction and parallel to a second direction. The second direction is perpendicular to the first direction. The plurality of slit structures can extend in the first direction.

Abstract: Exemplary embodiments provide systems and methods for contactless card-based credentials. According to one embodiment, in a backend information processing apparatus comprising at least one computer processor, a method for provisioning an authentication credential to an electronic device, may include: (1) receiving, from an electronic device associated with a user, card data for a contactless card, an authorization cryptogram, and a challenge response; (2) authenticating the user based on the authorization cryptogram, the card data, and the challenge response; (3) generating and sending a response cryptogram to the electronic device; (4) returning a cardholder account to the electronic device; (5) wherein the electronic device generates a public/private key pair for the electronic device, an online service, and the cardholder account; and (6) wherein the electronic device persists the public/private key pair in secure storage thereon.

Abstract: Embodiments of 3D memory devices and fabricating methods are disclosed. The disclosed 3D memory device comprises: an alternating conductor/dielectric stack on a substrate; a channel hole penetrating the alternating dielectric stack; an epitaxial layer on a bottom of the channel hole and in contact with the substrate; a functional layer covering a sidewall of the channel hole; and a channel structure covering the functional layer, and being in electrical contact with the epitaxial layer through a top surface of the epitaxial layer as well as a sidewall and a bottom surface of a recess in the epitaxial layer.

Abstract: Methods and structures of a three-dimensional memory device are disclosed. In an example, the memory device includes a substrate having one or more first recesses in a first region and one or more second recesses in a second region. A liner layer is disposed over the sidewalls and bottom of the one or more first recesses in the first region and an epitaxially-grown material is formed in the one or more second recesses in the second region. One or more NAND strings are formed over the epitaxially-grown material disposed in the one or more second recesses, and one or more vertical structures are formed over the one or more first recesses in the first region.

Abstract: Methods and structures of a three-dimensional memory device are disclosed. In an example, the memory device includes a substrate having one or more first recesses in a first region and one or more second recesses in a second region. A liner layer is disposed over the sidewalls and bottom of the one or more first recesses in the first region and an epitaxially-grown material is formed in the one or more second recesses in the second region. One or more NAND strings are formed over the epitaxially-grown material disposed in the one or more second recesses, and one or more vertical structures are formed over the one or more first recesses in the first region.

Abstract: Methods and structures of a three-dimensional memory device are disclosed. In an example, the memory device includes a substrate having one or more first recesses in a first region and one or more second recesses in a second region. A liner layer is disposed over the sidewalls and bottom of the one or more first recesses in the first region and an epitaxially-grown material is formed in the one or more second recesses in the second region. One or more NAND strings are formed over the epitaxially-grown material disposed in the one or more second recesses, and one or more vertical structures are formed over the one or more first recesses in the first region.