Abstract: A semiconductor device includes an active pattern extending in a first direction on a substrate, a gate structure on the active pattern and having a gate electrode extending in a second direction intersecting the active pattern, and a gate capping pattern on the gate electrode, the gate capping pattern including a gate capping liner defining a gate capping recess, the gate capping liner having a horizontal portion along an upper surface of the gate electrode, and a vertical portion extending from the horizontal portion in a third direction intersecting the first and second directions, and a gate capping filling film on the gate capping liner and filling the gate capping recess, an epitaxial pattern on the active pattern and adjacent the gate structure, a gate contact on and connected to the gate electrode, and an active contact on and connected to the epitaxial pattern.

Abstract: A method for providing by a server a manufacturing and distribution platform connecting a product buyer and a product seller is provided. The method comprises providing basic disclosed information of multiple sellers to an accessing buyer terminal, receiving information of candidate sellers selected by the buyer terminal, and providing an interface screen of a private chat room which allows the buyer terminal and each candidate seller terminal to exchange manufacturing confidential information related to a product and a company. The private chat room connects the buyer terminal and the candidate sellers one-on-one and each private chat room provided to each of the candidate sellers is maintained or closed according to each step of a contracting procedure set by the buyer terminal.

Abstract: Disclosed is a semiconductor device including a substrate including first and second active regions, a device isolation layer on the substrate and defining first and second active patterns, first and second gate electrodes running across the first and second active regions and aligned with each other, first and second source/drain patterns on the first and second active patterns, a first active contact connecting the first and second source/drain patterns to each other, and a gate cutting pattern between the first and second gate electrodes. An upper portion of the first active contact includes first and second upper dielectric patterns. The first active contact has a minimum width at a portion between the first and second upper dielectric patterns. A minimum width of the gate cutting pattern is a second width. A ratio of the first width to the second width is in a range of 0.8 to 1.2.

Abstract: A semiconductor device includes an active pattern extending in a first horizontal direction on a substrate, a gate electrode extending in a second horizontal direction across the active pattern, and including a first portion, and a second portion protruding upward from the first portion in a vertical direction, a capping pattern extending in the second horizontal direction on the gate electrode, and a gate contact disposed on the second portion of the gate electrode, overlapping the active pattern, and penetrating the capping pattern to connect the gate electrode.

Abstract: Proposed is a peptide for skin anti-aging and anti-wrinkle, comprising a glycine-histidine-lysine tripeptide and polyarginine linked to the carboxy-terminus of the tripeptide, and a composition for skin anti-aging and anti-wrinkle comprising the peptide. The peptide and composition may enter the cytoplasm more rapidly and efficiently than a conventional GHK tripeptide, and may exhibit skin anti-aging and anti-wrinkle effects similar to those of the GHK tripeptide even at a lower concentration than that of the GHK tripeptide.

Abstract: A semiconductor device is provided. The semiconductor device includes a substrate, an active pattern extending in a first direction on the substrate, a gate electrode extending in a second direction intersecting the first direction on the active pattern, a gate spacer extending in the second direction along side walls of the gate electrode, an interlayer insulating layer contacting side walls of the gate spacer, a trench formed on the gate electrode in the interlayer insulating layer, a first capping pattern provided along side walls of the trench, at least one side wall of the first capping pattern having an inclined profile, and a second capping pattern provided on the first capping pattern in the trench.

Abstract: A sub battery for easily charging includes: a battery body including a first surface facing toward a first direction and a second surface facing toward a second direction opposite the first direction, and an opening formed on at least a portion between the first and second surfaces; a holder having a charging connector cable attachably and detachably fixed thereto, and movably disposed in the opening; and a locking device mounted between the holder and the battery body to fix the holder to the battery body in a closed state, and to unlock the holder according to a movement of the holder by a first distance.

Abstract: A memory device may include a memory medium and a memory controller. The memory medium may be configured to perform a self-refresh operation and an auto-refresh operation in response to a self-refresh signal and an auto-refresh control signal, respectively. The memory controller may be configured to control the auto-refresh operation by transmitting the auto-refresh control signal to the memory medium. The memory medium includes a self-refresh controller. The self-refresh controller may be configured to control the self-refresh operation based on a self-refresh cycle varying according to an internal temperature of the memory medium and transmit the self-refresh signal to the memory controller. The memory controller may be configured to generate the auto-refresh control signal based on an auto-refresh cycle. The auto-refresh control signal may be determined by the self-refresh signal transmitted from the memory medium.

Abstract: A semiconductor device includes a substrate, a gate structure on the substrate, and a gate contact in the gate structure. The gate structure includes a gate electrode extending in a first direction and a gate capping pattern on the gate electrode. The gate contact is connected to the gate electrode. The gate electrode includes a protrusion extending along a boundary between the gate contact and the gate capping pattern.

Abstract: A semiconductor device includes an active pattern extending in a first horizontal direction on a substrate, a gate electrode extending in a second horizontal direction across the active pattern, and including a first portion, and a second portion protruding upward from the first portion in a vertical direction, a capping pattern extending in the second horizontal direction on the gate electrode, and a gate contact disposed on the second portion of the gate electrode, overlapping the active pattern, and penetrating the capping pattern to connect the gate electrode.

Abstract: A semiconductor device includes a latch circuit and a code comparison circuit. The latch circuit latches an output code generated based on an active command. The latch circuit outputs the latched output code as a latch code in response to a write command. The code comparison circuit compares the latch code with a write code to generate a detection signal.

Abstract: A memory device may include a memory medium and a memory controller. The memory medium may be configured to perform a self-refresh operation and an auto-refresh operation in response to a self-refresh signal and an auto-refresh control signal, respectively. The memory controller may be configured to control the auto-refresh operation by transmitting the auto-refresh control signal to the memory medium. The memory medium includes a self-refresh controller. The self-refresh controller may be configured to control the self-refresh operation based on a self-refresh cycle varying according to an internal temperature of the memory medium and transmit the self-refresh signal to the memory controller. The memory controller may be configured to generate the auto-refresh control signal based on an auto-refresh cycle. The auto-refresh control signal may be determined by the self-refresh signal transmitted from the memory medium.

Abstract: Disclosed is a wireless charging device including a first cover, at least a portion of a surface of which has a frictional force of a specific magnitude, a second cover disposed under the first cover and having an elastic force of a specific magnitude, an upper housing disposed under the second cover, a lower housing coupled to the upper housing, at least one charging coil disposed between the upper housing and the lower housing and configured to supply electric power to an electronic device positioned on an upper surface of the first cover, a power source part connected to the at least one charging coil, and a holding state changing part configured to help change holding states of the upper housing and the lower housing.

Abstract: A semiconductor device includes a substrate having first and second regions, a first gate electrode layer on the first region, and including a first conductive layer, and a second gate electrode layer on the second region, and including the first conductive layer, a second conductive layer on the first conductive layer, and a barrier metal layer on the second conductive layer, wherein an upper surface of the first gate electrode layer is at a lower level than an upper surface of the second gate electrode layer.

Abstract: A semiconductor device includes a substrate including first, second, third, and fourth regions, a first gate structure on the first region, a second gate structure on the second region, a third gate structure on the third region, and a fourth gate structure on the fourth region. The first gate structure includes a first gate insulating layer, a first material layer, and a first gate electrode layer. The second gate structure includes a second gate insulating layer, a second material layer, and a second gate electrode layer. The third gate structure includes a third gate insulating layer, a third material layer, and a third gate electrode layer. The fourth gate structure includes a fourth gate insulating layer and a fourth gate electrode layer. The first, second, and third material layers have different thicknesses. The first material layer includes a lower metal layer, an upper metal layer, and a polysilicon layer therebetween.

Abstract: A semiconductor device includes a substrate having an active region, a gate structure on the active region, the gate structure including a gate dielectric layer and a gate electrode layer, and the gate electrode layer having a rounded upper corner, and gate spacer layers on side surfaces of the gate structure, the gate spacer layers having an upper surface at a lower height level than an upper surface of the gate electrode layer.

Abstract: A toilet footrest according to an embodiment comprises: a left footrest on which a user's left foot is placed; a right footrest on which the user's right foot is placed; and a connecting frame connecting the left footrest and the right footrest to each other, wherein each of the left footrest and the right footrest locates the front and rear portions of the user's sole at different heights, and the connecting frame includes a coupling groove vertically coupled to a groove formed in an outer wall of each of the left footrest and the right footrest. In addition, the toilet footrest may further comprise a height adjustment layer coupled to the lower end of a base layer of each of the left footrest and the right footrest in order to adjust a height at which the user's foot is placed.

Abstract: A memory device includes a memory medium and a memory controller. The memory medium has a memory cell array and may be configured to generate a self-refresh signal, which varies based on an internal temperature of the memory medium, to control a self-refresh operation performed on the memory cell array. The memory controller may be configured to calculate an auto refresh cycle of an auto refresh control signal for controlling an auto-refresh operation of the memory medium based on the self-refresh signal.

Abstract: Disclosed herein is a refrigerator. The refrigerator includes a cold air generating device configured to generate cold air, a plurality of storage chambers arranged in at least a part of an area around the cold air generating device, a cold air guide unit configured to extend from the cold air generating device toward the plurality of storage chambers for guiding cold air generated from the cold air generating device selectively to the respective storage chambers, and a discharge guide unit configured to guide inside air of the respective storage chambers to the outside.

Abstract: An integrated circuit device includes a substrate from which a plurality of fin-type active regions protrude, the plurality of fin-type active regions extending in parallel to one another in a first direction, and a plurality of gate structures and a plurality of fin-isolation insulating portions extending on the substrate in a second direction crossing the first direction and at a constant pitch in the first direction, wherein a pair of fin-isolation insulating portions from among the plurality of fin-isolation insulating portions are between a pair of gate structures from among the plurality of gate structures, and the plurality of fin-type active regions include a plurality of first fin-type regions and a plurality of second fin-type regions.