Abstract: A presentation apparatus includes: a communication connection establishing unit establishing a communication connection with a plurality of receiving terminals and a source terminal, the source terminal having a token corresponding to an authority of controlling a presentation; a presentation data relay unit receiving presentation data from the source terminal, broadcasting a presentation image to the plurality of receiving terminals to display the presentation image of the received presentation data on each screen of the plurality of receiving terminals, and broadcasting voice information to the source terminal and the plurality of receiving terminals to output, from each terminal, the voice information being inputted from any one of the source terminal and the plurality of receiving terminals; and a presentation control unit controlling a transmission/reception of the presentation image and the voice information, and controlling a receiving terminal requesting the token to obtain the token.

Abstract: A picture image providing method and a picture-taking device using the method are provided. The picture-taking device includes: a picture-taking module generating a picture image by taking a picture of a photography object via a camera; a transmission location management module managing a target image for identifying the photography object included in the picture image, and transmission location information for transmitting the picture image, in correspondence to the target image; an area selection module selecting an area on the picture image corresponding to the target image; an image identification module identifying the target image corresponding to the photography object, included in the picture image, using the target image and the selected area on the picture image; and a picture image transmission module identifying the transmission location information corresponding to the identified target image, and transmitting the picture image to a location corresponding to the transmission location information.

Abstract: Provided are a circuit and method for generating a program voltage, and a non-volatile memory device using the same. The circuit, which generates a program voltage for programming a memory cell of a semiconductor memory device, includes a program voltage controller and a voltage generating unit. The program voltage controller generates a program voltage control signal according to program/erase operations information. The voltage controller generates a program voltage in response to the program voltage control signal.

Abstract: A method of forming a semiconductor device includes forming a three-dimensional structure formed of a semiconductor on a semiconductor substrate, and isotropically doping the three-dimensional structure by performing a plasma doping process using a first source gas and a second source gas. The first source gas includes n-type or p-type impurity elements, and the second source gas includes a dilution element regardless of the electrical characteristic of a doped region.

Abstract: A method of configuring a virtual device and a system of configuring a virtual device is provided. A plurality of virtual device drivers corresponding to a plurality of specific functions of a first device is identified along with a second device. A plurality of virtual device drivers corresponding to the plurality of specific functions of the second device is also identified. A plurality of virtual device drivers required for a service is selected from the plurality of virtual device drivers corresponding to the plurality of specific functions of the first device and the plurality of virtual device drivers corresponding to the plurality of specific functions of the second device. The virtual device is configured with the plurality of virtual device drivers required for the service.

Abstract: The present invention relates to a method of manufacturing a thin film transistor array panel and apparatus and more particularly to an apparatus containing an in-situ fluorine generation chamber.

Abstract: The present invention relates to a method of manufacturing a thin film transistor array panel and apparatus and more particularly to an apparatus containing an in-situ fluorine generation chamber.

Abstract: A semiconductor device may include a semiconductor substrate, first and second source/drain regions on a surface of the semiconductor substrate, and a channel region on the surface of the semiconductor substrate with the channel region between the first and second source/drain regions. An insulating layer pattern may be on the channel region, a first conductive layer pattern may be on the insulating layer, and a second conductive layer pattern may be on the first conductive layer pattern. The insulating layer pattern may be between the first conductive layer pattern and the channel region, and the first conductive layer pattern may include boron doped polysilicon with a surface portion having an accumulation of silicon boronide. The first conductive layer pattern may be between the second conductive layer pattern and the insulating layer pattern, and the second conductive layer pattern may include tungsten. Related methods are also discussed.

Abstract: A flash memory device includes a memory cell array having a first region and a second region that include memory cells arranged in a plurality of rows and columns; an address storage circuit adapted to store address information for defining the second region; a row decoder circuit adapted to select one of the first and second regions in response to an external address; a voltage generating circuit adapted to generate a read voltage to be provided to a row of the selected region by the row decoder circuit during a read operation; a detecting circuit adapted to detect whether the selected region is included in the second region on the basis of address information and external address information that are stored in the address storage circuit; and a control logic adapted to control the voltage generating circuit in response to an output of the detecting circuit during the read operation.

Abstract: An inkjet printhead and a method of manufacturing the same includes a substrate, an ink chamber to contain ink having a predetermined depth in an upper side of the substrate and an ink feedhole to supply the ink to the ink chamber provided in a lower side of the substrate, a heater formed on the bottom of the ink chamber to heat the ink and to form an ink bubble, and a nozzle layer deposited on the substrate and having a nozzle connected to the ink chamber. The ink chamber is narrower toward the bottom thereof and a sidewall of the ink chamber has a concave round shape.

Abstract: An inkjet printhead includes a substrate including a plurality of restrictors formed in an upper surface thereof and an ink feedhole formed in a lower surface thereof, a chamber layer stacked on the substrate and comprising a plurality of ink chambers corresponding to the plurality of restrictors including ink to be ejected, wherein each of the ink chambers is formed on an upper portion of a corresponding one of the restrictors and is connected to the corresponding one of the restrictors, a plurality of heaters formed on a bottom surface of corresponding ones of the plurality of ink chambers to heat the ink therein to generate bubbles, and a nozzle layer stacked on the chamber layer and comprising nozzles to eject the ink.

Abstract: A nonvolatile memory device includes a nonvolatile memory cell array including a plurality of nonvolatile memory cells connected to a plurality of word lines, a word line voltage generator configured to generate first and second sequences of voltage pulses. The device selectively supplies one of the first and second sequences of voltage pulses to a selected one of the word lines to program the nonvolatile memory cells connected to the selected word line. A slope of at least one voltage pulse of the first sequence of voltage pulses is greater than a slope of at least one voltage pulse of the second sequence of voltage pulses. In general, the first sequence is applied to word lines far away from the string select line (SSL), and the second sequence is applied to word lines that are close to the SSL.

Abstract: A method of forming a semiconductor device includes forming a three-dimensional structure formed of a semiconductor on a semiconductor substrate, and isotropically doping the three-dimensional structure by performing a plasma doping process using a first source gas and a second source gas. The first source gas includes n-type or p-type impurity elements, and the second source gas includes a dilution element regardless of the electrical characteristic of a doped region.

Abstract: A thermally driven inkjet printhead includes a substrate, a heater formed on the substrate, a chamber layer stacked on the substrate to define an ink chamber on an upper portion of the heater and an ink feed hole to supply ink to the ink chamber at one side of the ink chamber, an intermediate layer stacked on the chamber layer in which a through hole connected to the ink chamber is formed, and a nozzle layer stacked on the intermediate layer in which a nozzle connected to the through hole is formed. The through hole is connected to the ink feed hole and has a smaller cross-sectional area than a size of the heater.

Abstract: An inkjet printhead and a method of manufacturing the same. The inkjet printhead may include a substrate in which a manifold to supply ink is formed in a lower portion of the substrate and a plurality of ink feed holes connected to the manifold are formed in an upper portion of the substrate, feed hole guides that are formed on inner sidewalls of the ink feed holes to define lengths of the ink feed holes, a chamber layer stacked on the substrate, the chamber layer including a plurality of ink chambers connected to the ink feed holes, a plurality of heaters to heat ink inside the ink chambers to generate bubbles, and a nozzle layer stacked on the chamber layer, the nozzle layer including a plurality of nozzles, the ink being ejectable through the nozzles.

Abstract: An Inkjet printhead and a method of manufacturing the same. The inkjet printhead includes a substrate having an ink feedhole, a chamber layer formed on the substrate to define an ink chamber filled with ink supplied though the ink feedhole, and a nozzle layer formed on the chamber layer and having one or more nozzles to eject the ink filled in the chamber, wherein the chamber layer and the nozzle layer are made of solid film resists.

Abstract: An inkjet printer head and fabrication method thereof. The inkjet printer head includes a substrate, a thermal layer formed on the substrate to generate thermal energy, a first electrode formed on the thermal layer except at a nozzle forming portion of the thermal layer, and a second electrode extending a predetermined distance to the nozzle forming portion of the thermal layer from a top portion of the first electrode to contact a central portion of the thermal layer. Accordingly, the inkjet printer head has high efficiency and durability.

Abstract: A flash memory device comprising a high voltage generator circuit that is adapted to supply a program voltage having a target voltage to a selected word line is provided. The flash memory device is adapted to terminate the program interval in accordance with when the program voltage has been restored to the target voltage after dropping below the target voltage. A method for operating the flash memory device is also provided.

Abstract: Provided is a method for discharging an erase voltage of a semiconductor memory device and discharge circuit for performing the method, the method including performing a first discharge on a common source line (CSL) of the semiconductor memory device, comparing the detected CSL voltage with a predetermined reference voltage, and performing a second discharge on the CSL when the detected CSL voltage is lower than a predetermined reference voltage.

Abstract: There are provided a high-voltage transistor and a method of forming the same. A channel region of the high-voltage transistor includes a first region and a second region. The first region has high impurity concentration that is higher than that of the second region. In addition, the first region may be in contact with the isolation layer. Thus, it is possible to enhance leakage current characteristics of the high-voltage transistor.