Patents by Inventor Jin-Wook Lee

Jin-Wook Lee has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 9332110
    Abstract: An operation method and mobile terminal connected to an electronic device are provided. An extracted piece of content among multiple pieces of content displayed on a screen of the electronic device and a command of a functional application are received. The functional application is executed according to the command using the extracted piece of content.
    Type: Grant
    Filed: April 14, 2014
    Date of Patent: May 3, 2016
    Assignee: Samsung Electronics Co., Ltd
    Inventors: Hun Lim, Gene-Moo Lee, Jin-Wook Lee, Je-Hyok Ryu, Woo-Jin Park, Jin-Hyoung Kim, Shin-Il Kang
  • Patent number: 9300854
    Abstract: An apparatus and a method detect and connect a counterpart device by capturing an image of the counterpart device in a wireless device. A Relative Distance Value (RDV) between the wireless device and the counterpart device is determined via image capture using a camera. The counterpart device is identified using the determined RDV.
    Type: Grant
    Filed: November 16, 2011
    Date of Patent: March 29, 2016
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Shin-Il Kang, Hun-Je Yeon, Jin-Wook Lee
  • Patent number: 9269611
    Abstract: Integrated circuits and methods of forming integrated circuits are provided. An integrated circuit includes a gate electrode structure overlying a base substrate. The gate electrode structure includes a gate electrode, with a cap disposed over the gate electrode and sidewall spacers disposed adjacent to sidewalls of the gate electrode structure. A source and drain region are formed in the base substrate aligned with the gate electrode structure. A first dielectric layer is disposed adjacent to the sidewall spacers. The sidewall spacers and the cap have recessed surfaces below a top surface of the first dielectric layer, and a protecting layer is disposed over the recessed surfaces. A second dielectric layer is disposed over the first dielectric layer and the protecting layer. Electrical interconnects are disposed through the first dielectric layer and the second dielectric layer, and the electrical interconnects are in electrical communication with the respective source and drain regions.
    Type: Grant
    Filed: January 21, 2014
    Date of Patent: February 23, 2016
    Assignees: GLOBALFOUNDRIES, INC., INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Daniel Thanh Khae Pham, Xiuyu Cai, Bala Subramanian Pranatharthi Haran, Charan Veera Venkata Satya Surisetty, Jin Wook Lee, Shom Ponoth, David V. Horak
  • Publication number: 20160014823
    Abstract: A method and an apparatus for automatically connecting a wireless Local Area Network (LAN) between digital devices and executing an application program based on the wireless LAN, and more particularly; an apparatus and a method for generating device information indicating attributes in a digital device and obtaining attributes of a peripheral device by analyzing device information of the peripheral device. The apparatus includes a device information generation part configured to generate device information including information about attributes by analyzing the attributes of the digital device. The apparatus also includes a device recognition part configured, when receiving device information of a peripheral device, to obtain attribute information of a device corresponding to the received device information. The apparatus further includes a controller configured to control to transmit the device information generated by the device information generation part, to the peripheral device.
    Type: Application
    Filed: September 22, 2015
    Publication date: January 14, 2016
    Inventors: Seong-Il Hahm, Woo-Jin Park, Woo-Shik Kang, Seung-Seop Shim, Jin-Wook Lee, Eung-Sik Yoon
  • Patent number: 9214286
    Abstract: A dye-sensitized solar cell including an inorganic dye containing all of Pb, Hg and S as a photo-sensitive dye and a manufacturing method of the same are provided.
    Type: Grant
    Filed: August 8, 2013
    Date of Patent: December 15, 2015
    Assignee: Research & Business Foundation Sungkyunkwan University
    Inventors: Nam-Gyu Park, Jin-Wook Lee, Dae-Yong Son
  • Publication number: 20150354757
    Abstract: The present invention relates to an LED lamp having improved directivity, which includes: a substrate having light emitting sources mounted on the front surface thereof; an inner cover, which is disposed to cover the substrate and a space to the front of the substrate and which includes a penetration area allowing the penetration of light and a reflection area reflecting light, so that a part of the light emitted from the light emitting sources is reflected by the reflection area and directed toward the sides or the back of the substrate; and an outer cover which is disposed to cover the inner cover and a space to the outside of the inner cover and which allows light to penetrate therethrough.
    Type: Application
    Filed: January 22, 2014
    Publication date: December 10, 2015
    Inventors: Jin Wook Lee, Ki Tae Kang
  • Publication number: 20150357518
    Abstract: A light emitting module includes: a substrate having a recess part formed thereon; a body surrounding some of side surfaces and an upper surface of the substrate; a light emitting diode chip positioned on the recess part of the substrate; and a lens positioned on the body, wherein the substrate includes a first step part positioned along an edge of the recess part and a second step part positioned along an edge of a lower surface thereof, and the lower surface of the substrate is exposed to the outside.
    Type: Application
    Filed: May 29, 2015
    Publication date: December 10, 2015
    Inventors: Jin Wook LEE, Hyuck Jun KIM, II Kyung SUH
  • Patent number: 9209179
    Abstract: A semiconductor device is provided. A substrate includes first and second active fins disposed in a row along a first direction. The first and second active fins are spaced apart from each other. A first dummy gate and a second dummy gate are disposed on the substrate and are extended in a second direction intersecting the first direction. The first dummy gate covers an end portion of the first active fin. The second dummy gate covers an end portion of the second active fin facing the end portion of the first active fin. A first dummy spacer is disposed on a sidewall of the first dummy gate. A second dummy spacer is disposed on a sidewall of the second dummy gate. The sidewall of the second dummy gate faces the sidewall of the first dummy gate. The first dummy spacer is in contact with the second dummy spacer.
    Type: Grant
    Filed: April 15, 2014
    Date of Patent: December 8, 2015
    Assignee: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Jin-Wook Lee, Kang-Ill Seo
  • Publication number: 20150329702
    Abstract: A warm mix recycled asphalt additive according to one embodiment includes dregs of oil and fat which are the by-products remaining after fatty acids are extracted from oils. In addition, the warm mix asphalt mixture according to another embodiment includes 2-15 wt % of the warm mix recycled asphalt additive, having dregs of oil and fat which are the by-products remaining after fatty acids are extracted from oils, on the basis of the total amount of waste asphalt in waste asphalt concrete. It is possible to overcome the problem of brittleness or the deterioration of lower temperature properties even if mixing and using waste asphalt concrete and new asphalt concrete when making asphalt concrete, to minimize the generation of toxic gas by exhibiting a technique for paving a warm mix mixture, and to reduce the environmental burden by efficiently regenerating waste asphalt concrete and recycling organic dregs.
    Type: Application
    Filed: December 9, 2013
    Publication date: November 19, 2015
    Inventors: Sung Do HWANG, Dong Woo CHO, Soo Ahn KWON, Kyu Dong JEONG, Yong Joo KIM, Cheolmin BAEK, Yeong Min KIM, Moon Sup LEE, Sung Lin YANG, Jin Wook LEE, Junsang PARK, Joonbum PYUN, Hansoo PARK, Hyeok-Jung KIM
  • Patent number: 9170018
    Abstract: The present invention provides a top-feeding double-swirl type gasifier: a feed line through which pulverized coal is supplied by nitrogen; a distributor for dividing the pulverized coal supplied; a plurality of burner nozzles for supplying the pulverized coal, divided in the distributor, and an oxidizer; a pressure reactor in which the pulverized coal and the oxidizer react with each other to produce a flow of synthesis gas; and a swirl generator for imparting a swirling force to the oxidizer which is fed into the pressure reactor, the gasifier further comprising a slag cooling and storing container placed beneath the pressure reactor. Each of the burner nozzles consists of a triple tube having a circular cross section. The pulverized coal and carrier gas are supplied to the most central region of the burner nozzle, and an oxidizer is supplied to an annular region 34 surrounding the central region.
    Type: Grant
    Filed: December 10, 2010
    Date of Patent: October 27, 2015
    Assignee: SK INNOVATION CO., LTD.
    Inventors: Jin Wook Lee, Seok Woo Chung, Young Don Yoo, Yongseung Yun, Sam Ryong Park, Gyoo Tae Kim, Yong Il Lee
  • Publication number: 20150294969
    Abstract: A semiconductor device is provided. A substrate includes first and second active fins disposed in a row along a first direction. The first and second active fins are spaced apart from each other. A first dummy gate and a second dummy gate are disposed on the substrate and are extended in a second direction intersecting the first direction. The first dummy gate covers an end portion of the first active fin. The second dummy gate covers an end portion of the second active fin facing the end portion of the first active fin. A first dummy spacer is disposed on a sidewall of the first dummy gate. A second dummy spacer is disposed on a sidewall of the second dummy gate. The sidewall of the second dummy gate faces the sidewall of the first dummy gate. The first dummy spacer is in contact with the second dummy spacer.
    Type: Application
    Filed: April 15, 2014
    Publication date: October 15, 2015
    Applicant: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Jin-Wook Lee, Kang-III Seo
  • Patent number: 9144093
    Abstract: A method and an apparatus for automatically connecting a wireless Local Area Network (LAN) between digital devices and executing an application program based on the wireless LAN, and more particularly, an apparatus and a method for generating device information indicating attributes in a digital device and obtaining attributes of a peripheral device by analyzing device information of the peripheral device. The apparatus includes a device information generation part configured to generate device information including information about attributes by analyzing the attributes of the digital device. The apparatus also includes a device recognition part configured, when receiving device information of a peripheral device, to obtain attribute information of a device corresponding to the received device information. The apparatus further includes a controller configured to control to transmit the device information generated by the device information generation part, to the peripheral device.
    Type: Grant
    Filed: November 3, 2011
    Date of Patent: September 22, 2015
    Assignee: Samsung Electronics, Co., Ltd.
    Inventors: Seong-Il Hahm, Woo-Jin Park, Woo-Shik Kang, Seung-Seop Shim, Jin-Wook Lee, Eung-Sik Yoon
  • Publication number: 20150255675
    Abstract: A light-emitting device, according to one embodiment, comprises a light-emitting structure having a silicon substrate, a first conductive type semiconductor layer disposed on the silicon substrate, an active layer, and a second conductive type semiconductor layer, a conductive layer facing the active layer between the silicon substrate and the first conductive type semiconductor layer, a first electrode which is disposed on the first conductive type semiconductor layer, penetrates or bypasses the first conductive type semiconductor layer, and is electrically connected to the conductive layer, and a second electrode disposed on the second conductive type semiconductor layer.
    Type: Application
    Filed: August 1, 2013
    Publication date: September 10, 2015
    Applicant: LG INNOTEK CO., LTD.
    Inventors: Hyun don Song, Tae Lim Lee, Dong Ha Kim, Jin Wook Lee
  • Publication number: 20150257119
    Abstract: An apparatus and method for recognizing an indoor zone in which a user is located by using an Earth's magnetic field that is generated naturally instead of the conventional method of combining a magnetic field generator and a magnetic field sensor. The apparatus includes a zone evaluator configured to primarily recognize a location of the portable terminal by using first and second components of an Earth's magnetic field and to finally recognize the location of the portable terminal by using first and second images.
    Type: Application
    Filed: May 26, 2015
    Publication date: September 10, 2015
    Inventors: Seong-Il Hahm, Seong-Ho Cho, Jin-Wook Lee, Hun-Je Yeon, Young-Ki Kim, Pil-Seob Kang, Shin-Il Kang
  • Patent number: 9130123
    Abstract: A light emitting device and a light emitting device package including the same are provided. The light emitting device may include a light emitting structure including a first conductive type semiconductor layer, an active layer, and a second conductive type semiconductor layer, a first electrode on the light emitting structure, the first electrode including a pattern, and a pad electrode on the first electrode.
    Type: Grant
    Filed: June 4, 2010
    Date of Patent: September 8, 2015
    Assignee: LG INNOTEK CO., LTD.
    Inventors: Sun Kyung Kim, Jin Wook Lee
  • Patent number: 9096726
    Abstract: A composition for forming silica-based insulation layer includes a hydrogenated polysiloxazane including a moiety represented by the following Chemical Formula 1 and a moiety represented by the following Chemical Formula 2, and having a chlorine concentration of about 1 ppm or less:
    Type: Grant
    Filed: December 29, 2011
    Date of Patent: August 4, 2015
    Assignee: CHEIL INDUSTRIES, INC.
    Inventors: Sang-Hak Lim, Bong-Hwan Kim, Jung-Kang Oh, Taek-Soo Kwak, Jin-Hee Bae, Hui-Chan Yun, Dong-Il Han, Sang-Kyun Kim, Jin-Wook Lee
  • Publication number: 20150214220
    Abstract: Integrated circuit devices having a cavity and methods of manufacturing the integrated circuit devices are provided. The integrated circuit devices may include a pair of spacers, which define a recess. The integrated circuit device may also include a lower conductive pattern in the recess and an upper conductive pattern on the lower conductive pattern. The upper conductive pattern may have an etch selectivity with respect to the lower conductive pattern and may expose an upper surface of the lower conductive pattern adjacent a sidewall of the upper conductive pattern. An inner sidewall of one of the pair of spacers, the upper surface of the lower conductive pattern and the sidewall of the upper conductive pattern may define a space and a capping pattern may be formed on the upper conductive pattern to seal a top portion of the space, such that a cavity is disposed under the capping pattern.
    Type: Application
    Filed: January 28, 2014
    Publication date: July 30, 2015
    Inventors: KANG-ILL SEO, JIN-WOOK LEE
  • Publication number: 20150206844
    Abstract: Integrated circuits and methods of forming integrated circuits are provided. An integrated circuit includes a gate electrode structure overlying a base substrate. The gate electrode structure includes a gate electrode, with a cap disposed over the gate electrode and sidewall spacers disposed adjacent to sidewalls of the gate electrode structure. A source and drain region are formed in the base substrate aligned with the gate electrode structure. A first dielectric layer is disposed adjacent to the sidewall spacers. The sidewall spacers and the cap have recessed surfaces below a top surface of the first dielectric layer, and a protecting layer is disposed over the recessed surfaces. A second dielectric layer is disposed over the first dielectric layer and the protecting layer. Electrical interconnects are disposed through the first dielectric layer and the second dielectric layer, and the electrical interconnects are in electrical communication with the respective source and drain regions.
    Type: Application
    Filed: January 21, 2014
    Publication date: July 23, 2015
    Applicants: International Business Machines Corporation, Globalfoundries, Inc.
    Inventors: Daniel Thanh Khae Pham, Xiuyu Cai, Bala Subramanian Pranatharthi Haran, Charan Veera Venkata Satya Surisetty, Jin Wook Lee, Shom Ponoth, David V. Horak
  • Patent number: 9082612
    Abstract: A composition for forming a silica layer, a method of manufacturing the composition, a silica layer prepared using the composition, and a method of manufacturing the silica layer, the composition including hydrogenated polysilazane, hydrogenated polysiloxazane, or a combination thereof, wherein a concentration of a sum of hydrogenated polysilazane and hydrogenated polysiloxazane having a weight average molecular weight, reduced to polystyrene, of greater than or equal to about 50,000 is about 0.1 wt % or less, based on a total amount of the hydrogenated polysilazane and hydrogenated polysiloxazane.
    Type: Grant
    Filed: December 20, 2011
    Date of Patent: July 14, 2015
    Assignee: CHEIL INDUSTRIES, INC.
    Inventors: Hui-Chan Yun, Taek-Soo Kwak, Bong-Hwan Kim, Jin-Hee Bae, Jung-Kang Oh, Sang-Hak Lim, Dong-Il Han, Sang-Kyun Kim, Jin-Wook Lee
  • Patent number: 9064801
    Abstract: A method of forming a semiconductor structure includes forming a metal gate above a semiconductor substrate and gate spacers adjacent to the metal gate surrounded by an interlevel dielectric (ILD) layer. The gate spacers and the metal gate are recessed until a height of the metal gate is less than a height of the gate spacers. An etch stop liner is deposited above the gate spacers and the metal gate. A gate cap is deposited above the etch stop liner to form a bi-layer gate cap. A contact hole is formed in the ILD layer adjacent to the metal gate, the etch stop liner in the bi-layer gate cap prevents damage of the gate spacers during formation of the contact hole. A conductive material is deposited in the contact hole to form a contact to a source-drain region in the semiconductor substrate.
    Type: Grant
    Filed: January 23, 2014
    Date of Patent: June 23, 2015
    Assignees: INTERNATIONAL BUSINESS MACHINES CORPORATION, GLOBALFOUNDRIES, INC., SAMSUNG ELECTRONICS CO., LTD.
    Inventors: David V. Horak, Jin Wook Lee, Daniel Pham, Shom S. Ponoth, Balasubramanian Pranatharthiharan