Abstract: A gate driver including: first to N-th stages receiving first to N-th clock signals from first to N-th clock lines, the first stage includes a first clock terminal receiving the first clock signal, a second clock terminal receiving a second clock signal, a carry terminal receiving a vertical start signal, and an output terminal outputting a first gate signal, an N?K-th stage includes a first clock terminal receiving an N?K-th clock signal, a second clock terminal receiving an N?K+1-th clock signal, a carry terminal receiving an N?K?1-th gate signal, and an output terminal outputting an N?K-th gate signal, and the N-th stage includes a first clock terminal receiving the N-th clock signal, a second clock terminal receiving the first clock signal, a carry terminal receiving an N?1-th gate signal, and an output terminal outputting an N-th gate signal.

Abstract: Proposed is a system for providing video-based augmented reality content. The system may include a mobile device that transmits an image captured via a camera and IMU data, which is position and orientation information about the camera, and plays back received AR content. The image and the IMU data may be transmitted by being combined into a single image data packet. The system may also include a split rendering server that uses the image and IMU data of the image data packet of the mobile device to render a three-dimensional object, and provides the AR content, which is the rendered result, to the mobile device.

Abstract: Proposed is a device for encoding a multi-channel image. The device may include a collection unit for collecting, in frame units, data of a plurality of capture cards. The device may also include an encoding unit which encodes the data collected in the collection unit, by using a plurality of encoders, and which encodes according to a configuration parameter defined regardless of the interface of the capture cards. The device may further include an output unit for outputting the encoded data.

Abstract: Disclosed is a display device including a display panel including a plurality of pixels and a voltage generator providing an anode initialization voltage to the pixels. The display panel is divided into a first display area operating at a first operating frequency and a second display area operating at a second operating frequency. While pixels, which correspond to the first display area, from among the plurality of pixels are driven, the anode initialization voltage has a first voltage level. While pixels in the second display area from among the plurality of pixels are driven, the anode initialization voltage has a second voltage level different from the first voltage level.

Abstract: A display device includes a plurality of data lines, a plurality of first gate lines, a plurality of second gate lines, and a plurality of pixels. The plurality of pixels includes a first group of pixels and a second group of pixels. The plurality of data lines includes a first group of data lines connected to the first group of pixels and a second group of data lines connected to the second group of pixels. A data signal is provided to the first group of pixels in a first sub-frame period of one frame period. A data signal is provided to the second group pixels in a second sub-frame period of the one frame period that is adjacent to the first sub-frame period.

Abstract: A pixel includes: a light-emitting element including an anode and a cathode, a first transistor including a first and a second electrode and a gate electrode connected with a first node, a third transistor connected between the second electrode of the first transistor and the first node and including a gate electrode connected with a first scan line, a sixth transistor connected between the second electrode of the first transistor and the anode and including a gate electrode connected with a first emission line, and a seventh transistor connected between the anode and an initialization voltage line and including a gate electrode connected with a second scan line. During an initialization period, the third, sixth, and seventh transistors are turned on such that an initialization voltage from the initialization voltage line is transferred to the gate electrode of the first transistor.

Abstract: A display device includes a display panel including a pixel and a driving controller to drive the display panel. The driving controller generates a compensating signal, when a first driving frequency of a first frame is determined as being higher than a second driving frequency of a second frame by comparing a first cycle count value of the first frame with a second cycle count value of the second frame subsequent to the first frame.

Abstract: A display device includes a display panel that includes a plurality of pixels and displays an image corresponding to each of a plurality of frames, and a drive controller that receives an image signal and drives the plurality of frames at a plurality of driving frequencies. The drive controller includes a representative frequency calculator, a compensation signal calculator, and a data compensation unit that receives an image signal and outputs a compensation data signal by adding a gray of the image signal and a gray value based on a data correction lookup table in which the gray value is stored. Luminance of the image is controlled based on the compensation signal and the compensation data signal.

Abstract: A display panel of a display device includes: first light emitting elements located in a first row, second light emitting elements located in a second row adjacent to the first row, first pixel circuits located in the first row, and second pixel circuits located in the second row. Each of the first pixel circuits drives a first light emitting element, located in a column the same as a column in which the each of the first pixel circuits is located, among the first light emitting elements. At least one second pixel circuit of the second pixel circuits drives a second light emitting element, located in a column different from a column in which the at least one second pixel circuit is located, among the second light emitting elements.

Abstract: The present invention relates to a composition for improving memory, improving cognition, preventing or treating cerebral neurological disease, comprising porcine brain enzyme hydrolysate. The composition can exhibit neuroprotective activity, brain-derived neurotrophic factor (BDNF) production activity, acetylcholinesterase inhibitory activity and reactive oxygen species (ROS) inhibitory activity.

Abstract: A pixel includes: a light emitting element; a first transistor including a gate electrode electrically connected to a first node, a second node to which a first power voltage for driving the light emitting element is to be applied, and a third node electrically connected to the light emitting element; and a bias control transistor configured to be controlled in operating timing thereof by a bias control signal, and configured to switch electrical connection between the second node and a bias power line for transmitting a bias voltage. In one frame period, a voltage level of the bias voltage to be applied to the second node sequentially increases.

Abstract: A semiconductor device includes a substrate having a top surface and a bottom surface opposite to each other, a gate structure on the top surface of the substrate, a plurality of source/drain patterns on the top surface of the substrate and on opposite sides of the gate structure, a backside conductive line on the bottom surface of the substrate and electrically connected to at least one of the gate structure or a first source/drain pattern of the source/drain patterns, and a magnetic tunnel junction pattern electrically connected to a second source/drain pattern of the source/drain patterns.

Abstract: A display apparatus includes a display panel, a gate driver, a data driver and an emission driver. The display panel includes a pixel. The gate driver is configured to output a gate signal to the pixel. The data driver is configured to output a data voltage to the pixel. The emission driver is configured to output an emission signal to the pixel. The pixel includes a light emitting element, a driving switching element configured to apply a driving current to the light emitting element and a bias switching element configured to apply a bias voltage to the driving switching element. The display apparatus increases a level of the bias voltage when a duration of a light emission time of the pixel is increased.

Abstract: A display device includes pixels including a light-emitting element, and an initialization transistor connected between an anode electrode of the light-emitting element and a first initialization power line to which a voltage of initialization power is supplied, and turned on when an initialization scan signal is supplied, and an initialization scan driver which supplies the initialization scan signal. The initial scan driver supplies an i-th (i is a natural number) initial scan signal to overlap an (i?1)-th initial scan signal, and supplies an (i+1)-th initial scan signal so as not to overlap the i-th initial scan signal, and the initialization scan signal is set to a gate-on voltage.

Abstract: A display device includes: a display panel including a plurality of pixels connected to a plurality of scan lines; a scan driving circuit, which drives the plurality of scan lines in synchronization with a clock signal; and a driving controller, which outputs the clock signal. While an operating mode is a multi-frequency mode, the driving controller comparts the display panel into a first display area and a second display area. A hold frame of the multi-frequency mode includes a first section during which the first display area is driven, and a second section during which the second display area is driven. The driving controller outputs the clock signal of a normal power mode during the first section and outputs the clock signal of a low-power mode during the second section.

Abstract: A semiconductor device includes a first active pattern extending in a first direction, a second active pattern on the first active pattern and extending in the first direction, a gate structure on the first active pattern and the second active pattern and extending in a second direction intersecting the first direction, a first source/drain region on side faces of the gate structure and connected to the first active pattern, a second source/drain region on the side faces of the gate structure and connected to the second active pattern, and an intermediate connecting layer which includes a first intermediate conductive pattern between the first active pattern and the second active pattern, and a second intermediate conductive pattern connected to the first intermediate conductive pattern between the first source/drain region and the second source/drain region.

Abstract: A display device includes: a display panel including pixels having light-emitting elements; a timing control unit for variably changing the driving frame frequency of the display panel according to the input frame frequency of digital video data; and a data driving unit for outputting data voltages according to the digital video data, wherein the display panel operates at a first frame frequency for a first frame period and operates at a second frame frequency, which is lower than the first frame frequency, for a second frame period, the second frame period includes a data addressing period in which a data voltage corresponding to each of the pixels is applied to the pixels, and a blank period in which no data voltage is applied to each of the pixels, and the blank period includes a period of initializing a first electrode of a light-emitting element into an initialization voltage.

Abstract: A display panel includes a first pixel group including sub-pixels coupled to a first scan line and located in first through N-th sub-pixel columns, where N is an even number greater than or equal to 2, a second pixel group including sub-pixels coupled to the first scan line and located in (N+1)-th through 2N-th sub-pixel columns, a third pixel group including sub-pixels coupled to a second scan line adjacent to the first scan line and located in the first through N-th sub-pixel columns, and a fourth pixel group including sub-pixels coupled to the second scan line and located in the (N+1)-th through 2N-th sub-pixel columns. The first pixel group and the second pixel group are driven during a first scan on time in which the first scan line is driven.

Abstract: A pixel includes a first capacitor connected between first and second nodes, a second capacitor connected between a first voltage line and the first node, a light emitting diode including a first electrode and a second electrode connected with a second voltage line, a first transistor including a first electrode, a second electrode, and a gate electrode connected with the second node, a second transistor including a first electrode, a second electrode, and a gate electrode which receives a scan signal, a third transistor including a first electrode, a second electrode, and a gate electrode which receives a first compensation scan signal, a fourth transistor including a first electrode, a second electrode, and a gate electrode which receives a second compensation scan signal, and a fifth transistor including a first electrode, a second electrode, and a gate electrode which receives a first light emitting signal.

Abstract: An electronic device includes a display panel which includes a plurality of pixels and displays an image at each of multiple frames, a driving circuit which drives the multiple frames at multiple operating frequencies, a voltage generator which provides a voltage to the display panel, and a drive controller. The drive controller includes a representative frequency calculator which calculates a representative frequency, based on operating frequencies of ‘n’ number of frames before one frame of the multiple frames, and a compensating signal calculator which outputs a compensating signal, based on the representative frequency and a count number in the one frame. The drive controller transmits the compensating signal to the voltage generator, the voltage includes a reference voltage, the voltage generator generates the reference voltage based on the compensating signal, and the voltage generator provides the reference voltage to each of the plurality of pixels.