Patents by Inventor Jin Yang
Jin Yang has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20260353560Abstract: A chip packaging structure and a manufacturing method thereof are disclosed. The method replaces an expensive organic substrate in related technologies with a composite structure of a rewiring layer and a prepreg substrate; the rewiring layer is used to realize fine-pitch wiring in a high-density circuit, and then is bonded to the prepreg substrate to achieve coarser wiring connections. This composite structure has significant cost advantages over organic substrates and can be applied to chip products that do not require high frequency or low latency. In addition, simultaneously bonding of multiple die stacks formed by dies and the rewiring layer to the surface of the prepreg substrate avoids the low manufacturing efficiency of bonding each die individually, effectively reducing production costs and improving manufacturing efficiency.Type: ApplicationFiled: June 9, 2023Publication date: November 5, 2026Applicant: SJ Semiconductor(Jiangyin) CorporationInventors: Yenheng CHEN, Chengchung LIN, Jin YANG
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Patent number: 12786781Abstract: Systems and methods are provided to enable mobile network operators to dynamically determine when a Low-Latency, Low-Loss Scalable-Throughput (L4S) service shall be enabled for a data flow. A network device in a core network receives a request for a Quality of Service (QoS) flow associated with a user equipment (UE) device; determines whether to enable a LS4 service for the QoS flow; and notifies, based on the determining, a Session Management Function (SMF) to create the QoS flow with L4S service enabled.Type: GrantFiled: September 27, 2023Date of Patent: November 3, 2026Assignee: Verizon Patent and Licensing Inc.Inventors: Sudhakar Reddy Patil, Ravi Potluri, Jin Yang, Violeta Cakulev, Ye Huang
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Publication number: 20260344501Abstract: An integrated circuit package structure and manufacturing method are disclosed; the package structure includes: an RDL, including a first surface in contact with the substrate and a second surface opposite to the first surface, wherein the RDL includes a first sub RDL and a second sub RDL stacked on top of each other; the RDL is made of photosensitive dry film dielectric layers and plated metal interconnects; an encapsulation layer, covering the chips and the RDL; a heat sink cover over the substrate, enclosing the encapsulation layer, chips, and the encapsulation layer. The multiple chips with different functions are integrated in a single package structure, improving the integration of the package. The adoption of high-resolution dry film dielectric layers enables forming a fine RDL structure, increasing the bandwidth of the final device and decreasing inter-chip delays. Therefore, high-density wiring capability is achieved without TSV-containing interposers, thus lowering production cost.Type: ApplicationFiled: June 8, 2023Publication date: October 29, 2026Applicant: SJ Semiconductor(Jiangyin) CorporationInventors: Yenheng CHEN, Chengchung LIN, Jin YANG
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Publication number: 20260343596Abstract: A network device may receive an indication to enable sub-band full duplex uplink transmission for a first user equipment (UE), and may determine whether the first UE and a second UE are associated with a separation that is more than a threshold separation. The network device may enable the sub-band full duplex uplink transmission for the first UE based on determining that the first UE and the second UE are associated with a separation that is more than the threshold separation. The network device may deny the sub-band full duplex uplink transmission for the first UE based on determining that the first UE and the second UE are associated with a separation that is less than the threshold separation.Type: ApplicationFiled: July 10, 2026Publication date: October 29, 2026Applicant: Verizon Patent and Licensing Inc.Inventors: Lei SONG, Lily ZHU, Zheng ZHAO, Cindy Yuexin DONG, Jin YANG, Xin WANG
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Publication number: 20260344538Abstract: A three-dimensional stacked fan-out package structure and a preparation method are disclosed. The structure comprises a chip stack body, a silicon adapter layer, a transmission chip, a cladding layer, and a substrate from top to bottom, the structure enables an electrical connection between the silicon adapter layer and the substrate by having a rewiring layer or a metal solder ball to carry out signal transmission. The transmission chip is set on the lower surface of the silicon adapter layer, and the chip stack body contains multiple chips on the silicon adapter layer. This structure improves the integration level, reduces the package volume, saves the substrate area, and makes it possible to accommodate a larger number of chips within a small area. The stacked design overlaps multiple chips, helping with heat transfer and heat dissipation.Type: ApplicationFiled: June 9, 2023Publication date: October 29, 2026Applicant: SJ Semiconductor(Jiangyin) CorporationInventors: Yenheng CHEN, Chengchung LIN, Jin YANG
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Publication number: 20260343409Abstract: A device determines a periodicity of downstream traffic destined for a User Equipment device (UE) and sets a value of at least one Discontinuous Reception (DRx) cycle length parameter to compensate for the determined periodicity of the downstream traffic. The device generates UE DRx instructions that include the at least one DRx cycle length parameter and sends the UE DRx instructions to the UE for implementing DRx at the UE.Type: ApplicationFiled: March 30, 2026Publication date: October 29, 2026Applicant: Verizon Patent and Licensing Inc.Inventors: Vishwanath Ramamurthi, Wei David Huang, Jin Yang
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Patent number: 12777419Abstract: In some implementations, a network device may receive a group command associated with data transfers for a plurality of user equipments (UEs). The network device may transmit, based on the group command, a wakeup signal to a subset of UEs, of the plurality of UEs, in a target area, wherein the wakeup signal is associated with a control of data transfers for the subset of UEs based on a number of UEs in the target area and a load condition level associated with the target area.Type: GrantFiled: January 23, 2024Date of Patent: October 27, 2026Assignee: Verizon Patent and Licensing Inc.Inventors: Ye Huang, Jodi S. Bogen, Sameer Muhammad Farooqi, Suzann Hua, Jin Yang, Robert Avanes
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Publication number: 20260334251Abstract: The present invention provides a 2.5D encapsulation structure and preparation method. The structure includes an electrically connected adapter plate, a chip, and an encapsulation layer in an encapsulation body. Multiple independently set encapsulation bodies are electrically connected through connection bridges to form an interconnected encapsulation body, and then electrically connected to a substrate. So multiple small-sized adapter plates can be electrically connected to each other through the connection bridges to form a larger-sized adapter plate. Results are increases in bandwidth and reductions in inter-chip delays. This method can reduce the difficulty of preparing large-sized adapter plates, thereby reducing costs and improving yields.Type: ApplicationFiled: June 8, 2023Publication date: October 22, 2026Applicant: SJ Semiconductor(Jiangyin) CorporationInventors: Yenheng CHEN, Chengchung LIN, Jin YANG
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Patent number: 12772162Abstract: A system described herein may receive traffic from a User Equipment (“UE”) via a radio unit (“RU”), may identify one or more attributes of the traffic, and may select a first Central Unit (“CU”), from a group of CUs that includes the first CU and a second CU, based on the one or more attributes of the traffic. The one or more attributes may include a network slice. The device may further route the traffic to the selected first CU, wherein the CU aggregates received traffic and routes the aggregated traffic to a user plane gateway. The device may include a Distributed Unit (“DU”) of a radio access network (“RAN”) that includes the first and second CUs. The first and second CUs may include a first CU-User Plane (“CU-UP”) and a second CU-UP. The DU and the CUs may be configured by a CU-Control Plane (“CU-CP”) of the RAN.Type: GrantFiled: January 26, 2024Date of Patent: October 20, 2026Assignee: Verizon Patent and Licensing Inc.Inventors: Jin Yang, Thomas W. Haynes, Samita Chakrabarti
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Patent number: 12763363Abstract: The present technology relates to multifunctionalized thiol conductor compounds which can be grafted onto polymers, and methods for making same. In certain embodiments, the compounds of the present technology can be grafted onto polymers having low Tg to synthesize single-ion conducting polymer electrolytes having improved conductivity. The multifunctionalized thiol conductor compounds of the present technology generally comprise more than one sulfonamide anion covalently attached to a substitutable core (A) via a sulphide bond, a thiol functional group and optionally a hydrocarbon side chain (L) attached to the substitutable core (A).Type: GrantFiled: July 24, 2023Date of Patent: October 13, 2026Assignee: BLUE SOLUTIONS CANADA INC.Inventors: Qiujie Zhao, Siwei Liang, Jin Yang, Sarah Degras, Patrick Leblanc
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Publication number: 20260313464Abstract: A network device determines at least one of throughput variation and latency variation associated with at least one flow transiting a network slice of a mobile network. The network device compares the at least one of the throughput variation and the latency variation with performance requirements of the network slice, and determines, based on the comparing, network slice resources needed for capacity planning of the network slice. The network device adds or removes network slice resources from the network slice based on the determined network slice resources.Type: ApplicationFiled: June 16, 2026Publication date: October 8, 2026Applicant: Verizon Patent and Licensing Inc.Inventors: Jin Yang, Ravi Potluri
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Publication number: 20260314445Abstract: A 2.5D/3D electronic packaging structure and a method for manufacturing it are disclosed. The method includes: disposing a metal array over a wafer, fixing a first die and a second die to the metal array; removing a portion of the wafer to expose bottom surfaces of the first die and the second die; providing a glass substrate, forming a cavity on the surface of the glass substrate; forming vias through the glass substrate, filling the vias with metal materials to form metal pillars; forming first solder pads each at a first end of one of the metal pillars, and forming second solder pads each at a second end of that metal pillar; embedding the wafer in the cavity, and connecting the first solder pads to the first die and the second die, and connecting the second solder pads to an organic substrate.Type: ApplicationFiled: June 9, 2026Publication date: October 8, 2026Applicant: SJ Semiconductor(Jiangyin) CorporationInventors: Chengchung LIN, Jin YANG
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Patent number: 12757099Abstract: A device may include a processor configured to receive a request to establish a communication session or data flow for a user equipment (UE) device connected to a Radio Access Network (RAN). The processor may be further configured to obtain key performance indicators (KPI) information relating to one or more KPIs for a plurality of paths in a transport network used by the RAN to connect to a core network; determine a KPI requirement for the communication session or data flow to be established; select a path in the transport network based on the obtained KPI information and the determined KPI requirement; and establish the communication session or data flow in the transport network using the selected path.Type: GrantFiled: February 16, 2023Date of Patent: October 6, 2026Assignee: Verizon Patent and Licensing Inc.Inventors: Jin Yang, Mark T. Watts, Kristen Sydney Young, Vishwanath Ramamurthi, Edward Diaz
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Publication number: 20260305454Abstract: A fan-out wafer-level packaging structure and a method for manufacturing it are disclosed. The structure includes: a rewiring layer, a chip, an electrical component, a protective layer made of UV-curable adhesive, a molding layer, and a solder ball. The protective layer is disposed on surfaces of the electrical component, sealing the electrical component, and ensuring its safe operation and reliability, mitigating risks of melting and spillage of solder in the electrical component, and preventing electrical shorts and delamination between molding layers and the electrical component. The protective layer is formed by UV-curing or UV/thermal-dual-curing, to prevent loss of upper portions of the adhesive resulted from the upper portions flowing downward after dispensing. A dual-curing process can further solidify the protective layer, enabling the protective layer to better seal and protect the electrical component.Type: ApplicationFiled: June 9, 2026Publication date: October 1, 2026Applicant: SJ Semiconductor(Jiangyin) CorporationInventors: Chengchung LIN, Jin YANG
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Publication number: 20260304230Abstract: A method includes receiving, by a first network function from an application server, a request to establish a dedicated user plane session with an elevated quality of service (QoS) profile for a wireless device, the request including an embedded subscription to an idle session state. The method includes generating, by the first network function based on the request, a core network notification request configured to track an idle session timer. The method includes forwarding, by the first network function, the core network notification request to a second network function. The method includes receiving, by the first network function from the second network function, a control message indicating that the idle session timer has expired within a user plane function (UPF). The method includes pushing, by the first network function to the application server, a notification informing the application server of the idle session state.Type: ApplicationFiled: June 2, 2026Publication date: October 1, 2026Applicant: Verizon Patent and Licensing Inc.Inventors: Ye HUANG, Lixia YAN, Sudhakar Reddy PATIL, Jin YANG, Michael R. WATERS, Yousef ABDELMALEK, Jerry STEBEN, Raquel MORERA SEMPERE, Emerando M. DELOS REYES
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Patent number: 12750913Abstract: A user equipment (UE) device may include a processor configured to obtain a configuration specification for at least one discontinuous transmission parameter, wherein the configuration specification includes different values for at least two different Quality of Service (QoS) classes. The processor may be further configured to detect uplink data that is to be sent by the UE device to a device via a base station; determine a QoS class associated with the uplink data; select a value for the at least one discontinuous transmission parameter based on the configuration specification and the determined QoS class associated with the uplink data; and send the uplink data to the base station based on the selected value for the at least one discontinuous transmission parameter.Type: GrantFiled: September 20, 2022Date of Patent: September 29, 2026Assignee: Verizon Patent and Licensing Inc.Inventors: Jin Yang, Susan Wu Sanders, Lei Song, Xin Wang
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Patent number: 12750880Abstract: A network device may receive an indication to enable sub-band full duplex uplink transmission for a first user equipment (UE), and may determine whether the first UE and a second UE are associated with a separation that is more than a threshold separation. The network device may enable the sub-band full duplex uplink transmission for the first UE based on determining that the first UE and the second UE are associated with a separation that is more than the threshold separation. The network device may deny the sub-band full duplex uplink transmission for the first UE based on determining that the first UE and the second UE are associated with a separation that is less than the threshold separation.Type: GrantFiled: February 16, 2023Date of Patent: September 29, 2026Assignee: Verizon Patent and Licensing Inc.Inventors: Lei Song, Lily Zhu, Zheng Zhao, Cindy Dong, Jin Yang, Xin Wang
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Publication number: 20260286422Abstract: A method for adjusting the volume of nucleic acid nanoballs. By performing coagulation treatment on a nucleic acid (for example, adding a nucleic acid coagulating agent and/or adjusting the pH value to 3-4.5, so that positively charged counter ions are gathered around the nucleic acid, and negative charges on the surface of the nucleic acid are neutralized by cations by means of electrostatic bonding of anions and cations, thereby enabling the nucleic acid to coagulate), the shape of the nucleic acid nanoballs can be changed, the volume of the nucleic acid nanoballs can be adjusted, and the nucleic acid nanoballs can be compressed. The nucleic acid nanoballs obtained by the method are more compact, smaller in shape, and more uniform in size. The method can be used in any situation where the volume of the nucleic acid nanoballs needs to be adjusted.Type: ApplicationFiled: July 11, 2023Publication date: September 24, 2026Inventors: Qiong Su, Jin Yang, ChongYang Song
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Publication number: 20260292847Abstract: Embodiments of the present disclosure relate to methods, devices and computer readable media for sidelink communications. A method implemented at a first terminal device for sidelink communications comprises: determining, at a first terminal device, whether at least one physical sidelink feedback channel (PSFCH) resource within a duration of a channel occupancy time (COT) is activated for transmission of Hybrid Automatic Repeat Request (HARQ) feedback information; and in accordance with a determination that the at least one PSFCH resource is deactivated for the transmission of the HARQ feedback information, receiving sidelink data on the at least one PSFCH resource.Type: ApplicationFiled: July 27, 2022Publication date: September 24, 2026Applicant: NEC CorporationInventors: Zhaobang MIAO, Jin YANG, Gang WANG
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Patent number: D1150667Type: GrantFiled: November 5, 2025Date of Patent: September 29, 2026Inventors: Jin Yang, Long Hu, ZhengMing Liao