Abstract: A spiral inductor having a lower metal line and an upper metal line with an insulating layer interposed therebetween is provided. In the spiral inductor, the lower and upper metal lines are connected to each other through a via contact passing through the insulating layer. The upper metal line spirally turns inward from the periphery to the center, and the lower metal line includes a first lower metal line crossing the upper metal line and disposed to be parallel with another adjacent first lower metal line, and a second lower metal line disposed to be parallel with the upper metal line.

Abstract: The present invention relates to a method of forming an insulating film in a semiconductor device by which the composition and the doping concentration of oxide are controlled using an atomic layer deposition method. In case of silicon oxide, a thermal oxidization process and a deposition process are sequentially performed to form an oxide film having a good interface characteristic and the deposition speed. On the other hand, in case of depositing an oxide film, an oxynitride film and a metal oxide film, the pulse construction and the supply time of a source and radical are adjusted to form an optimum oxide film having a good interface characteristic.

Abstract: The present invention relates to a method of fabricating an inductor capable of improving a quality factor and decreasing a series resistance by using as a material of the inductor silver smaller in a specific resistance than aluminum used conventionally. The method of fabricating an inductor according to the present invention includes the following steps. A first step is of forming a first metal layer on a first insulating layer, patterning said first metal layer, and forming a second insulating layer on the resultant structure. A second step is of patterning said second insulating layer to form a via hole and forming a plug in said via hole. A third step is of forming a third insulating layer on the resultant structure and patterning said third insulating layer to form a spiral groove. A fourth step is of forming a second metal layer in said spiral groove to form an inductor.

Abstract: The present invention relates to a method of fabricating an inductor capable of improving a quality factor and decreasing a series resistance by using as a material of the inductor silver smaller in a specific resistance than aluminum used conventionally. The method of fabricating an inductor according to the present invention includes the following steps. A first step is of forming a first metal layer on a first insulating layer, patterning said first metal layer, and forming a second insulating layer on the resultant structure. A second step is of patterning said second insulating layer to form a via hole and forming a plug in said via hole. A third step is of forming a third insulating layer on the resultant structure and patterning said third insulating layer to form a spiral groove. A fourth step is of forming a second metal layer in said spiral groove to form an inductor.

Abstract: A phase locked loop (PLL) is use in a radio communication system such as a frequency mixer, a carrier frequency and the like. The phase locked loop (PLL) includes a phase/frequency detector for comparing a phase/frequency of a reference signal and a feedback signal. The phase/frequency detector includes: a NAND gate logic circuit for NANDing a first signal and a second signal to output a NANDed signal; a first latch unit for latching the NANDed signal and outputting the first signal in response to a reference frequency; and a second latch unit for latching the NANDed signal and outputting the second signal in response to a feedback frequency. The phase locked loop (PLL) further includes a filter controller for changing a bandwidth of a low pass filter in response to an output signal of the phase/frequency detector.

Abstract: A phase locked loop (PLL) is used in a radio communication system such as a frequency mixer, a carrier frequency and the like. The phase locked loop (PLL) includes a phase/frequency detector for comparing a phase/frequency of a reference signal and a feedback signal. The phase/frequency detector includes: a NAND gate logic circuit for NANDing a first signal and a second signal to output a NANDed signal; a first latch unit for latching the NANDed signal and outputting the first signal in response to a reference frequency; and a second latch unit for latching the NANDed signal and outputting the second signal in response to a feedback frequency. The phase locked loop (PLL) further includes a filter controller for changing a bandwidth of a low pass filter in response to an output signal of the phase/frequency detector.

Abstract: A vacuum transistor having an optical gate in which an optical signal is radiated from the optical gate. The transistor has a silicon substrate; an insulating layer deposited on said silicon substrate, the insulating layer having a recess portion formed by an etching method; an optical source for radiating the optical signal and serving as said optical gate; and two electrodes formed on said insulating layer and separated from each other under a vacuum or an atmosphere. One of the electrodes receives the optical signal and is an electron emitting electrode for emitting electrons, and the other electrode is an electron collecting electrode for collecting the electrons emitted from said electron emitting electrode. The electron emitting electrode is formed beneath said optical source under a vacuum or an atmosphere and is connected to ground; and said electron collecting electrode is connected to a power source.