Abstract: A controller that controls a memory device including a plurality of pages each corresponding to a physical address, the controller may include: a memory suitable for storing a plurality of logical-to-physical (L2P) chunks each indicating mapping between one or more logical addresses and one or more physical addresses and an original valid page bitmap (VPB) indicating whether each of the plurality of pages is a valid page that stores valid data; and a processor suitable for generating a reconstructed VPB based on normal L2P chunks when an corrupted L2P chunk is detected, detecting pages having different states in the original VPB and the reconstructed VPB, obtaining logical addresses mapped to physical addresses of the detected pages, respectively, and recovering the corrupted L2P chunk based on the physical addresses of the detected pages and the obtained logical addresses.

Abstract: The present technology relates to an electronic device. According to the present technology, a storage device that manages map data using a volatile memory device having a limited capacity may include a nonvolatile memory device and a memory controller which includes a map chunk buffer, a map chunk status table, a journal buffer, and a meta slice buffer.

Abstract: The present invention relates to a graphene channel member comprising a graphene film and a cadaverine olfactory receptor immobilized to the graphene film, a graphene transistor comprising: a substrate; the graphene channel member; and a pair of electrodes, and a bio sensor comprising same.

Abstract: Embodiments of the present disclosure relate to a memory system and an operating method thereof. According to the embodiments of the present disclosure, the memory system may store target data to be programmed in a memory device in a first memory, selectively store the target data in a second memory, program the target data stored in the first memory into the memory device, and reprogram the target data stored in the first memory or the second memory into the memory device when the programming of the target data stored in the first memory into the memory device fails. The buffer circuit may input the target data input from the memory controller into the second memory or discard the target data.

Abstract: A display device and a method of manufacturing the same are provided. A display device includes: a substrate including a plurality of pixels; a first electrode and a second electrode spaced apart from each other on the substrate; a light emitting element located between the first electrode and the second electrode; and a conductive pattern on the light emitting element. The light emitting element includes a first semiconductor layer, a second semiconductor layer, and an active layer between the first semiconductor layer and the second semiconductor layer, and the conductive pattern overlaps the active layer and does not overlap the first semiconductor layer or the second semiconductor layer.

Abstract: A light emitting diode display device including: an organic light emitting diode including an anode electrode; a first transistor for providing a current to the anode electrode of the organic light emitting diode; a second transistor for transmitting a voltage to a gate electrode of the first transistor; a first capacitor for storing the voltage transmitted to the gate electrode of the first transistor; and a second capacitor disposed between a first electrode of the second transistor and a data line, wherein the first electrode of the second transistor is directly connected to the anode electrode of the organic light emitting diode.

Abstract: A memory system comprising: a controller generates meta data in accordance with normal data being stored in a non-volatile memory device, and a buffer memory stores multiple meta slices configuring the meta data, the controller classifies an updated slice of the multiple meta slices as a first dirty slice, classifies a flushed slice of the first dirty slices as a second dirty slice, classifies a flushed slice of the second dirty slices as the meta slice and classifies an updated slice of the second dirty slices as a third dirty slice, classifies a flushed slice of the third dirty slices as the second dirty slice, and permits an update of each of the first to third dirty slices in a section in which a flush operation for each of the first to third dirty slices is performed.

Abstract: Embodiments of the present disclosure relate to a memory system, a memory controller, and a method of operating the same, and more particularly, to a memory system, a memory controller, and a method of operating the same, which calculate a read-attribute value, a write-attribute value, and a time-attribute value for a nonvolatile memory set and determine an operation mode of the nonvolatile memory set on the basis of at least one of the read-attribute value, the write-attribute value, and the time-attribute value, thereby enabling a host to predict whether or not a memory controller executes a background operation.

Abstract: The memory controller controls at least one memory device including a plurality of stream storage areas. The memory controller comprises a buffer, a write history manager, a write controller, and a garbage collection controller. The buffer stores write data. The write history manager stores write count values for each of the plurality of stream storage areas and generates write history information indicating a write operation frequency for each of the plurality of stream storage areas based on the write count values. The write controller controls the at least one memory device to store the write data provided from the buffer. The garbage collection controller controls the at least one memory device to perform a garbage collection operation on a target stream storage area selected from among the plurality of stream storage areas based on the write history information.

Abstract: The present invention relates to a carbene compound having substituted at the terminal polyethylene glycol (PEG) having nitrogen-containing functional groups, a carbene-metal nanoparticle complex in which the carbene compound and metal nanoparticles are bounded, a preparation method thereof, and a biosensor using same.

Abstract: A controller that controls a memory device including a plurality of pages each corresponding to a physical address, the controller may include: a memory suitable for storing a plurality of logical-to-physical (L2P) chunks each indicating mapping between one or more logical addresses and one or more physical addresses and an original valid page bitmap (VPB) indicating whether each of the plurality of pages is a valid page that stores valid data; and a processor suitable for generating a reconstructed VPB based on normal L2P chunks when an corrupted L2P chunk is detected, detecting pages having different states in the original VPB and the reconstructed VPB, obtaining logical addresses mapped to physical addresses of the detected pages, respectively, and recovering the corrupted L2P chunk based on the physical addresses of the detected pages and the obtained logical addresses.

Abstract: A display device includes a first substrate including a plurality of unit light emitting areas; a first electrode and a second electrode in each of the unit light emitting areas of the first substrate; a first insulation layer exposing one region of each of the first electrode and the second electrode; a light emitting element on the first insulation layer and having a first end and a second end in a length direction; light conversion patterns adjacent to the light emitting element, covering a portion of an upper surface of the light emitting element, and exposing the first and second ends of the light emitting element; a first contact electrode on the first electrode and connecting the one region of the exposed first electrode and the first end of the light emitting element; and a second contact electrode on the second electrode.

Abstract: Embodiments of the present disclosure relate to a memory system, a memory controller, and a method of operating the same, and more particularly, to a memory system, a memory controller, and a method of operating the same, which calculate a read-attribute value, a write-attribute value, and a time-attribute value for a nonvolatile memory set and determine an operation mode of the nonvolatile memory set on the basis of at least one of the read-attribute value, the write-attribute value, and the time-attribute value, thereby enabling a host to predict whether or not a memory controller executes a background operation.

Abstract: A display device includes: a substrate having a display area and a non-display area; and a pixel in each of a pixel area in the display area. Each of the pixels includes: an insulating layer on the substrate and having an opening; first and second electrodes on the insulating layer and spaced apart from each other; a plurality of light emitting elements in the opening; a first contact electrode electrically connecting one end of the light emitting elements and the first electrode to each other; a second contact electrode electrically connecting another end of the light emitting elements and the second electrode to each other; a first insulating pattern on the first contact electrode; and a second insulating pattern on the second contact electrode. The first insulating pattern and the second insulating pattern are on the same layer and spaced apart from each other.

Abstract: The present invention relates to a substrate for nucleic acid amplification, and a method for manufacturing same, the substrate for rapid and accurate PCR analysis comprising: a transparent substrate; a metal layer formed on the transparent substrate; an N-heterocyclic carbene compound having one end annealed to the surface of the metal layer; and a primer immobilized on the other end of the N-heterocyclic carbene compound.

Abstract: A display device includes a substrate. A first electrode, a second electrode, and a third electrode are on the substrate, and are sequentially arranged along a first direction. A first light emitting element is located between the first electrode and the second electrode. A second light emitting element is located between the second electrode and the third electrode. A first contact electrode overlaps the first electrode and one end of the first light emitting element, and is in contact with the first electrode and the one end of the first light emitting element. A second contact electrode overlaps and is in contact with the other end of the first light emitting element. A third contact electrode overlaps and is in contact with the second electrode and the other end of the second light emitting element. The second contact electrode extends while detouring the third contact electrode.

Abstract: The present invention relates to a substrate for nucleic acid amplification, and a method for manufacturing same, the substrate for rapid and accurate PCR analysis comprising: a transparent substrate; a micro-patterned metal layer formed on the transparent substrate; an N-heterocyclic carbene compound having one end annealed to the surface of the micro-patterned metal layer; and a primer immobilized on the other end of the N-heterocyclic carbene compound.

Abstract: A head-mounted display device includes a display including a substrate and a plurality of display elements disposed on the substrate, a first polarizing layer disposed on the display, a reflective layer disposed on the first polarizing layer, a light-separating layer disposed on the reflective layer, a lens disposed on the light-separating layer, and a second polarizing layer disposed on the lens.

Abstract: Provided is a display device including a substrate including a display area including a plurality of pixel areas, and a non-display area outside the display area, a pixel circuit layer including a plurality of circuit elements in the display area, a display element layer including a plurality of light-emitting elements in the display area on the pixel circuit layer, and first and second alignment lines on the substrate, and each including a main line at the same layer as at least one electrode on the display element layer, and a sub line electrically connected to the main line and at the same layer as at least one electrode on the pixel circuit layer, wherein the first alignment line and the second alignment line do not include the main line in the non-display area, and include the sub line to be spaced apart from one edge of the substrate.

Abstract: The present invention relates to a graphene transistor comprising: a substrate; a graphene channel layer arranged on the substrate; a pair of metals spaced from each other and respectively arranged at opposite ends of the graphene channel layer; and a linker layer arranged on the graphene channel layer and including an N-heterocyclic carbene compound, a fabrication method therefor, and a biosensor comprising the same. The graphene transistor according to the present invention in which the carbene group of the N-heterocyclic carbene compound forms a covalent bond with the graphene channel layer to modify the whole surface of the graphene channel layer exhibits excellent electric conductivity as a transistor and a biosensor comprising the transistor is improved in selectivity and sensitivity.