Abstract: The present disclosure relates to a flexible temperature sensor, a method for preparing the same, and a flexible device. The flexible temperature sensor includes: a flexible substrate; an electrode arranged on the flexible substrate; a mixed fluid arranged on the flexible substrate and in contact with the electrode, in which the mixed fluid includes an ionic liquid and porous conductive particles; and a protective plate arranged on a surface of the flexible substrate having the mixed fluid to protect the mixed fluid.

Abstract: The present disclosure discloses a manufacturing method of an array substrate, an array substrate, a display panel and a display device. The manufacturing method includes: forming a metal layer on a base substrate; forming a protective layer on the side, away from the base substrate, of the metal layer, wherein the protective layer is configured to protect the metal layer; forming photoresist on the side, away from the base substrate, of the protective layer; and processing the base substrate, on which the metal layer, the protective layer and the photoresist are formed, by means of a photoetching process to obtain a metal pattern.

Abstract: Embodiments of the present disclosure disclose a thin film transistor, a method for manufacturing a thin film transistor, an array substrate, and a display device. The thin film transistor includes a source electrode and a drain electrode, each of the source electrode and the drain electrode including a metal substrate and a conductive layer covering the metal substrate. An adhesion between the conductive layer and a photoresist material is larger than an adhesion between the metal substrate and the photoresist material. The metal substrate and the conductive layer are both formed on a base substrate, an orthographic projection of the conductive layer on the base substrate covers an orthographic projection of the metal substrate on the base substrate, and. an area of the orthographic projection of the conductive layer on the base substrate is larger than an area of the orthographic projection of the metal substrate on the base substrate.

Abstract: A method for manufacturing an array substrate, including forming a thin film transistor and a peripheral circuit; forming a passivation layer covering at least the thin film transistor and the peripheral circuit; forming a first via hole penetrating the passivation layer and exposing part of a drain of the thin film transistor, and a second via hole penetrating the passivation layer and exposing part of the peripheral circuit; forming a first conductive layer pattern on the passivation layer, the first conductive layer pattern covering the first via hole and the second via hole; forming a reflective metal layer pattern and a second conductive layer pattern on the first conductive layer pattern, the second conductive layer pattern covering the second via hole.

Abstract: This disclosure provides an array substrate, a method for fabricating the same, a display panel, and a display device, where a first photo-resist layer is stripped in a changed order in that the first photo-resist layer on a source-drain is stripped through wet etching before a ohm contact layer film and an active layer film are etched in an electrically-conductive channel area (i.e., an electrically-conductive channel of a TFT is etched) to form an ohm contact layer and an active layer.

Abstract: A dual-gate thin film transistor, a manufacturing method thereof, an array substrate and a display device are provided. The dual-gate thin film transistor includes: a base substrate and a first gate, a first gate insulating layer, an active layer, a second gate insulating layer, a first electrode, a second electrode, a second gate and a connection electrode, formed on the base substrate. The second gate, the first electrode and the second electrode are formed on the same level. The first gate insulating layer includes a first via hole exposing a portion of the first gate, and the connection electrode is electrically connected with the second gate and is electrically connected with the first gate through the first via hole.

Abstract: This disclosure provides an array substrate, a method for fabricating the same, a display panel, and a display device, where a first photo-resist layer is stripped in a changed order in that the first photo-resist layer on a source-drain is stripped through wet etching before a ohm contact layer film and an active layer film are etched in an electrically-conductive channel area (i.e., an electrically-conductive channel of a TFT is etched) to form an ohm contact layer and an active layer.

Abstract: A mask and a method for preparing the mask are provided in embodiments of the present disclosure. The mask includes: a substrate; and at least one first photo-resistance structure and at least one second photo-resistance structure on the substrate; the first photo-resistance structure includes a first light shielding film layer and an optical filter film layer, and the optical filter film layer includes a first optical filter portion whose orthographic projection on the substrate is located out of an edge of an orthographic projection of the first light shielding film layer on the substrate and adjoins the edge of the orthographic projection of the first light shielding film layer on the substrate; and the second photo-resistance structure merely includes a second light shielding film layer.

Abstract: Embodiments of the present disclosure disclose a thin film transistor, a method for manufacturing a thin film transistor, an array substrate, and a display device. The thin film transistor includes a source electrode and a drain electrode, each of the source electrode and the drain electrode including a metal substrate and a conductive layer covering the metal substrate. An adhesion between the conductive layer and a photoresist material is larger than an adhesion between the metal substrate and the photoresist material. The metal substrate and the conductive layer are both formed on a base substrate, an orthographic projection of the conductive layer on the base substrate covers an orthographic projection of the metal substrate on the base substrate, and. an area of the orthographic projection of the conductive layer on the base substrate is larger than an area of the orthographic projection of the metal substrate on the base substrate.

Abstract: A dual-gate thin film transistor, a manufacturing method thereof, an array substrate and a display device are provided. The dual-gate thin film transistor includes: a base substrate and a first gate, a first gate insulating layer, an active layer, a second gate insulating layer, a first electrode, a second electrode, a second gate and a connection electrode, formed on the base substrate. The second gate, the first electrode and the second electrode are formed on the same level. The first gate insulating layer includes a first via hole exposing a portion of the first gate, and the connection electrode is electrically connected with the second gate and is electrically connected with the first gate through the first via hole.

Abstract: The present disclosure relates to a flexible temperature sensor, a method for preparing the same, and a flexible device. The flexible temperature sensor includes: a flexible substrate; an electrode arranged on the flexible substrate; a mixed fluid arranged on the flexible substrate and in contact with the electrode, in which the mixed fluid includes an ionic liquid and porous conductive particles; and a protective plate arranged on a surface of the flexible substrate having the mixed fluid to protect the mixed fluid.

Abstract: An array substrate motherboard, a manufacturing method thereof and a display device are provided. The manufacturing method includes forming a film layer pattern for a first display product at a first region of a base substrate and forming a film layer pattern for a second display product at a second region of the base substrate. The first display product has deep holes at a density larger than the second display product, and each deep hole is a via-hole penetrating through at least two insulation layers. Specifically, the manufacturing method include: prior to forming a second conductive pattern on an insulation layer, reducing a thickness of the insulation layer at the first region; and forming the second conductive pattern on the insulation layer, and enabling the second conductive pattern to be connected to a first conductive pattern under the insulation layer through a via-hole structure penetrating through the insulation layer.

Abstract: An array substrate, a testing method and a manufacturing method of the array substrate are disclosed. The array substrate comprises a first test line (3), a second test line (4), and first data lines (1) and second data lines (2) that are disposed alternately. The first data lines (1) are directly connected to the first test line (3), and the second data lines (2) are connected to the second test line (4) through switch elements (7); or, the second data lines (2) are directly connected to the second test line (4), and the first data lines (1) are connected to the first test line (3) through switch elements (7). With the array substrate, charges in the display region can be avoided from being transferred to a test line, thereby decreasing the accumulation of static electricity, and enhancing reliability of the short bar region.

Abstract: Embodiments of the present invention relate to a thin-film transistor (TFT) and a manufacturing method thereof, an array substrate and a manufacturing method thereof, and a display device. The TFT includes an active layer, an amorphous silicon (a-Si) connecting layer and a source-drain electrode layer. The active layer includes a channel region, a source region and a drain region; forming materials of the channel region include polycrystalline silicon (poly-Si); the a-Si connecting layer is disposed on a side of the active layer and includes a first connecting part and a second connecting part which are spaced from each other; the source-drain electrode layer includes a source electrode and a drain electrode which are spaced to each other; the source electrode is electrically connected with the source region through the first connecting part; and the drain electrode is electrically connected with the drain electrode through the second connecting part.

Abstract: Disclosed is an array substrate including a base substrate and a gate metal layer, a semiconductor layer, a source-drain metal layer, and a pixel electrode layer that are formed on the base substrate. The gate metal layer includes gate lines, gate electrodes of thin film transistors, and a plurality of first sensing lines extending along a row direction. The semiconductor layer includes an active layer of the thin film transistors, and a plurality of first photosensitive elements and a plurality of second photosensitive elements that are insulated from each other. The source-drain metal layer includes data lines, source electrodes and drain electrodes of the thin film transistors, and a plurality of second sensing lines extending along a column direction. Also disclosed are a method of fabricating the array substrate, an optical touch screen and a display device.

Abstract: The present application discloses A thin film transistor (TFT), including: a substrate; a source-drain layer comprising a source electrode and a drain electrode over the substrate; and an active layer comprising a poly-Si pattern and an amorphous-Si pattern having contact with the poly-Si pattern over the substrate. The amorphous-Si pattern is between the poly-Si pattern and the source-drain layer; the source electrode overlaps with the poly-Si pattern and the amorphous-Si pattern respectively in a direction substantially perpendicular to a surface of the substrate; and the drain electrode overlaps with the poly-Si pattern and the amorphous-Si pattern respectively in the direction substantially perpendicular to the surface of the substrate.

Abstract: The present application discloses A thin film transistor (TFT), including: a substrate; a source-drain layer comprising a source electrode and a drain electrode over the substrate; and an active layer comprising a poly-Si pattern and an amorphous-Si pattern having contact with the poly-Si pattern over the substrate. The amorphous-Si pattern is between the poly-Si pattern and the source-drain layer; the source electrode overlaps with the poly-Si pattern and the amorphous-Si pattern respectively in a direction substantially perpendicular to a surface of the substrate; and the drain electrode overlaps with the poly-Si pattern and the amorphous-Si pattern respectively in the direction substantially perpendicular to the surface of the substrate.

Abstract: An array substrate motherboard, a manufacturing method thereof and a display device are provided. The manufacturing method includes forming a film layer pattern for a first display product at a first region of a base substrate and forming a film layer pattern for a second display product at a second region of the base substrate. The first display product has deep holes at a density larger than the second display product, and each deep hole is a via-hole penetrating through at least two insulation layers. Specifically, the manufacturing method include: prior to forming a second conductive pattern on an insulation layer, reducing a thickness of the insulation layer at the first region; and forming the second conductive pattern on the insulation layer, and enabling the second conductive pattern to be connected to a first conductive pattern under the insulation layer through a via-hole structure penetrating through the insulation layer.

Abstract: A substrate and a manufacturing method thereof, and a display device are provided. The substrate comprises a base substrate (101), a metal black matrix (111) and an anti-reflection pattern (112A, 112B) for reducing optical reflectivity of the metal black matrix (111), which are arranged on the base substrate (101), and the anti-reflection pattern (112A, 112B) is arranged on a side of the metal black matrix (111) close to a light emission side of the substrate. The anti-reflection pattern (112A, 112B) reduces reflectivity of the metal black matrix (111) on outside ambient light, increases a display contrast of a display device that includes the substrate, and thus improves display quality of the pictures.

Abstract: Embodiments of the present invention relate to a thin-film transistor (TFT) and a manufacturing method thereof, an array substrate and a manufacturing method thereof, and a display device. The TFT includes an active layer, an amorphous silicon (a-Si) connecting layer and a source-drain electrode layer. The active layer includes a channel region, a source region and a drain region; forming materials of the channel region include polycrystalline silicon (poly-Si); the a-Si connecting layer is disposed on a side of the active layer and includes a first connecting part and a second connecting part which are spaced from each other; the source-drain electrode layer includes a source electrode and a drain electrode which are spaced to each other; the source electrode is electrically connected with the source region through the first connecting part; and the drain electrode is electrically connected with the drain electrode through the second connecting part.