Patents by Inventor Jinchao Bai

Jinchao Bai has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20180197998
    Abstract: The present application discloses A thin film transistor (TFT), including: a substrate; a source-drain layer comprising a source electrode and a drain electrode over the substrate; and an active layer comprising a poly-Si pattern and an amorphous-Si pattern having contact with the poly-Si pattern over the substrate. The amorphous-Si pattern is between the poly-Si pattern and the source-drain layer; the source electrode overlaps with the poly-Si pattern and the amorphous-Si pattern respectively in a direction substantially perpendicular to a surface of the substrate; and the drain electrode overlaps with the poly-Si pattern and the amorphous-Si pattern respectively in the direction substantially perpendicular to the surface of the substrate.
    Type: Application
    Filed: January 25, 2017
    Publication date: July 12, 2018
    Applicants: BOE TECHNOLOGY GROUP CO., LTD., BEIJING BOE DISPLAY TECHNOLOGY CO., LTD.
    Inventors: Jinchao Bai, Huibin Guo, Xiangqian Ding, Jing Wang
  • Patent number: 10014329
    Abstract: An array substrate and manufacturing method thereof and display device are provided. The method of manufacturing the array substrate includes forming a pattern including a gate electrode, a gate line, a common electrode line and a gate insulating layer on a substrate; forming a pattern including a data line, a source electrode, a drain electrode and an active layer; forming a pattern including an insulating interlayer over the pattern of the source electrode, the drain electrode and the active layer; forming a pattern including a first transparent electrode over the insulating interlayer; forming a pattern including a passivation layer over the first transparent electrode; and forming a pattern including a second transparent electrode over the passivation layer. The method can efficiently prevent the ITO process polluting the TFT channel.
    Type: Grant
    Filed: September 11, 2014
    Date of Patent: July 3, 2018
    Assignees: BOE Technology Group Co., Ltd., Beijing BOE Display Technology Co., Ltd.
    Inventors: Jinchao Bai, Xiangqian Ding, Yao Liu, Liangliang Li, Zongjie Guo
  • Patent number: 9958747
    Abstract: An array substrate and a manufacturing method thereof, a display panel and a display device are disclosed. The method for manufacturing an array substrate includes: forming a first via hole for connecting a second transparent electrically conductive layer and a gate line layer, a second via hole for connecting a first transparent electrically conductive layer and the second transparent electrically conductive layer, and a third via hole for connecting the second transparent electrically conductive layer and a source/drain electrode layer on a base substrate through patterning process; performing a filling process on the first via hole, the second via hole and the third via hole during a pattern of second transparent electrically conductive layer is being formed, such that each of the three via holes has a top surface which is flush with the second transparent electrically conductive layer surrounding the respective via holes.
    Type: Grant
    Filed: August 29, 2016
    Date of Patent: May 1, 2018
    Assignees: BOE TECHNOLOGY GROUP CO., LTD., BEIJING BOE DISPLAY TECHNOLOGY CO., LTD.
    Inventors: Jinchao Bai, Huibin Guo, Yao Liu, Xiangqian Ding
  • Patent number: 9879343
    Abstract: A detection device includes a chamber for vacuum coating, a capacitance measurement device and a baffle mechanism located in the chamber. The baffle mechanism is a closed structure encompassed by a number of baffle walls, wherein at least one baffle wall includes a fixed baffle plate and a moveable baffle plate. The moveable baffle plate is pivotable about the fixed baffle plate. The moveable baffle plate, after pivoting, may get parallel with an adjacent baffle wall. The adjacent baffle wall and the moveable baffle plate are respectively connected to the capacitance measurement device, and the capacitance measurement device is used to measure the capacitance between the adjacent baffle wall and the moveable baffle plate. The detection device may accurately detect the service life of the baffle mechanism and achieve precise management of the apparatus.
    Type: Grant
    Filed: September 25, 2014
    Date of Patent: January 30, 2018
    Assignees: BOE TECHNOLOGY GROUP CO., LTD., BEIJING BOE DISPLAY TECHNOLOGY CO. LTD.
    Inventors: Xiaowei Liu, Yao Liu, Xiangqian Ding, Jinchao Bai
  • Publication number: 20170285807
    Abstract: The embodiments of the disclosure disclose a touch display panel, a method for fabrication thereof and a display device. The touch display panel comprises a display substrate, a transparent conductive layer formed on the display substrate, a transparent insulating layer formed on the transparent conductive layer, and a touch electrode formed on the transparent insulating layer. The embodiments of the disclosure can reduce accumulation of static electricity in the manufacture procedure of the display substrate and prevent electromagnetic interference when performing cell test by adding a transparent conductive layer and a transparent insulating layer between the touch substrate and the touch electrode.
    Type: Application
    Filed: April 14, 2016
    Publication date: October 5, 2017
    Applicants: Boe Technology Group Co., Ltd., Beijing Boe Display Technology Co., Ltd.
    Inventors: Xiaowei LIU, Yao LIU, Liangliang LI, Xiangqian DING, Jinchao BAI
  • Publication number: 20170276968
    Abstract: A substrate and a manufacturing method thereof, and a display device are provided. The substrate comprises a base substrate (101), a metal black matrix (111) and an anti-reflection pattern (112A, 112B) for reducing optical reflectivity of the metal black matrix (111), which are arranged on the base substrate (101), and the anti-reflection pattern (112A, 112B) is arranged on a side of the metal black matrix (111) close to a light emission side of the substrate. The anti-reflection pattern (112A, 112B) reduces reflectivity of the metal black matrix (111) on outside ambient light, increases a display contrast of a display device that includes the substrate, and thus improves display quality of the pictures.
    Type: Application
    Filed: September 7, 2016
    Publication date: September 28, 2017
    Inventors: Jinchao BAI, Yao LIU, Huibin GUO
  • Publication number: 20170269445
    Abstract: An array substrate and a manufacturing method thereof, a display panel and a display device are disclosed.
    Type: Application
    Filed: August 29, 2016
    Publication date: September 21, 2017
    Inventors: Jinchao BAI, Huibin GUO, Yao LIU, Xiangqian DING
  • Publication number: 20170212621
    Abstract: Disclosed is an array substrate including a base substrate and a gate metal layer, a semiconductor layer, a source-drain metal layer, and a pixel electrode layer that are formed on the base substrate. The gate metal layer includes gate lines, gate electrodes of thin film transistors, and a plurality of first sensing lines extending along a row direction. The semiconductor layer includes an active layer of the thin film transistors, and a plurality of first photosensitive elements and a plurality of second photosensitive elements that are insulated from each other. The source-drain metal layer includes data lines, source electrodes and drain electrodes of the thin film transistors, and a plurality of second sensing lines extending along a column direction. Also disclosed are a method of fabricating the array substrate, an optical touch screen and a display device.
    Type: Application
    Filed: March 24, 2016
    Publication date: July 27, 2017
    Inventors: Jinchao Bai, Tsungchieh Kuo, Xiangqian Ding, Yao Liu, Xiaowei Liu, Xi Chen
  • Patent number: 9710089
    Abstract: A touch display panel, a manufacturing method thereof, a driving method and a touch display device are disclosed. The touch display panel comprises an array substrate and a color film substrate, wherein the array substrate comprises a first thin film transistor and a first detection line formed on a first substrate, and the color film substrate comprises a main spacer, an auxiliary spacer, a reference signal line and a second detection line formed on a second substrate. The bottom of the main spacer is connected to the reference signal line, the top of the main spacer is connected to a first source, the bottom of the auxiliary spacer is connected to the second detection line, and a projection of the top of the auxiliary spacer on the array substrate connects a first drain with the first detection line.
    Type: Grant
    Filed: July 16, 2015
    Date of Patent: July 18, 2017
    Assignees: BOE TECHNOLOGY GROUP CO., LTD., BEIJING BOE DISPLAY TECHNOLOGY CO., LTD.
    Inventors: Xi Chen, Jinchao Bai, Zheng Liu, Xiaoxiang Zhang, Mingxuan Liu, Zhichao Zhang
  • Patent number: 9673229
    Abstract: An array substrate, a method for manufacturing the same and a display apparatus are provided. The array substrate comprises: a substrate (1); a common electrode (2) and a pixel electrode (10) sequentially formed on the substrate (1) and insulated from each other; a thin film transistor comprising a gate electrode (4), an active layer (7), a source electrode (8a) and a drain electrode (8b), wherein the drain electrode (8b) is electrically connected with the pixel electrode (10); a common electrode line (5) disposed in a same layer as the gate electrode (4); and an insulating layer (3) between the gate electrode (4) and the common electrode (2), wherein the common electrode (2) is connected with the common electrode line (5) through a through hole in the insulating layer (3).
    Type: Grant
    Filed: June 9, 2016
    Date of Patent: June 6, 2017
    Assignees: BOE TECHNOLOGY GROUP CO., LTD., BEIJING BOE DISPLAY TECHNOLOGY CO., LTD.
    Inventors: Jinchao Bai, Yao Liu, Liangliang Li, Zhaohui Hao, Liang Sun
  • Publication number: 20170110587
    Abstract: An array substrate and a manufacturing method thereof, a display panel, and a display device are provided. The array substrate includes a substrate; a source-drain metallic layer and a first passivation metallic protective layer formed in sequence on the substrate, the source-drain metallic layer including a source electrode and a drain electrode not contacted with each other; a conductive protection layer formed on the substrate on which the first passivation metallic protection layer has been formed; and a pixel electrode formed on the substrate on which the conductive protection layer has been formed, the pixel electrode contacting the conductive protection layer.
    Type: Application
    Filed: September 1, 2016
    Publication date: April 20, 2017
    Inventors: Yao LIU, Jinchao BAI, Xiangqian DING, Huibin GUO, Xi CHEN, Qihui WANG, Jing WANG
  • Publication number: 20160342251
    Abstract: A touch display panel, a manufacturing method thereof, a driving method and a touch display device are disclosed. The touch display panel comprises an array substrate and a color film substrate, wherein the array substrate comprises a first thin film transistor and a first detection line formed on a first substrate, and the color film substrate comprises a main spacer, an auxiliary spacer, a reference signal line and a second detection line formed on a second substrate. The bottom of the main spacer is connected to the reference signal line, the top of the main spacer is connected to a first source, the bottom of the auxiliary spacer is connected to the second detection line, and a projection of the top of the auxiliary spacer on the array substrate connects a first drain with the first detection line.
    Type: Application
    Filed: July 16, 2015
    Publication date: November 24, 2016
    Inventors: Xi CHEN, Jinchao BAI, Zheng LIU, Xiaoxiang ZHANG, Mingxuan LIU, Zhichao ZHANG
  • Publication number: 20160307930
    Abstract: The present invention provides an array substrate which is divided into a plurality of pixel units each having a first transparent electrode and a thin film transistor provided therein, the thin film transistor comprising a drain, and the drain of the thin film transistor being arranged on the first transparent electrode and electrically connected to the first transparent electrode. The present invention further provides a manufacturing method of an array substrate and a display device. Compared with the prior art, in the present invention, as the first transparent electrode is arranged below the drain, the height of a step formed on the first transparent electrode is small so that no fracture will occur on the first transparent electrode during the formation of the first transparent electrode.
    Type: Application
    Filed: August 20, 2015
    Publication date: October 20, 2016
    Inventors: Zheng LIU, Jinchao BAI, Zhichao ZHANG, Xiaoxiang ZHANG, Mingxuan LIU, Tsung Chieh KUO
  • Publication number: 20160293637
    Abstract: An array substrate, a method for manufacturing the same and a display apparatus are provided. The array substrate comprises: a substrate (1); a common electrode (2) and a pixel electrode (10) sequentially formed on the substrate (1) and insulated from each other; a thin film transistor comprising a gate electrode (4), an active layer (7), a source electrode (8a) and a drain electrode (8b), wherein the drain electrode (8b) is electrically connected with the pixel electrode (10); a common electrode line (5) disposed in a same layer as the gate electrode (4); and an insulating layer (3) between the gate electrode (4) and the common electrode (2), wherein the common electrode (2) is connected with the common electrode line (5) through a through hole in the insulating layer (3).
    Type: Application
    Filed: June 9, 2016
    Publication date: October 6, 2016
    Inventors: Jinchao BAI, Yao LIU, Liangliang LI, Zhaohui HAO, Liang SUN
  • Patent number: 9461078
    Abstract: According to the method for manufacturing an array substrate of the present disclosure, when two non-adjacent conductive layers are electrically connected to each other through the via-holes, the insulating layers between the adjacent conductive layers may be etched by several etching processes so as to form the corresponding via-holes in the insulating layer, thereby to achieve the electrical connection between the non-adjacent conductive layers. Meanwhile, it is also able to achieve the electrical connection between the adjacent conductive layers through the via-holes in each etching process. In other words, when at least three conductive layers are electrically connected with each other through the via-holes, merely the insulating layer between the adjacent conductive layers is etched in each etching process.
    Type: Grant
    Filed: April 8, 2014
    Date of Patent: October 4, 2016
    Assignees: BOE Technology Group Co., Ltd., Beijing BOE Display Technology Co., Ltd.
    Inventors: Jinchao Bai, Yao Liu, Liangliang Li, Xiangqian Ding, Zongjie Guo
  • Publication number: 20160276378
    Abstract: According to the method for manufacturing an array substrate of the present disclosure, when two non-adjacent conductive layers are electrically connected to each other through the via-holes, the insulating layers between the adjacent conductive layers may be etched by several etching processes so as to form the corresponding via-holes in the insulating layer, thereby to achieve the electrical connection between the non-adjacent conductive layers. Meanwhile, it is also able to achieve the electrical connection between the adjacent conductive layers through the via-holes in each etching process. In other words, when at least three conductive layers are electrically connected with each other through the via-holes, merely the insulating layer between the adjacent conductive layers is etched in each etching process.
    Type: Application
    Filed: April 8, 2014
    Publication date: September 22, 2016
    Applicants: BOE TECHNOLOGY GROUP CO., LTD., BEIJING BOE DISPLAY TECHNOLOGY CO., LTD.
    Inventors: JINCHAO BAI, YAO LIU, LIANGLIANG LI, XIANGQIAN DING, ZONGIE GUO
  • Publication number: 20160254289
    Abstract: An array substrate and manufacturing method thereof and display device are provided. The method of manufacturing the array substrate includes forming a pattern including a gate electrode, a gate line, a common electrode line and a gate insulating layer on a substrate; forming a pattern including a data line, a source electrode, a drain electrode and an active layer; forming a pattern including an insulating interlayer over the pattern of the source electrode, the drain electrode and the active layer; forming a pattern including a first transparent electrode over the insulating interlayer; forming a pattern including a passivation layer over the first transparent electrode; and forming a pattern including a second transparent electrode over the passivation layer. The method can efficiently prevent the ITO process polluting the TFT channel.
    Type: Application
    Filed: September 11, 2014
    Publication date: September 1, 2016
    Inventors: Jinchao BAI, Xiangqian DING, Yao LIU, Liangliang LI, Zongjie GUO
  • Publication number: 20160233247
    Abstract: An array substrate including a base substrate is disclosed; the base substrate is divided into a pixel region and a peripheral circuit region, the pixel region sequentially includes a gate electrode, a gate insulation layer, a semiconductor active layer, a pixel electrode, a source/drain electrode, a passivation layer and a common electrode; the peripheral circuit region sequentially includes a first circuit line, the gate insulation layer, a second circuit line and the passivation layer. An orthogonal projection area of the second circuit line is at least partly overlapped with an orthogonal projection area of the first circuit line on the base substrate, and the second circuit line is directly electrically connected with the first circuit line through a via hole penetrating the gate insulation layer. A method for manufacturing the array substrate and a display device including the array substrate are also disclosed.
    Type: Application
    Filed: June 12, 2015
    Publication date: August 11, 2016
    Inventors: Jinchao Bai, Zongjie Guo, Xiangqian Ding, Xiaowei Liu, Yao Liu
  • Patent number: 9412760
    Abstract: An array substrate including a base substrate is disclosed; the base substrate is divided into a pixel region and a peripheral circuit region, the pixel region sequentially includes a gate electrode, a gate insulation layer, a semiconductor active layer, a pixel electrode, a source/drain electrode, a passivation layer and a common electrode; the peripheral circuit region sequentially includes a first circuit line, the gate insulation layer, a second circuit line and the passivation layer. An orthogonal projection area of the second circuit line is at least partly overlapped with an orthogonal projection area of the first circuit line on the base substrate, and the second circuit line is directly electrically connected with the first circuit line through a via hole penetrating the gate insulation layer. A method for manufacturing the array substrate and a display device including the array substrate are also disclosed.
    Type: Grant
    Filed: June 12, 2015
    Date of Patent: August 9, 2016
    Assignees: BOE Technology Group Co., Ltd., Beijing BOE Display Technology Co., Ltd.
    Inventors: Jinchao Bai, Zongjie Guo, Xiangqian Ding, Xiaowei Liu, Yao Liu
  • Patent number: 9412761
    Abstract: An array substrate, a method for manufacturing the same and a display apparatus are provided. The array substrate comprises: a substrate (1); a common electrode (2) and a pixel electrode (10) sequentially formed on the substrate (1) and insulated from each other; a thin film transistor comprising a gate electrode (4), an active layer (7), a source electrode (8a) and a drain electrode (8b), wherein the drain electrode (8b) is electrically connected with the pixel electrode (10); a common electrode line (5) disposed in a same layer as the gate electrode (4); and an insulating layer (3) between the gate electrode (4) and the common electrode (2), wherein the common electrode (2) is connected with the common electrode line (5) through a through hole in the insulating layer (3).
    Type: Grant
    Filed: July 8, 2015
    Date of Patent: August 9, 2016
    Assignees: BOE TECHNOLOGY GROUP CO., LTD., BEIJING BOE DISPLAY TECHNOLOGY CO., LTD.
    Inventors: Jinchao Bai, Yao Liu, Liangliang Li, Zhaohui Hao, Liang Sun