Abstract: A GOA circuit is provided and includes a plurality of GOA sub circuits which are cascaded. An Nth GOA sub circuit of the GOA sub circuits includes: a cascade control unit configured to generate a first drive signal according to an (N?3)th scan signal and an (N?3)th cascade signal; a cascade signal generation unit connected to the cascade control unit; a first scan drive unit connected to the cascade control unit and a first low voltage level signal; and a second scan drive unit connected to the cascade control unit and the first low voltage level signal.

Abstract: The present disclosure is related to Multi-Access Management Services (MAMS), which is a programmable framework that provides mechanisms for the flexible selection of network paths in a multi-access (MX) communication environment, based on an application's needs. The present disclosure discusses dynamic traffic splitting mechanisms, cross-layer and cross access technology traffic splitting mechanisms and retransmission mechanisms, multi-link packet reordering mechanisms, and link-aware packet duplication mechanisms. Generic Multi-Access (GMA) data plane functions are also integrated into the MAMS framework.

Abstract: Systems, methods, and computer-readable storage media for measuring one-way delay in multi-access networks (MAMS) are provided. Other embodiments may be described and/or claimed.

Abstract: A Next Generation Node-B (gNB) and methods of communication are generally described herein. The gNB is configurable to operate as a source gNB. The gNB is configured with logical nodes including a gNB central unit (gNB-CU) and a gNB distributed unit (gNB-DU). The gNB-CU comprises a gNB-CU control plane (gNB-CU-CP) for control-plane functionality, and a gNB-CU user plane (gNB-CU-UP) for user-plane functionality. When a handover of a User Equipment (UE) from the source gNB to a target gNB is performed, the gNB transfers, from the gNB-DU to the gNB-CU-UP, a downlink data delivery status (DDDS) message to indicate that the gNB-CU-UP is to stop transfer, to the gNB-DU, of downlink data intended for the UE.

Abstract: A gate driver on array (GOA) display panel is provided, including a display area, a bezel area, a plurality of pixel units, and a GOA circuit. The plurality of pixel units are disposed in the display area in an array. The GOA circuit includes a GOA unit group and a trace group. The GOA unit group is disposed in the display area. The trace group is electrically connected to the GOA unit group and is disposed in the bezel area. The trace group includes a GOA bus and a common electrode line. A super narrow bezel design is achieved by arranging the cascaded GOA unit group of the GOA circuit within the display area.

Abstract: The present application provides a display panel, comprising a display area and a border area disposed at a periphery of the display area, the border area comprising: an array substrate comprising a first substrate and a gate driver on array (GOA) circuit disposed on the first substrate; a color filter substrate comprising a second substrate and a signal trace disposed on the second substrate; wherein the GOA circuit is overlapped with the signal trace. The present application also relates to a display device.

Abstract: A display panel is provided. The display panel includes a frame area, and the frame area includes an array substrate and a color filter substrate. The array substrate includes a fanout area configured to dispose a fanout trace. The color filter substrate is disposed opposite to the array substrate. The color filter substrate includes a gate driver on array (GOA) circuit and a signal trace disposed at a side of the GOA circuit. The GOA circuit is electrically connected to the signal trace. The GOA circuit and the signal trace both overlap the fanout area.

Abstract: A GOA device and a gate driving circuit are provided. A pull-up control unit and a bootstrap unit sequentially control a control node of an Nth stage GOA unit to be pulled up to a first high voltage level and a second high voltage level. A pull-up unit outputs a gate driving signal according to a change of a voltage level of the control node and a stage transfer signal of the Nth stage GOA unit. As such, a pulse width of the gate driving signal is increased, and the problem that the charging ability is not sufficient can be solved.

Abstract: Technology for switching from a wireless local area network (WLAN) to a wireless wide area network (WWAN) is disclosed. A multi-radio access technology (multi-RAT) user equipment (UE) can receive WLAN-specific dedicated physical random access channel (PRACH) allocation information from an evolved node B (eNB) to enable the multi-RAT UE to perform an inter-RAT WLAN-to-WWAN handover. The multi-RAT UE can initiate the inter-RAT WLAN-to-WWAN handover at the multi-RAT UE by performing random access with the eNB using the WLAN-specific dedicated PRACH allocation information.

Abstract: The present invention discloses a gate drive circuit for reducing a reverse recovery current of a power device, and belongs to the field of basic electronic circuit technologies. The gate drive circuit includes a high-voltage LDMOS transistor, a diode forming a freewheeling path when the diode is turned on or a low-voltage MOS transistor in anti-parallel connection with a body diode, and a voltage detection circuit.

Abstract: The present invention provides a display panel, and by means of using a plurality of sub-pixels as a sub-pixel unit, each sub-pixel unit corresponds to one gate fan-out line, such that a number of the gate fan-out lines of a pixel unit can be reduced, a width of a pixel opening area can be increased, and an aperture ratio (AR %) and response time (TR %) of the panel can be improved.

Abstract: A display panel and a display device are provided. The display panel includes a capacitive electrode layer and pixel electrode layer which form a storage capacitor. An orthographic projection of first capacitor units of the capacitive electrode layer on the pixel electrode layer is located within a first trunk electrode or/and a second trunk electrode. Due to the orthographic projection of the capacitive electrode layer on the pixel electrode layer is located within a trunk electrode, a display aperture ratio is increased.

Abstract: Disclosed herein is a method for producing a sialylated N-glycosylated recombinant protein in periplasm of a recombinant Escherichia coli. The sialylated N-glycosylated recombinant protein is produced in the periplasm of a recombinant Escherichia coli strain W3110?nanKETA::Kan, and a sialylated oligosaccharide chain is Neu5Ac-?-2,6-Gal-?-1,4-GlcNAc-?-1,3 -Gal-?-1,3-GlcNAc.

Abstract: Embodiments of LWTP (long term evolution (LTE)/wireless local area network (WLAN) radio level integration Protocol) enhancements for reliable data radio bearer (DRB) switching are disclosed. A user equipment (UE) decodes a radio resource control (RRC) connection reconfiguration message, received from an evolved NodeB (eNB), the RRC connection reconfiguration message indicting switching DRBs from a first wireless transmission mode to second wireless transmission mode, and the RRC connection reconfiguration message including an uplink (UL) status report indicating a first missing UL sequence number, the UL status report being a UL LWIP status report. The UE causes reconfiguration of the UE according to the RRC connection reconfiguration message. The UE encodes, for transmission to the eNB, a RRC connection reconfiguration complete message. The UE encodes, for retransmission over the second wireless transmission mode, lost service data unit(s) (SDU) based on the UL status report.

Abstract: Briefly, in accordance with one or more embodiments, an apparatus of a user equipment (UE) comprises one or more baseband processors to generate a first set of one or more radio resource control (RRC) messages to create a packet data convergence protocol (PDCP) and RRC entity at a donor Fifth Generation evolved NodeB (DgNB), and to generate a second set of one or more RRC messages to create a radio link control (RLC) entity at a serving relay node (RN) to couple with the DgNB in a multi-hop relay network, and a memory to store the first set of one or more RRC messages or the second set of one or more RRC messages.

Abstract: Embodiments of a station (STA) and method of communication are generally described herein. The STA may be included in a first plurality of STAs affiliated with a first multi-link logical entity (MLLE). A plurality of links may be established between the first MLLE and a second MLLE, wherein the second MLLE may be affiliated with a second plurality of STAs. The STA may receive a first subset of a sequence of MAC protocol data units (MPDUs). A second subset of the sequence of MPDUs may be transmitted by another STA of the first plurality of STAs. The STA may transmit a block acknowledgement (BA) frame that includes: a number of BA bitmaps, configurable to values greater than or equal to one; and BA control information for each of the BA bitmaps.

Abstract: Embodiments of a station (STA) and method of communication are generally described herein. The STA may be included in a first plurality of STAs affiliated with a first multi-link logical entity (MLLE). A plurality of links may be established between the first MLLE and a second MLLE, wherein the second MLLE may be affiliated with a second plurality of STAs. The STA may receive a first subset of a sequence of MAC protocol data units (MPDUs). A second subset of the sequence of MPDUs may be transmitted by another STA of the first plurality of STAs. The STA may transmit a block acknowledgement (BA) frame that includes: a number of BA bitmaps, configurable to values greater than or equal to one; and BA control information for each of the BA bitmaps.

Abstract: The present invention discloses a gate drive circuit for reducing a reverse recovery current of a power device, and belongs to the field of basic electronic circuit technologies. The gate drive circuit includes a high-voltage LDMOS transistor, a diode forming a freewheeling path when the diode is turned on or a low-voltage MOS transistor in anti-parallel connection with a body diode, and a voltage detection circuit.

Abstract: System and techniques for uplink congestion mitigation are described herein. A packet acknowledgement (ACK) rate may be measured in a transmission queue to detect when the ACK rate exceeds a threshold. In response to the ACK rate exceeding the threshold, ACKs may be removed from the transmission queue in accordance with a time-based uplink reduction function. ACKs that remain in the transmission queue after ACKs are removed in accordance with the time-based uplink reduction function may then be transmitted.