Patents by Inventor Jingfeng Chen

Jingfeng Chen has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11946306
    Abstract: An automatic door operator includes a lead screw having a first end connected to an output end of an actuating unit and a second end extending away from the output end. A lead screw nut is attached to the lead screw. A slider is attached to the lead screw nut. The slider is provided with a rack portion extending in a direction parallel to an axial direction of the lead screw, and during a movement of the lead screw nut, a length of an overlap of the rack portion and the lead screw in the axial direction varies. The operator includes a housing having a guide hole configured to be slidably engaged with the slider and an output shaft is mounted in a mounting hole disposed on the housing. The output shaft has a gear portion positioned in the guide hole and engaged with the rack portion.
    Type: Grant
    Filed: March 27, 2020
    Date of Patent: April 2, 2024
    Assignee: Assa Abloy Entrance Systems AB
    Inventors: Yong Chen, Jingfeng Zhang
  • Patent number: 11939808
    Abstract: An automatic door operator and a drive mechanism thereof are disclosed. The drive mechanism of the automatic door includes a planetary reducer driven by an electric motor, and a drive shaft driven by a planetary reducer. The planetary reducer includes a housing and a planetary gear train mounted in the housing. The planetary gear train includes a final-stage planet carrier configured to output torque, and a center of the final-stage planet carrier is provided with a torque output hole. A first end of the drive shaft is detachably inserted in the torque output hole and is non-rotatably connected to the torque output hole, and a second end of the drive shaft extends out of the housing. The drive mechanism of the automatic door operator is advantageous to the miniaturization design of the automatic door operator.
    Type: Grant
    Filed: March 27, 2020
    Date of Patent: March 26, 2024
    Assignee: Assa Abloy Entrance Systems AB
    Inventors: Yong Chen, Jingfeng Zhang
  • Publication number: 20240095005
    Abstract: The present disclosure relates generally to systems and methods for providing sets of compatible firmware versions (e.g., cross-compatibility solution) for flashing (e.g., programming or re-programming) different devices of a network of devices (e.g., an industrial automation system) when using a flashing application. Providing the compatible firmware versions of such network of devices may facilitate flashing the devices with compatible firmware, based on a topology of the network of devices, to prevent functional errors in the network of devices. The present systems and methods may also be applicable to determining and providing cross-compatibility solution between different firmware, as well as software, used by different devices of a network of devices.
    Type: Application
    Filed: November 28, 2023
    Publication date: March 21, 2024
    Inventors: Fabio Malaspina, James A. Bizily, Chunhui Zhu, Yuan Wei, Jingfeng Chen, Emily J. Smith
  • Patent number: 11868752
    Abstract: The present disclosure relates generally to systems and methods for providing sets of compatible firmware versions (e.g., cross-compatibility solution) for flashing (e.g., programming or re-programming) different devices of a network of devices (e.g., an industrial automation system) when using a flashing application. Providing the compatible firmware versions of such network of devices may facilitate flashing the devices with compatible firmware, based on a topology of the network of devices, to prevent functional errors in the network of devices. The present systems and methods may also be applicable to determining and providing cross-compatibility solution between different firmware, as well as software, used by different devices of a network of devices.
    Type: Grant
    Filed: July 1, 2022
    Date of Patent: January 9, 2024
    Assignee: Rockwell Automation Technologies, Inc.
    Inventors: Fabio Malaspina, James A. Bizily, Chunhui Zhu, Yuan Wei, Jingfeng Chen, Emily J. Smith
  • Patent number: 11843452
    Abstract: A clock synchronization method includes receiving, by a receiving apparatus, a plurality of data blocks using a plurality of physical layer modules (PHYs), where the plurality of data blocks include a plurality of head data blocks, performing, by the receiving apparatus, timestamp sampling on the plurality of data blocks to generate a plurality of receipt timestamps, aligning, by the receiving apparatus, the plurality of receipt timestamps using a first receipt timestamp as a reference, generating, by the receiving apparatus, a clock synchronization packet based on the plurality of data blocks, and writing, by the receiving apparatus, a value of a second receipt timestamp into the clock synchronization packet, where the second receipt timestamp is a receipt timestamp that is of a second data block and that is determined based on the plurality of aligned receipt timestamps.
    Type: Grant
    Filed: December 27, 2022
    Date of Patent: December 12, 2023
    Assignee: HUAWEI TECHNOLOGIES CO., LTD.
    Inventors: Xiang He, Yunlei Qi, Jingfeng Chen, Tao Lin, Junmin Song, Xinyuan Wang
  • Publication number: 20230388984
    Abstract: A communication method and device, and a chip system adjust, by adjusting a quantity of slot resources included in a multiframe, a bandwidth resource corresponding to one multiframe. A first communication device sends a first request message. The first request message is used to request to adjust a quantity of basic frames in a multiframe included in a first block sequence. The first communication device multiplexes, based on S1 slot resources corresponding to the adjusted multiframe in the first block sequence, Q1 first block sequences corresponding to a slot resource in the S1 slot resources, to obtain and send the first block sequence.
    Type: Application
    Filed: August 9, 2023
    Publication date: November 30, 2023
    Inventors: Li Xu, Qiwen Zhong, Jingfeng Chen, Yunlei Qi
  • Patent number: 11824636
    Abstract: This disclosure provides a method for sending and receiving a clock synchronization packet in FlexE. The method includes: generating, by a sending apparatus, indication information and a plurality of data blocks, where the plurality of data blocks are obtained by encoding a first clock synchronization packet, the indication information is used to indicate a first data block, and the first data block is a data block used for timestamp sampling in the plurality of data blocks; determining, by the sending apparatus, according to the indication information, a moment at which the first data block arrives at a medium dependent interface MDI of the sending apparatus, and generating a sending timestamp, where the sending timestamp is used to record a sending moment of the first clock synchronization packet; generating a second clock synchronization packet carrying the sending timestamp; and sending, by the sending apparatus, the second clock synchronization packet.
    Type: Grant
    Filed: June 6, 2022
    Date of Patent: November 21, 2023
    Assignee: HUAWEI TECHNOLOGIES CO., LTD.
    Inventors: Xiang He, Yunlei Qi, Jingfeng Chen, Tao Lin, Junmin Song, Xinyuan Wang
  • Patent number: 11799992
    Abstract: A data transmission method in FlexE includes: obtaining multiple data blocks sent by L FlexE clients, where L is greater than or equal to 1; and sending a data frame including the multiple data blocks to a physical-layer device, where a transmission rate of the data frame is N*100 Gbit/s, the data frame includes T data block groups, each of the T data block groups includes M continuous data block subgroups, each of the M continuous data block subgroups includes R*N continuous data blocks, the data frame further includes T overhead block groups, a tth overhead block group includes N continuous overhead blocks. According to the method, each data block subgroup in a data frame can include R*N data blocks, and each overhead block group can include N overhead blocks, and a data transmission rate can be adjusted flexibly.
    Type: Grant
    Filed: September 29, 2021
    Date of Patent: October 24, 2023
    Assignee: HUAWEI TECHNOLOGIES CO., LTD.
    Inventors: Penghao Si, Xinyuan Wang, Jingfeng Chen
  • Patent number: 11792067
    Abstract: This application provides an isolation and recovery method and related network device for a case when one or more physical layer apparatuses (PHYs) in a flexible Ethernet group (FlexE group) are faulty. In the method, if a network device determines that a first overhead block corresponding to each current available PHY is stored in a corresponding memory, the network device determines that a FlexE group meets a PHY alignment condition, and starts to simultaneously read cached data from all memories. Therefore, there is no need to insert local fault LF code blocks to all clients, and there is no need to recreate a group. This effectively reduces the impact of a faulty PHY on client services carried by a normal PHY.
    Type: Grant
    Filed: August 17, 2021
    Date of Patent: October 17, 2023
    Assignee: HUAWEI TECHNOLOGIES CO., LTD.
    Inventors: Chunrong Li, Jingfeng Chen, Hongliang Sun, Jun Hu
  • Publication number: 20230291537
    Abstract: A method includes: a first network device obtains a synchronization mode indication and synchronization information, where the synchronization mode indication indicates a target network device to perform synchronization based on the synchronization information. The first network device sends the synchronization mode indication and the synchronization information through a network that supports FlexE. A second network device receives the synchronization mode indication and the synchronization information through a network that supports FlexE. The second network device performs synchronization based on the synchronization mode indication and the synchronization information.
    Type: Application
    Filed: May 15, 2023
    Publication date: September 14, 2023
    Inventors: Yuanlong Jiang, Fanshun Meng, Jingfei Lyu, Jingfeng Chen
  • Publication number: 20230171027
    Abstract: This application discloses a bit error indication method for a service stream and a communication apparatus, so that when a quantity of bit errors that is counted inside a device exceeds a preset threshold, it can be ensured that the device continues to work normally. The method includes: A network device receives a first signal stream from a first node by using N slots of a first bonding group, determines a first check value based on a first check code in the first signal stream, determines a second check value based on the first check value and a current check value, and sends a second signal stream to a second node by using M slots of the first bonding group. The second signal stream includes a target check value determined based on the second check value.
    Type: Application
    Filed: January 13, 2023
    Publication date: June 1, 2023
    Inventors: Rixin LI, Jingfeng CHEN, Li XU, Qiwen ZHONG
  • Publication number: 20230155756
    Abstract: This application provides a data transmission method, a communications apparatus, a network device, a communications system, a storage medium, and a computer program product, to resolve a current problem that bandwidth waste is relatively severe when a service is carried based on a FlexE technology. In this application, a frame structure of a fine-granularity service frame is newly defined, so that service data can be transmitted in a time division multiplexing mode by using an Ethernet (ETH) interface.
    Type: Application
    Filed: January 18, 2023
    Publication date: May 18, 2023
    Inventors: Yunlei Qi, Qiwen Zhong, Zhigang Zhu, Kai Liu, Jingfeng Chen
  • Publication number: 20230138058
    Abstract: A clock synchronization method includes receiving, by a receiving apparatus, a plurality of data blocks using a plurality of physical layer modules (PHYs), where the plurality of data blocks include a plurality of head data blocks, performing, by the receiving apparatus, timestamp sampling on the plurality of data blocks to generate a plurality of receipt timestamps, aligning, by the receiving apparatus, the plurality of receipt timestamps using a first receipt timestamp as a reference, generating, by the receiving apparatus, a clock synchronization packet based on the plurality of data blocks, and writing, by the receiving apparatus, a value of a second receipt timestamp into the clock synchronization packet, where the second receipt timestamp is a receipt timestamp that is of a second data block and that is determined based on the plurality of aligned receipt timestamps.
    Type: Application
    Filed: December 27, 2022
    Publication date: May 4, 2023
    Inventors: Xiang He, Yunlei Qi, Jingfeng Chen, Tao Lin, Junmin Song, Xinyuan Wang
  • Patent number: 11552721
    Abstract: A clock synchronization method includes receiving, by a receiving apparatus, a plurality of data blocks using a plurality of physical layer modules (PHYs), where the plurality of data blocks include a plurality of head data blocks, performing, by the receiving apparatus, timestamp sampling on the plurality of data blocks to generate a plurality of receipt timestamps, aligning, by the receiving apparatus, the plurality of receipt timestamps using a first receipt timestamp as a reference, generating, by the receiving apparatus, a clock synchronization packet based on the plurality of data blocks, and writing, by the receiving apparatus, a value of a second receipt timestamp into the clock synchronization packet, where the second receipt timestamp is a receipt timestamp that is of a second data block and that is determined based on the plurality of aligned receipt timestamps.
    Type: Grant
    Filed: August 16, 2021
    Date of Patent: January 10, 2023
    Assignee: HUAWEI TECHNOLOGIES CO., LTD.
    Inventors: Xiang He, Yunlei Qi, Jingfeng Chen, Tao Lin, Junmin Song, Xinyuan Wang
  • Publication number: 20220334816
    Abstract: The present disclosure relates generally to systems and methods for providing sets of compatible firmware versions (e.g., cross-compatibility solution) for flashing (e.g., programming or re-programming) different devices of a network of devices (e.g., an industrial automation system) when using a flashing application. Providing the compatible firmware versions of such network of devices may facilitate flashing the devices with compatible firmware, based on a topology of the network of devices, to prevent functional errors in the network of devices. The present systems and methods may also be applicable to determining and providing cross-compatibility solution between different firmware, as well as software, used by different devices of a network of devices.
    Type: Application
    Filed: July 1, 2022
    Publication date: October 20, 2022
    Inventors: Fabio Malaspina, James A. Bizily, Chunhui Zhu, Yuan Wei, Jingfeng Chen, Emily J. Smith
  • Publication number: 20220303035
    Abstract: This disclosure provides a method for sending and receiving a clock synchronization packet in FlexE. The method includes: generating, by a sending apparatus, indication information and a plurality of data blocks, where the plurality of data blocks are obtained by encoding a first clock synchronization packet, the indication information is used to indicate a first data block, and the first data block is a data block used for timestamp sampling in the plurality of data blocks; determining, by the sending apparatus, according to the indication information, a moment at which the first data block arrives at a medium dependent interface MDI of the sending apparatus, and generating a sending timestamp, where the sending timestamp is used to record a sending moment of the first clock synchronization packet; generating a second clock synchronization packet carrying the sending timestamp; and sending, by the sending apparatus, the second clock synchronization packet.
    Type: Application
    Filed: June 6, 2022
    Publication date: September 22, 2022
    Applicant: HUAWEI TECHNOLOGIES CO., LTD.
    Inventors: Xiang He, Yunlei Qi, Jingfeng Chen, Tao Lin, Junmin Song, Xinyuan Wang
  • Patent number: 11416231
    Abstract: The present disclosure relates generally to systems and methods for providing sets of compatible firmware versions (e.g., cross-compatibility solution) for flashing (e.g., programming or re-programming) different devices of a network of devices (e.g., an industrial automation system) when using a flashing application. Providing the compatible firmware versions of such network of devices may facilitate flashing the devices with compatible firmware, based on a topology of the network of devices, to prevent functional errors in the network of devices. The present systems and methods may also be applicable to determining and providing cross-compatibility solution between different firmware, as well as software, used by different devices of a network of devices.
    Type: Grant
    Filed: April 9, 2021
    Date of Patent: August 16, 2022
    Assignee: Rockwell Automation Technologies, Inc.
    Inventors: Fabio Malaspina, James A. Bizily, Chunhui Zhu, Yuan Wei, Jingfeng Chen, Emily J. Smith
  • Patent number: 11356188
    Abstract: This application provides a method for sending and receiving a clock synchronization packet in FlexE. The method includes: generating, by a sending apparatus, indication information and a plurality of data blocks, where the plurality of data blocks are obtained by encoding a first clock synchronization packet, the indication information is used to indicate a first data block, and the first data block is a data block used for timestamp sampling in the plurality of data blocks; determining, by the sending apparatus, according to the indication information, a moment at which the first data block arrives at a medium dependent interface MDI of the sending apparatus, and generating a sending timestamp, where the sending timestamp is used to record a sending moment of the first clock synchronization packet; generating a second clock synchronization packet carrying the sending timestamp; and sending, by the sending apparatus, the second clock synchronization packet.
    Type: Grant
    Filed: April 13, 2020
    Date of Patent: June 7, 2022
    Assignee: HUAWEI TECHNOLOGIES CO., LTD.
    Inventors: Xiang He, Yunlei Qi, Jingfeng Chen, Tao Lin, Junmin Song, Xinyuan Wang
  • Publication number: 20220021758
    Abstract: A data transmission method in FlexE includes: obtaining multiple data blocks sent by L FlexE clients, where L is greater than or equal to 1; and sending a data frame including the multiple data blocks to a physical-layer device, where a transmission rate of the data frame is N*100 Gbit/s, the data frame includes T data block groups, each of the T data block groups includes M continuous data block subgroups, each of the M continuous data block subgroups includes R*N continuous data blocks, the data frame further includes T overhead block groups, a tth overhead block group includes N continuous overhead blocks. According to the method, each data block subgroup in a data frame can include R*N data blocks, and each overhead block group can include N overhead blocks, and a data transmission rate can be adjusted flexibly.
    Type: Application
    Filed: September 29, 2021
    Publication date: January 20, 2022
    Inventors: Penghao Si, Xinyuan Wang, Jingfeng Chen
  • Publication number: 20210385127
    Abstract: In an embodiment, the application provides a flexible Ethernet (FlexE) communication method, which includes: receiving, by a first network device by using a FlexE group, n first overhead blocks sent by a second network device, the FlexE group comprising n physical layer apparatuses (PHYs); and storing, by the first network device, the n first overhead blocks in n memories in the first time period. The method further includes simultaneously reading, by the first network device, the n first overhead blocks from the n memories, after a preset duration T starting from a moment at which a first overhead block is stored in a corresponding memory. The first overhead block is a last stored first overhead block in the n first overhead blocks, the duration T is greater than or equal to one clock cycle.
    Type: Application
    Filed: August 18, 2021
    Publication date: December 9, 2021
    Inventors: Chunrong Li, Jingfeng Chen, Hongliang Sun, Jun Hu