Patents by Inventor Jinghong Li

Jinghong Li has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20110062518
    Abstract: A method of fabricating and a structure of a merged multi-fin finFET. The method includes forming single-crystal silicon fins from the silicon layer of an SOI substrate having a very thin buried oxide layer and merging the end regions of the fins by growing vertical epitaxial silicon from the substrate and horizontal epitaxial silicon from ends of the fins such that vertical epitaxial silicon growth predominates.
    Type: Application
    Filed: September 17, 2009
    Publication date: March 17, 2011
    Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Kevin K. Chan, Thomas Safron Kanarsky, Jinghong Li, Christine Qiqing Ouyang, Dae-Gyu Park, Zhibin Ren, Xinhui Wang, Haizhou Yin
  • Publication number: 20100200896
    Abstract: A method for growing an epitaxial layer on a substrate wherein the substrate includes a surface having a Miller index of (110) for the beneficial properties. The method comprises using a direct silicon bonded wafer with a substrate having a first Miller index and a surface having a second Miller index. An element such as a gate for a PFET may be deposited onto the surface. The area not under the gate may then be etched away to expose the substrate. An epitaxial layer may then be grown on the surface providing optimal growth patterns. The Miller index of the substrate may be (100). In an alternative embodiment the surface may have a Miller index of (100) and the surface is etched where an element such as a gate for a PFET may be placed.
    Type: Application
    Filed: February 9, 2009
    Publication date: August 12, 2010
    Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Thomas N. Adam, Jinghong Li, Thomas A. Wallner, Haizhou Yin
  • Patent number: 7696000
    Abstract: Formation of carbon-substituted single crystal silicon layer is prone to generation of large number of defects especially at high carbon concentration. The present invention provides structures and methods for providing low defect carbon-substituted single crystal silicon layer even for high concentration of carbon in the silicon. According to the present invention, the active retrograde profile in the carbon implantation reduces the defect density in the carbon-substituted single crystal silicon layer obtained after a solid phase epitaxy. This enables the formation of semiconductor structures with compressive stress and low defect density. When applied to semiconductor transistors, the present invention enables N-type field effect transistors with enhanced electron mobility through the tensile stress that is present into the channel.
    Type: Grant
    Filed: December 1, 2006
    Date of Patent: April 13, 2010
    Assignee: International Business Machines Corporation
    Inventors: Yaocheng Liu, Subramanian S. Iyer, Jinghong Li
  • Publication number: 20090099669
    Abstract: A method, a system, and a computer program product for managing one or more electronic devices. Performance of an electronic device is monitored and presented to a user through a digital agent interface. The performance of the electronic device is controlled automatically by digital agent through the digital agent interface. The invention also enables automatic testing of the electronic device through the digital agent interface by setting up test configurations, activating test signals, and interpreting any error codes that may be generated.
    Type: Application
    Filed: October 9, 2008
    Publication date: April 16, 2009
    Applicant: NEOPHOTONICS CORPORATION
    Inventors: Anthony J. Ticknor, Jinghong Li, Robert Lombaerde
  • Publication number: 20080246056
    Abstract: Methods of forming a suicide in an embedded silicon germanium (eSiGe) source/drain region using a suicide prevention spacer overlapping an interface between the eSiGe and the silicon channel, and a related PFET with an eSiGe source/drain region and a compressive stress liner in close proximity to a silicon channel thereof, are disclosed. In one embodiment, a method includes providing a gate having a nitrogen-containing spacer adjacent thereto and an epitaxially grown silicon germanium (eSiGe) region adjacent to a silicon channel of the gate; removing the nitrogen-containing spacer that does not extend over the interface between the eSiGe source/drain region and the silicon channel; forming a single silicide prevention spacer about the gate, the single silicide prevention spacer overlapping the interface; and forming the silicide in the eSiGe source/drain region using the single silicide prevention spacer to prevent the silicide from forming in at least an extension area of the silicon channel.
    Type: Application
    Filed: April 9, 2007
    Publication date: October 9, 2008
    Inventors: Victor W. C. Chan, Thomas W. Dyer, Sunfei Fang, Jinghong Li, Teck J. Tang, Henry K. Utomo, Jiang Yan
  • Publication number: 20080128806
    Abstract: Formation of carbon-substituted single crystal silicon layer is prone to generation of large number of defects especially at high carbon concentration. The present invention provides structures and methods for providing low defect carbon-substituted single crystal silicon layer even for high concentration of carbon in the silicon. According to the present invention, the active retrograde profile in the carbon implantation reduces the defect density in the carbon-substituted single crystal silicon layer obtained after a solid phase epitaxy. This enables the formation of semiconductor structures with compressive stress and low defect density. When applied to semiconductor transistors, the present invention enables N-type field effect transistors with enhanced electron mobility through the tensile stress that is present into the channel.
    Type: Application
    Filed: December 1, 2006
    Publication date: June 5, 2008
    Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Yaocheng Liu, Subramanian S. Iyer, Jinghong Li
  • Publication number: 20070281413
    Abstract: The present invention relates to a semiconductor device comprising at least one n-channel field effect transistor (n-FET). Specifically, the n-FET comprises first and second patterned stressor layers that both contain a carbon-substituted and tensilely stressed single crystal semiconductor. The first patterned stressor layer has a first carbon concentration and is located in source and drain (S/D) extension regions of the n-FET at a first depth. The second patterned stressor layer has a second, higher carbon concentration and is located in S/D regions of the n-FET at a second, deeper depth. Such an n-FET with the first and second patterned stressor layers of different carbon concentration and different depths provide improved stress profile for enhancing electron mobility in the channel region of the n-FET.
    Type: Application
    Filed: August 17, 2007
    Publication date: December 6, 2007
    Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Jinghong Li, Yaocheng Liu, Zhijiong Luo, Anita Madan, Nivo Rovedo
  • Publication number: 20070114605
    Abstract: A method of formation of integrated circuit devices includes forming a gate electrode stack over a portion of a semiconductor. The stack includes a gate dielectric layer with a gate electrode thereabove. Implant diatomic nitrogen and/or nitrogen atoms into the substrate aside from the stack at a maximum energy less than or equal to 10 keV for diatomic nitrogen and at a maximum energy less than or equal to 5 keV for atomic nitrogen at a temperature less than or equal to 1000° C. for a time of less than or equal to 30 minutes. Then form silicon oxide offset spacers on sidewalls of the stack. Form source/drain extension regions in the substrate aside from the offset spacers. Form nitride sidewall spacers on outer surfaces of the offset spacers over another portion of the nitrogen implanted layer. Then form source/drain regions in the substrate aside from the sidewall spacers.
    Type: Application
    Filed: November 21, 2005
    Publication date: May 24, 2007
    Applicant: International Business Machines Corporation
    Inventors: Thomas Dyer, Jinghong Li, Zhijiong Luo
  • Publication number: 20060276917
    Abstract: A method, a system, and a computer program product for managing one or more electronic devices. Performance of an electronic device is monitored and presented to a user through a Graphical User Interface (GUI) on a computer. The performance of the electronic device is controlled automatically, or by the user through the GUI. The invention also enables automatic testing of the electronic device through the GUI by setting up test configurations, activating test signals, and interpreting any error codes that may be generated. Further, data generated by the monitoring, control and testing of the electronic device can be saved.
    Type: Application
    Filed: June 3, 2005
    Publication date: December 7, 2006
    Inventors: Jinghong Li, Robert Lombaerde
  • Publication number: 20060220112
    Abstract: Methods and structure formed for retarding diffusion of a dopant into a channel of a strained Si—SiGe CMOS device are disclosed. The methods form a diffusion retardant region in a substrate including at least one diffusion retardant species such as xenon (Xe), and then form a channel layer over the diffusion retardant region. Each step is conducted prior to formation of a gate on the substrate. As a result, if necessary, the diffusion retardant region can be annealed and cleaned or etched to remove defects in the substrate to reduce external resistance and leakage of devices. The diffusion retardant region positioned under the channel slows down the diffusion of a dopant, e.g., arsenic (As). The invention is also applicable to other substrates.
    Type: Application
    Filed: April 1, 2005
    Publication date: October 5, 2006
    Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Huilong Zhu, Kam-Leung Lee, Jinghong Li, Anda Mocuta
  • Publication number: 20040009235
    Abstract: The invention provides a hydroxyapatite composition for replenishing calcium, comprising 5 to 80 wt % hydroxyapatite with particle size of 5-800 nm and pharmaceutically acceptable excipient. The composition may comprise organic acid, such as citric acid, malic acid, starch, dextrin, sugar, Vitamin D, Vitamin A, Vitamin B, Vitamin C, and Vitamin E, and trace clement(s) selected from the group consisting of Sr, F, Fe, Zn, and Mn. The composition may be in solid preparation form such as powder, tablet, including coated tablet, capsule, and infusion (medicinal granules), and liquid preparation form such as oral liquid, injection solution, and beverage; and ion introduction type transdermal-preparation, etc. Furthermore the composition can be incorporated into any other foods. The composition of the invention can be made into different type of products including general type, children type, pregnant women type, liver and kidney type and climacteric type to meet the need of different people.
    Type: Application
    Filed: June 12, 2003
    Publication date: January 15, 2004
    Inventor: Jinghong Li