Patents by Inventor Jinghui Lu
Jinghui Lu has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20240121479Abstract: Embodiments of the present disclosure relate to multimedia processing method, apparatus, device and medium, wherein the method includes: presenting a first multimedia interface comprising first content; receiving an interface switching request of a user in the first multimedia interface; and switching from the first multimedia interface currently presented to a second multimedia interface, and presenting second content in the second multimedia interface, wherein the first content comprises the second content and other content associated with the second content, and the second content comprises a target audio and a target subtitle corresponding to the target audio.Type: ApplicationFiled: April 7, 2022Publication date: April 11, 2024Inventors: Kojung CHEN, Yinuo ZHOU, Biao GONG, Jingsheng YANG, Tian ZHAO, Jinghui LIU, Daqian LU, Yao YANG, Tao CHENG, Zaofeng PAN, Tianhui SHI, Rongyi TANG, Guodong GONG
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Publication number: 20200356519Abstract: Techniques are provided for improving serial communications, especially time-sensitive serial communications. Such techniques can include a method comprising: receiving information via an input serial communication port of a control circuit, the input serial communication port having at least two conductors; in a serial mode of the control circuit, buffering the information as the information is received, parsing the information according to a serial protocol, and processing the information according to the serial protocol; and in a binary mode of the control circuit, conforming an operation of the control circuit in response to a state of at least one of the two conductors.Type: ApplicationFiled: March 29, 2018Publication date: November 12, 2020Inventors: Wayne Ballantyne, Gunnar Bublitz, Jinghui Lu
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Patent number: 10405182Abstract: Systems and processes for mobile device management (MDM) implement scoped MDM policies. A mobile device has containers to isolate data and processes on the mobile device from the others of the containers. The scoped MDM policies involve container level commands and device level commands. The mobile device has a first agent residing in a first container and a controller residing within a second container. The controller executes a first device level command to control access to the resources of the mobile device for all containers. The first agent or the controller executes a first container level command to control access to the resources of the mobile device by only the first container.Type: GrantFiled: June 30, 2016Date of Patent: September 3, 2019Assignee: HUAWEI TECHNOLOGIES CO., LTD.Inventors: Jinghui Lu, Yin Tan, Yuri Poeluev
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Publication number: 20180007556Abstract: Systems and processes for mobile device management (MDM) implement scoped MDM policies. A mobile device has containers to isolate data and processes on the mobile device from the others of the containers. The scoped MDM policies involve container level commands and device level commands. The mobile device has a first agent residing in a first container and a controller residing within a second container. The controller executes a first device level command to control access to the resources of the mobile device for all containers. The first agent or the controller executes a first container level command to control access to the resources of the mobile device by only the first container.Type: ApplicationFiled: June 30, 2016Publication date: January 4, 2018Inventors: Jinghui LU, Yin TAN, Yuri POELUEV
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Patent number: 8369633Abstract: Techniques pertaining to scalable video codec are disclosed. According to one aspect of the present invention, a video image is analyzed and a region of interest (ROI) and a region of non-interest (non-ROI) are identified. By comparing the non-ROI image with that of a previous image, a background ignored identifier is created indicating whether the non-ROI can be ignored during encoding and decoding processes. Based on the status of the background ignored identifier, the encoder encodes the images into a basic layer (BL) and an enhanced layer (EL), and transmits the coded bit streams along with the identifier to a decoder. The decoder reconstructs the image based on the identifier and the BL and the EL bit streams.Type: GrantFiled: October 23, 2009Date of Patent: February 5, 2013Assignee: Vimicro CorporationInventors: Jinghui Lu, Song Qiu, Hao Wang
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Publication number: 20110096990Abstract: Techniques pertaining to scalable video codec are disclosed. According to one aspect of the present invention, a video image is analyzed and a region of interest (ROI) and a region of non-interest (non-ROI) are identified. By comparing the non-ROI image with that of a previous image, a background ignored identifier is created indicating whether the non-ROI can be ignored during encoding and decoding processes. Based on the status of the background ignored identifier, the encoder encodes the images into a basic layer (BL) and an enhanced layer (EL), and transmits the coded bit streams along with the identifier to a decoder. The decoder reconstructs the image based on the identifier and the BL and the EL bit streams.Type: ApplicationFiled: October 23, 2009Publication date: April 28, 2011Applicants: Vimicro Electronics Corporation, Vimicro CorporationInventors: Jinghui Lu, Song Qiu, Hao Wang
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Patent number: 7876844Abstract: Techniques for determining positions of pilot sub-carriers in a received OFDM symbol are described. Components of pilot sub-carriers from a theoretical OFDM symbol are extracted to form M theoretical pilot sequences according to M possible distributions in frequency domain of the pilot sub-carriers in the theoretical OFDM symbol. Components of pilot sub-carriers from the received OFDM symbol are also extracted to form K hypothetical pilot sequences according to K possible distributions in frequency domain of pilot sub-carriers in the received OFDM symbol. The correlations of every two adjacent elements of the theoretical pilot sequences are calculated to get M corresponding theoretical correlation sequences, and the correlations of every two adjacent elements of the hypothetical pilot sequence are also calculated to get K corresponding hypothetical correlation sequences. Sequence correlations between the hypothetical correlation sequences and the theoretical correlation sequences are then calculated.Type: GrantFiled: January 31, 2008Date of Patent: January 25, 2011Assignees: Vimicro Corporation, Wuxi Vimicro CorporationInventor: JingHui Lu
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Publication number: 20100124277Abstract: A video encoding technique producing an even output bit stream is disclosed. According to one aspect of the present invention, an instantaneous peak of the output bit stream is greatly reduced by dividing one image frame into a key area and a background area, then inter-frame encoding the key area and the background area in different frames respectively. In other words, a whole bit stream of one I frame in the prior art is distributed into two or more image frames in the present invention.Type: ApplicationFiled: May 31, 2009Publication date: May 20, 2010Inventors: Hao Wang, Song Qiu, Jinghui Lu
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Patent number: 7599431Abstract: A communication system includes a transmitter, a communication channel, and a receiver. The transmitter includes a pre-emphasis module, a summing module, a line driver, and a decision feedback pre-emphasis (DFP) module to produce a pre-emphasized serial stream of data based on a communications channel response and an inter-symbol interference level. The receiver includes a linear equalizer, a summing module, a decision module, and a decision feedback equalization (DFE) module. The linear equalizer produces an equalized serial stream of data. The summing module sums at least one data element of the equalized serial stream of data with DFE data elements to produce equalized data elements. The decision module interprets the equalized data elements to produce interpreted data elements to DFE module, which produces the DFE data elements from the interpreted data elements.Type: GrantFiled: November 24, 2004Date of Patent: October 6, 2009Assignee: Xilinx, Inc.Inventors: Stephen D. Anderson, Michael A. Nix, Brian T. Brunn, Jinghui Lu, David E. Tetzlaff
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Patent number: 7523215Abstract: A method and apparatus for a transmitting entity within a micro-area network to establish a data transmission within the network includes processing that begins by determining the identity of a target entity within the micro-area network. The processing then continues by determining transmission characteristics of at least one communication path between the transmitting entity and target entity of the micro-area network. The processing then continues by determining a transmission convention based on the transmission characteristics. The processing then continues by providing the transmission convention to the target entity.Type: GrantFiled: January 14, 2002Date of Patent: April 21, 2009Assignee: Xilinx, Inc.Inventors: Moises E. Robinson, Shahriar Rokhsaz, Jinghui Lu
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Patent number: 7496155Abstract: A clock recovery circuit includes a crossover adjustment circuit operable to adjust a crossover point to adjust a corresponding duty cycle. The adjustment circuit comprises a feedback adjustment combining element which is implemented as summing elements and a crossover point control clock amplifier, an operational amplifier with a resistor in place of a low pass filter at an input of the operational amplifier and feedback driver. The summing element within the feedback adjustment combining element combines input clocks with feedback signals, the crossover point control clock amplifier includes adjustment driver, the two cross coupled PMOS along with the resistor connected between them, reshape input clocks, adjust cross over point and provide output clocks with DCD corrected. A modified Miller capacitor comprising a resistor in series with a capacitor across a drain and gate of a cascode transistor pair is utilized in an output stage to adjust corner frequencies.Type: GrantFiled: September 16, 2005Date of Patent: February 24, 2009Assignee: Xilinx, Inc.Inventors: Jinghui Lu, Yiqin Chen
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Publication number: 20080298485Abstract: Techniques for determining positions of pilot sub-carries in a received OFDM symbol are described. Components of pilot sub-carries from a theoretical OFDM symbol are extracted to form M theoretical pilot sequences according to M possible distributions in frequency domain of the pilot sub-carries in the theoretical OFDM symbol. Components of pilot sub-carries from the received OFDM symbol are also extracted to form K hypothetical pilot sequences according to K possible distributions in frequency domain of pilot sub-carries in the received OFDM symbol. The correlations of every two adjacent elements of the theoretical pilot sequences are calculated to get M corresponding theoretical correlation sequences, and the correlations of every two adjacent elements of the hypothetical pilot sequence are also calculated to get K corresponding hypothetical correlation sequences. Sequence correlations between the hypothetical correlation sequences and the theoretical correlation sequences are then calculated.Type: ApplicationFiled: January 31, 2008Publication date: December 4, 2008Inventor: JingHui LU
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Patent number: 7460848Abstract: A signal detection circuit includes a first signal multiplier operably coupled to square an input signal, a second signal multiplier operably coupled to square a reference signal, and a filter module operably coupled to produce a digital output representative of the input signal based on a squared input signal and a squared reference signal.Type: GrantFiled: September 29, 2004Date of Patent: December 2, 2008Assignee: Xilinx, Inc.Inventors: Brian T. Brunn, Jinghui Lu
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Patent number: 7254140Abstract: A method and apparatus for transceiving data in a micro-area network includes processing that begins by obtaining a data unit for transmission by a first data transceiving entity of a micro area network. The processing then continues when the first data transceiving entity formats the payload data using a first transmission format convention. The first data transceiving entity also formats the overhead data using a second transmission formatting convention to produce formatted overhead data. The formatting of the overhead data and/or payload data may include encoding and/or modulating the data. The processing continues when the first data transceiving entity transmits the formatted payload data and the formatted overhead data to at least one target entity within the micro-area network. The process continues when a target entity receives the formatted payload data and the formatted overhead data.Type: GrantFiled: January 14, 2002Date of Patent: August 7, 2007Assignee: XILINX, Inc.Inventors: Shahriar Rokhsaz, Jinghui Lu, Moises E. Robinson
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Patent number: 7058120Abstract: A transceiver includes a receiver section and a transmitter section. The receiver section includes a clocking circuit, a serial-to-parallel module, and compensation. The transmitter section includes a clocking circuit, parallel-to-serial module, and compensation. The compensation within the receiver section and transmitter section compensates for integrated circuit (IC) processing limits and/or integrated circuit (IC) fabrication limits within the clocking circuits, serial-to-parallel module, and parallel-to-serial module that would otherwise limit the speed at which the transceiver could transport data.Type: GrantFiled: January 18, 2002Date of Patent: June 6, 2006Assignee: Xilinx, Inc.Inventors: Jinghui Lu, Shahriar Rokhsaz, Stephen D. Anderson, Michael A. Nix, Ahmed Younis, Michael Ren Kent, Yvette P. Lee, Firas N. Abughazaleh, Brian T. Brunn, Moises E. Robinson, Kazi S. Hossain
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Patent number: 6946849Abstract: A circuit for calibrating a resistance between a first circuit node and a second circuit node is disclosed. The circuit comprises a reference resistor connected between first and second reference nodes; a first transistor having a first current-handling terminal connected to the first reference node, a second current-handling terminal, and a first control terminal; and a second transistor having a third current-handling terminal connected to the first circuit node, a fourth current-handling terminal connected to the second circuit node, and a second control terminal connected to the first control terminal.Type: GrantFiled: June 15, 2004Date of Patent: September 20, 2005Assignee: Xilinx, Inc.Inventor: Jinghui Lu
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Patent number: 6933782Abstract: Described are high-speed parallel-to-serial converters. The converters include data combiners with differential current-steering circuits that respond to parallel data bits by producing complementary current signals representing a differential, serialized version of the parallel data bits. One embodiment includes inductive and resistive loads to equalize the gain over the frequency of interest to reduce data-deterministic jitter.Type: GrantFiled: October 1, 2004Date of Patent: August 23, 2005Assignee: Xilinx, Inc.Inventor: Jinghui Lu
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Patent number: 6864728Abstract: A frequency multiplier and amplification circuit are disclosed. One embodiment of the present invention comprises: a multiplier operably coupled to multiply a first sinusoidal waveform having a first frequency with a second sinusoidal waveform having a second frequency to produce a third sinusoidal waveform, having a frequency representative of a difference between the first frequency and the second frequency, and a fourth sinusoidal waveform having a frequency representative of a sum of the first and second frequencies; and a frequency-tuned load operably coupled to substantially attenuate the third sinusoidal waveform and to substantially pass the fourth sinusoidal waveform as an output of the frequency-tuned multiplier circuit. The frequency-tuned multiplier circuit can be a single-ended multiplier circuit or a differential multiplier circuit with corresponding single-ended or differential first and second sinusoidal waveforms.Type: GrantFiled: February 28, 2003Date of Patent: March 8, 2005Assignee: Xilinx, Inc.Inventor: Jinghui Lu
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Patent number: 6812872Abstract: Described are high-speed parallel-to-serial converters. The converters include data combiners with differential current-steering circuits that respond to parallel data bits by producing complementary current signals representing a differential, serialized version of the parallel data bits. One embodiment includes inductive and resistive loads to equalize the gain over the frequency of interest to reduce data-deterministic jitter.Type: GrantFiled: January 17, 2003Date of Patent: November 2, 2004Assignee: Xilinx, Inc.Inventor: Jinghui Lu
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Patent number: 6765377Abstract: A buffer employs an input stage with an active, LC load. The active load includes integrated inductors that combine with the parasitic gate capacitances of a pair of transistors in a negative-transconductance (−Gm) booster configuration. The resulting active load emphasizes a desired frequency, improving the quality, or “Q,” of the input stage, and consequently of the entire buffer.Type: GrantFiled: January 9, 2002Date of Patent: July 20, 2004Assignee: Xilinx, Inc.Inventor: Jinghui Lu