Abstract: Embodiments of the present disclosure provide a thin film transistor assembly, an array substrate and a display panel. The thin film transistor assembly includes a first thin film transistor and a second thin film transistor disposed on a substrate. The first thin film transistor includes a first source electrode, a first drain electrode, and a first active layer. The second thin film transistor includes a second source electrode. The first source electrode is disposed on a side of the first active layer facing towards the substrate. The first drain electrode is disposed on a side of the first active layer facing away from the substrate. An orthogonal projection of the first source electrode on the substrate overlaps an orthogonal projection of the second source electrode on the substrate.

Abstract: The present disclosure provides a touch display panel. Specifically, the touch display panel includes a display area and a non-display area located in a periphery of the display area. In addition, the touch display panel further includes a touch circuit and a peripheral circuit, the peripheral circuit is located in the non-display area; and a conductive pattern. The conductive pattern is adapted to cooperate with at least a portion of the peripheral circuit to form a capacitance, and is further electrically insulated from the touch circuit and the peripheral circuit.

Abstract: It provides laminates and articles formed from such laminates. In one aspect, a laminate comprises (a) a biaxially oriented polyethylene (BOPE) film comprising a polyethylene composition, wherein the polyethylene composition has a density of 0.910 to 0.940 g/cm3, an MWHDF>95 greater than 135 kg/mol and an IHDF >95 greater than 42 kg/mol, wherein the BOPE film comprises at least 50 weight percent of the polyethylene composition based on the weight of the BOPE film; (b) a barrier adhesive layer comprising polyurethane; and (c) a polyethylene film, wherein the barrier adhesive layer adheres the BOPE film to the polyethylene film and wherein the laminate has an oxygen gas transmission rate of 700 cc/[m2-day] or less when measured according to ASTM D3985-05.

Abstract: An array substrate which includes a display region and a peripheral region surrounding the display region, the peripheral region includes a data line lead region and a driving circuit region, and the data line lead region is between the driving circuit region and the display region; the driving circuit region includes a driving circuit, the data line lead region includes a the plurality of data line leads, and the plurality of data line leads extend from the display region and are electrically connected with the driving circuit; and the data line lead region includes peripheral data line leads, a region of the peripheral region close to the peripheral data line leads includes at least one retaining wall configured to prevent plasma from affecting the peripheral data line leads. A method for fabricating an array substrate, a display panel, and a display device are also disclosed.

Abstract: A display substrate comprises a display area and a non-display area around the display area; at least one ground terminal located in the non-display area; a first wiring disposed in the non-display area and being around the display area; and a second wiring disposed between the first wiring and the display area and being positioned around the non-display area. The second wiring is provided with at least one tip on a side closer to the first wiring, the at least one tip pointing to the side of the first wiring. The first wiring and the second wiring are respectively connected to the at least one ground terminal.

Abstract: Disclosed is a touch display panel, a display device and a method for manufacturing a touch display panel. The touch display panel includes a ground wire and a switching element. The ground wire is configured to allow static electricity in the touch display panel to be discharged through the ground wire. The switching element is configured to be turned on or turned off according to an operating state of the touch display panel to control whether the static electricity is discharged through the ground wire.

Abstract: An array substrate, includes: a substrate, three metal layers stacked on the substrate, and a plurality of signal line leads disposed in a peripheral area of the array substrate. The plurality of signal line leads are distributed in at least two of the three metal layers.

Abstract: A biaxially-oriented polyethylene (BOPE) multilayer film comprises a skin layer with a matte surface and a core, the skin layer with a matte surface comprising, in weight percent (wt %) based upon the weight of the skin layer: (1) from 20 to 80 wt % of an ethylene-based polymer, and (2) from 80 to 20 wt % of a propylene-based polymer; each of the ethylene-based polymer and the propylene-based polymer having a storage modulus, with a difference between the storage modulus of the ethylene-based polymer and the propylene-based polymer of greater than 40 megaPascals (MPa) at 110° C., and greater than 18 MPa at 120° C.

Abstract: The present disclosure is directed to a retort pouch. In an embodiment, the retort pouch includes a multilayer film with at least three layers. The at least three layers include (A) a skin layer comprising a blend of a propylene-based polymer and a styrenic block copolymer, (B) a seal layer comprising blend of a propylene-based polymer and a styrenic block copolymer, and (C) a core layer located between the skin layer (A) and the seal layer (B). The core layer comprises a blend of (1) a propylene-based polymer, (2) an ethylene-based polymer, and (3) a crystalline block composite (CBC).

Abstract: The present disclosure relates to an apparatus and method for detecting display panel defects and a microscope. The apparatus for detecting display panel defects comprises: a switch component connected to a microscope; a detection component, which is disposed on the switch component and has a first visual area, the detection component being configured to detect a position of a microscopic defect in a display panel; and a marking component, which is disposed on the switch component and has a second visual area with a smaller area than the first visual area, the marking component being configured to mark the position of the microscopic defect in the display panel, wherein the switch component is configured to rotate the marking component to a position of the detection component and mark a position of the microscopic defect by the marking component after the detection component detects the position.

Abstract: The present disclosure provides an array substrate and a display device for reducing the space occupied by the antenna inside the mobile phone, so as to reduce the thickness of the mobile phone and make the mobile phone thinner and lighter. The array substrate according to the present disclosure includes dummy signal lines and a conductive portion. The dummy signal lines and the conductive portion are disposed in different layers. An insulating layer is disposed between the dummy signal lines and the conductive portion. A via is disposed on the insulating layer. The dummy signal line is connected to the conductive portion through the via. The dummy signal line and the conductive portion are used to form an antenna.

Abstract: The present disclosure provides a display panel and a display device. The display panel includes a display region, a frame region surrounding the display region, a color filter substrate, and an array substrate opposite to the color filter substrate. A black matrix is disposed on a side of the color filter substrate facing the array substrate. The array substrate is provided with a grounding portion located in the frame region. The grounding portion is electrically connected to a portion of the black matrix located in the frame region through a conductive portion. The portion of the black matrix located in the frame region is provided with a first through groove surrounding the display region. The first through groove penetrates the black matrix along a thickness direction of the black matrix. A portion of the first through groove is located between the conductive portion and the display region.

Abstract: Embodiments of the present disclosure provide a thin film transistor assembly, an array substrate and a display panel. The thin film transistor assembly includes a first thin film transistor and a second thin film transistor disposed on a substrate. The first thin film transistor includes a first source electrode, a first drain electrode, and a first active layer. The second thin film transistor includes a second source electrode. The first source electrode is disposed on a side of the first active layer facing towards the substrate. The first drain electrode is disposed on a side of the first active layer facing away from the substrate. An orthogonal projection of the first source electrode on the substrate overlaps an orthogonal projection of the second source electrode on the substrate.

Abstract: The present disclosure provides a thin film transistor, a manufacturing method thereof, and a display device, and the thin film transistor of the present disclosure includes: a substrate; a gate, a gate insulating layer, an active layer, a source and drain layer sequentially provided on the substrate, and the source and drain layer is correspondingly provided at a first source contact region and a first drain contact region of the active layer. A planarization layer is provided between the gate insulating layer and the substrate, the planarization layer is in a same layer as the gate and in direct contact with the gate, and an upper surface of the planarization layer is flush with an upper surface of the gate.

Abstract: Embodiments of the present disclosure pertain to a circuit board, a display panel and a display device. The circuit board includes a ground protection circuit, disposed in a peripheral area of the circuit board. The ground protection circuit includes one or more first wires arranged in parallel, a bridging connection part and a plurality of second wires arranged in parallel, where one end of each first wire is grounded and the other end connects to the bridging connection part electrically, while one end of each second wire connects to the bridging connection part electrically and the other end is grounded. The display panel includes the circuit board and the display device includes the display panel.

Abstract: Embodiments of the present disclosure provide a color filter substrate and a method of manufacturing the same, and a display panel. The color filter substrate includes a base substrate and a light shielding pattern on the base substrate. The light shielding pattern is provided with a groove, which divides the light shielding pattern into an outer light shielding sub-pattern corresponding to a peripheral region of the color filter substrate and an inner light shielding sub-pattern arranged at a position corresponding to a display area of the color filter substrate; an electrically conductive pattern is provided in at least part of a region in the groove and electrically connected with the inner light shielding sub-pattern and/or the outer light shielding sub-pattern.

Abstract: A display panel and a method for fabricating the same, and a display device and a method for charging the same are provided. The display panel includes: an array substrate; an opposite substrate arranged opposite to the array substrate; a charging coil located between the array substrate and the opposite substrate, wherein the charging coil is configured to generate electrical energy through electromagnetic induction. In this way, a battery for charging the battery is integrated inside the display panel to thereby make the display panel thin and lightweight.

Abstract: The present disclosure provides an array substrate and a fabrication method thereof, a display panel and a display module. The array substrate has a display region and a bonding region for bonding with a circuit board, and including: a data line and a gate line in the display region; and a bump unit in the bonding region. The bump unit includes: a gate line bump layer, which is in a same layer and made of a same material as the gate line, is connected to the data line, and includes a main body portion and a plurality of hollowed-out portions in the main body portion; and a data line bump layer, which is in a same layer and made of a same material as the data line, and covers the main body portion and the plurality of hollowed-out portions of the gate line bump layer.

Abstract: The present disclosure is directed to a retort pouch. In an embodiment, the retort pouch includes a multilayer film with at least three layers. The at least three layers include (A) a skin layer comprising a blend of a propylene-based polymer and a styrenic block copolymer, (B) a seal layer comprising blend of a propylene-based polymer and a styrenic block copolymer, and (C) a core layer located between the skin layer (A) and the seal layer (B). The core layer comprises a blend of (1) a propylene-based polymer, (2) an ethylene-based polymer, and (3) a crystalline block composite (CBC).

Abstract: An electrostatic protection circuit, an array substrate, a display panel and a display device are disclosed. The electrostatic protection circuit is located within a peripheral region of an array substrate and includes: a first ground wire provided in a same layer as a source electrode and a drain electrode of a thin film transistor located within a display region of the array substrate; and a second ground wire provided in a same layer as a gate electrode of the thin film transistor, wherein, the first ground wire forms a first loop with a printed circuit board provided within the peripheral region, the first loop surrounds the display region; the second ground wire forms a second loop with the printed circuit board, and the second loop surrounds the display region.