Patents by Inventor Jinhan Zhang

Jinhan Zhang has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 12205945
    Abstract: The semiconductor device includes a substrate, a first nitride semiconductor layer disposed on the substrate, a second nitride semiconductor layer disposed on the first nitride semiconductor layer and having a bandgap greater than that of the first nitride semiconductor layer. The semiconductor device further includes a first gate conductor disposed on a first region of the second nitride semiconductor layer, a first source electrode disposed on a first side of the first gate conductor, a first field plate disposed on a second side of the first gate conductor, a first conductive terminal and a second conductive terminal disposed on a second region of the second nitride semiconductor layer, and a resistor formed in the first nitride semiconductor layer and electrically connected between the first conductive terminal and the second conductive terminal, wherein the resistor comprises at least one conductive region.
    Type: Grant
    Filed: November 22, 2023
    Date of Patent: January 21, 2025
    Assignee: INNOSCIENCE (SUZHOU) TECHNOLOGY CO., LTD.
    Inventors: Danfeng Mao, King Yuen Wong, Jinhan Zhang, Xiaoyan Zhang, Wei Wang, Jianjian Sheng
  • Patent number: 12199017
    Abstract: A semiconductor device includes a nitride-based transistor, a first metal layer, a second metal layer, a third metal layer, a source pad, and a drain pad. The first metal layer is disposed over the nitride-based transistor. The second metal layer is disposed over the first metal layer. The third metal layer is disposed over the second metal layer and includes a first pattern and a second pattern which are spaced apart from each other. The source pad is immediately above the first metal layer, the second metal layer, and the first pattern of the third metal layer and is electrically coupled with the nitride-based transistor. The drain pad is immediately above the first metal layer, the second metal layer, and the second pattern of the third metal layer and is electrically coupled with the nitride-based transistor.
    Type: Grant
    Filed: November 12, 2021
    Date of Patent: January 14, 2025
    Assignee: INNOSCIENCE (SUZHOU) TECHNOLOGY CO., LTD.
    Inventors: Xiaoyan Zhang, Jiawei Wen, Yulong Zhang, Jinhan Zhang, Ronghui Hao, Xingjun Li, King Yuen Wong
  • Patent number: 12159931
    Abstract: A nitride-based semiconductor device including a first and a second nitride-based semiconductor layers, a source electrode and a drain electrode, and a gate structure. The gate structure includes at least one conductive layer and two or more doped nitride-based semiconductor layers. The at least one conductive layer includes metal, and is in contact with the second nitride-based semiconductor layer to form a metal-semiconductor junction therebetween. The two or more doped nitride-based semiconductor layers are in contact with the second nitride-based semiconductor layer and abut against the conductive layer, so as to form contact interfaces abutting against the metal-semiconductor junction with the second nitride-based semiconductor.
    Type: Grant
    Filed: October 22, 2021
    Date of Patent: December 3, 2024
    Assignee: INNOSCIENCE (SUZHOU) TECHNOLOGY CO., LTD.
    Inventors: Qingyuan He, Ronghui Hao, Fu Chen, Jinhan Zhang, King Yuen Wong
  • Patent number: 12125847
    Abstract: A nitride-based semiconductor device includes a first nitride-based semiconductor layer, a second nitride-based semiconductor layer, a first nitride-based transistor, and a second nitride-based transistor. The first nitride-based transistor applies the 2DEG region as a channel thereof and comprising a first drain electrode that makes contact with the second nitride-based semiconductor layer to form a first Schottky diode with the second nitride-based semiconductor layer. The second nitride-based transistor applies the 2DEG region as a channel thereof and includes a second drain electrode that makes contact with the second nitride-based semiconductor layer to form a second Schottky diode with the second nitride-based semiconductor layer, such that the first Schottky diode and the second Schottky diode are connected to the same node.
    Type: Grant
    Filed: November 12, 2021
    Date of Patent: October 22, 2024
    Assignee: INNOSCIENCE (SUZHOU) TECHNOLOGY CO., LTD.
    Inventors: Qingyuan He, Ronghui Hao, Fu Chen, Jinhan Zhang, King Yuen Wong
  • Patent number: 12074202
    Abstract: A nitride-based semiconductor device includes a first and a second nitride-based semiconductor layers, a source electrode, a gate electrode, and a drain structure. The drain structure includes a first doped nitride-based semiconductor layer, an ohmic contact electrode, and a conductive layer. The first doped nitride-based semiconductor layer is in contact with the second nitride-based semiconductor layer to form a first contact interface. The ohmic contact electrode is in contact with the second nitride-based semiconductor layer to form a second contact interface. The conductive layer includes metal and in contact with the second nitride-based semiconductor layer to form a metal-semiconductor junction therebetween. The conductive layer is connected to the first doped nitride-based semiconductor layer and the ohmic contact electrode, and the ohmic contact interface is farther away from the gate electrode than the first contact interface and the second contact interface.
    Type: Grant
    Filed: November 9, 2021
    Date of Patent: August 27, 2024
    Assignee: INNOSCIENCE (SUZHOU) TECHNOLOGY CO., LTD.
    Inventors: Qingyuan He, Ronghui Hao, Fu Chen, Jinhan Zhang, King Yuen Wong
  • Patent number: 12046593
    Abstract: The present disclosure relates to a semiconductor device and a fabrication method thereof. The semiconductor device includes a substrate, a first nitride semiconductor layer disposed on the substrate, a second nitride semiconductor layer disposed on the first nitride semiconductor layer and having a bandgap greater than that of the first nitride semiconductor layer. The semiconductor device further includes a first gate conductor disposed on a first region of the second nitride semiconductor layer, a passivation layer covering the first gate conductor, and a second gate conductor disposed on the passivation layer and on a second region of the second nitride semiconductor layer, wherein the first region is laterally spaced apart from the second region.
    Type: Grant
    Filed: December 25, 2020
    Date of Patent: July 23, 2024
    Assignee: INNOSCIENCE (SUZHOU) TECHNOLOGY CO., LTD.
    Inventors: Danfeng Mao, King Yuen Wong, Jinhan Zhang, Xiaoyan Zhang, Wei Wang, Jianjian Sheng
  • Patent number: 11983751
    Abstract: In some embodiments, apparatuses and methods are provided herein useful to detecting inbound and outbound traffic. In some embodiments, there is provided a system for detecting inbound and outbound traffic at a facility including a video camera and a control circuit configured to detect a human and estimate a location of the human; determine whether the detected human is inbound or outbound the facility based on a relative movement of the detected human within a first region, a second region, and a third region; and transmit data based on the determination.
    Type: Grant
    Filed: July 11, 2022
    Date of Patent: May 14, 2024
    Assignee: Walmart Apollo, LLC
    Inventors: Yi Ding, Joseph Duffy, Jiankun Liu, Tianyi Mao, Ryan B. Reagan, Zhichun Xiao, Jinhan Zhang, Shouyi Zhang
  • Publication number: 20240096878
    Abstract: The semiconductor device includes a substrate, a first nitride semiconductor layer disposed on the substrate, a second nitride semiconductor layer disposed on the first nitride semiconductor layer and having a bandgap greater than that of the first nitride semiconductor layer. The semiconductor device further includes a first gate conductor disposed on a first region of the second nitride semiconductor layer, a first source electrode disposed on a first side of the first gate conductor, a first field plate disposed on a second side of the first gate conductor, a first conductive terminal and a second conductive terminal disposed on a second region of the second nitride semiconductor layer, and a resistor formed in the first nitride semiconductor layer and electrically connected between the first conductive terminal and the second conductive terminal, wherein the resistor comprises at least one conductive region.
    Type: Application
    Filed: November 22, 2023
    Publication date: March 21, 2024
    Applicant: INNOSCIENCE (SUZHOU) TECHNOLOGY CO., LTD.
    Inventors: Danfeng MAO, King Yuen WONG, Jinhan ZHANG, Xiaoyan ZHANG, Wei WANG, Jianjian SHENG
  • Publication number: 20240063095
    Abstract: A semiconductor device includes a nitride-based transistor, a first metal layer, a second metal layer, a third metal layer, a source pad, and a drain pad. The first metal layer is disposed over the nitride-based transistor. The second metal layer is disposed over the first metal layer. The third metal layer is disposed over the second metal layer and includes a first pattern and a second pattern which are spaced apart from each other. The source pad is immediately above the first metal layer, the second metal layer, and the first pattern of the third metal layer and is electrically coupled with the nitride-based transistor. The drain pad is immediately above the first metal layer, the second metal layer, and the second pattern of the third metal layer and is electrically coupled with the nitride-based transistor.
    Type: Application
    Filed: November 12, 2021
    Publication date: February 22, 2024
    Inventors: Xiaoyan ZHANG, Jiawei WEN, Yulong ZHANG, Jinhan ZHANG, Ronghui HAO, Xingjun LI, King Yuen WONG
  • Publication number: 20240063218
    Abstract: A nitride-based semiconductor device includes a first nitride-based semiconductor layer, a second nitride-based semiconductor layer, a first nitride-based transistor, and a second nitride-based transistor. The first nitride-based transistor applies the 2DEG region as a channel thereof and comprising a first drain electrode that makes contact with the second nitride-based semiconductor layer to form a first Schottky diode with the second nitride-based semiconductor layer. The second nitride-based transistor applies the 2DEG region as a channel thereof and includes a second drain electrode that makes contact with the second nitride-based semiconductor layer to form a second Schottky diode with the second nitride-based semiconductor layer, such that the first Schottky diode and the second Schottky diode are connected to the same node.
    Type: Application
    Filed: November 12, 2021
    Publication date: February 22, 2024
    Inventors: Qingyuan HE, Ronghui HAO, Fu CHEN, Jinhan ZHANG, King Yuen WONG
  • Publication number: 20240047536
    Abstract: A semiconductor device includes a first and a second nitride-based semiconductor layers, a gate electrode, a first and a second field plates, and a first dielectric layer. The first field plate is disposed above the second nitride-based semiconductor layer. The second field plate is discontinuous and disposed above the second nitride-based semiconductor layer and in a position higher than the first field plate. The second field plate includes one or more enclosed discontinuities in a discontinuity region thereof. The first dielectric layer is disposed above the second field plate. The first dielectric layer covers and penetrates the second discontinuous field plate in the discontinuity region such that the second field plate encloses at least one portion of the first dielectric layer within its one or more enclosed discontinuities.
    Type: Application
    Filed: August 11, 2021
    Publication date: February 8, 2024
    Inventors: Chuan HE, Xiaoqing PU, Ronghui HAO, Jinhan ZHANG, King Yuen WONG
  • Publication number: 20240030330
    Abstract: A nitride-based semiconductor device includes a first and a second nitride-based semiconductor layers, a doped III-V semiconductor layer, a gate, a source electrode, and a drain electrode. The doped III-V semiconductor layer is disposed over the second nitride-based semiconductor layer and has opposite first sidewalls which recessed inward toward a body of the doped III-V semiconductor layer between the sidewalls to make a curved profile located at a bottom of the doped III-V semiconductor layer. The gate electrode is disposed above the doped III-V semiconductor layer. The source electrode and the drain electrode are disposed above the second nitride-based semiconductor layer. The gate electrode is located between the source and drain electrodes.
    Type: Application
    Filed: September 7, 2021
    Publication date: January 25, 2024
    Inventors: Chuan HE, Xiaoqing PU, Ronghui HAO, Jinhan ZHANG, King Yuen WONG
  • Publication number: 20240030309
    Abstract: A nitride-based semiconductor device includes a first and a second nitride-based semiconductor layers, a source, a drain and a gate electrode, a doped nitride-based semiconductor layer, and a first field plate. The first field plate disposed over the doped nitride-based semiconductor layer. A vertical projection of the doped nitride-based semiconductor layer on the second nitride-based semiconductor layer overlaps with a vertical projection of the first field plate on the second nitride-based semiconductor layer, and a vertical projection of the gate electrode on the second nitride-based semiconductor layer is physically separated from the vertical projection of the first field plate on the second nitride-based semiconductor layer.
    Type: Application
    Filed: September 28, 2021
    Publication date: January 25, 2024
    Inventors: Ronghui HAO, Jinhan ZHANG, King Yuen WONG
  • Publication number: 20240014305
    Abstract: A nitride-based semiconductor device including a first and a second nitride-based semiconductor layers, a source electrode and a drain electrode, and a gate structure. The gate structure includes at least one conductive layer and two or more doped nitride-based semiconductor layers. The at least one conductive layer includes metal, and is in contact with the second nitride-based semiconductor layer to form a metal-semiconductor junction therebetween. The two or more doped nitride-based semiconductor layers are in contact with the second nitride-based semiconductor layer and abut against the conductive layer, so as to form contact interfaces abutting against the metal-semiconductor junction with the second nitride-based semiconductor.
    Type: Application
    Filed: October 22, 2021
    Publication date: January 11, 2024
    Inventors: Qingyuan HE, Ronghui HAO, Fu CHEN, Jinhan ZHANG, King Yuen WONG
  • Patent number: 11869887
    Abstract: The present disclosure relates to a semiconductor device and a fabrication method thereof. The semiconductor device includes a substrate, a first nitride semiconductor layer disposed on the substrate, a second nitride semiconductor layer disposed on the first nitride semiconductor layer and having a bandgap greater than that of the first nitride semiconductor layer. The semiconductor device further includes a first gate conductor disposed on a first region of the second nitride semiconductor layer, a first source electrode disposed on a first side of the first gate conductor, a first field plate disposed on a second side of the first gate conductor; and a capacitor having a first conductive layer and a second conductive layer and disposed on a second region of the second nitride semiconductor layer. Wherein the first conductive layer of the capacitor and the first source electrode have a first material, and the second conductive layer of the capacitor and the first field plate have a second material.
    Type: Grant
    Filed: December 25, 2020
    Date of Patent: January 9, 2024
    Inventors: Danfeng Mao, King Yuen Wong, Jinhan Zhang, Xiaoyan Zhang, Wei Wang, Jianjian Sheng
  • Patent number: 11837633
    Abstract: The HEMT includes a channel layer, a barrier layer, a drain, and a gate conductor. The barrier layer is disposed on the channel layer. The drain is disposed on the barrier layer. The gate conductor is disposed on the barrier layer. The barrier layer comprises a doped semiconductor region extending from a top surface to a bottom surface of the barrier layer and located between the drain and the gate conductor.
    Type: Grant
    Filed: March 3, 2022
    Date of Patent: December 5, 2023
    Assignee: INNOSCIENCE (ZHUHAI) TECHNOLOGY CO., LTD.
    Inventors: King Yuen Wong, Ronghui Hao, Jinhan Zhang
  • Publication number: 20230352540
    Abstract: A nitride-based semiconductor device includes a first and a second nitride-based semiconductor layers, a source electrode, a gate electrode, and a drain structure. The drain structure includes a first doped nitride-based semiconductor layer, an ohmic contact electrode, and a conductive layer. The first doped nitride-based semiconductor layer is in contact with the second nitride-based semiconductor layer to form a first contact interface. The ohmic contact electrode is in contact with the second nitride-based semiconductor layer to form a second contact interface. The conductive layer includes metal and in contact with the second nitride-based semiconductor layer to form a metal-semiconductor junction therebetween. The conductive layer is connected to the first doped nitride-based semiconductor layer and the ohmic contact electrode, and the ohmic contact interface is farther away from the gate electrode than the first contact interface and the second contact interface.
    Type: Application
    Filed: November 9, 2021
    Publication date: November 2, 2023
    Inventors: Qingyuan HE, Ronghui HAO, Fu CHEN, Jinhan ZHANG, King Yuen WONG
  • Patent number: 11784237
    Abstract: A semiconductor device includes a substrate, a channel layer, a barrier layer, a gate, a strained layer and a passivation layer. The channel layer is disposed on the substrate. The barrier layer is disposed on the channel layer. The gate is disposed on the barrier layer. The strained layer is disposed on the barrier layer. The passivation layer covers the gate and the strained layer. The material of the passivation layer differs from that of the strained layer.
    Type: Grant
    Filed: December 20, 2019
    Date of Patent: October 10, 2023
    Assignee: INNOSCIENCE (ZHUHAI) TECHNOLOGY CO., LTD.
    Inventors: Kingyuen Wong, Han-Chin Chiu, Ming-Hong Chang, Chunhua Zhou, Jinhan Zhang
  • Patent number: 11784221
    Abstract: The HEMT includes a channel layer, a barrier layer, a drain, and a gate conductor. The barrier layer is disposed on the channel layer. The drain is disposed on the barrier layer. The gate conductor is disposed on the barrier layer. The channel layer includes a doped semiconductor structure overlapping with a top surface of the channel layer and having a bottom-most border that is located over a bottom-most surface of the channel layer and is spaced apart from the bottom-most surface of the channel layer. The doped semiconductor structure is located between the drain and the gate conductor.
    Type: Grant
    Filed: March 3, 2022
    Date of Patent: October 10, 2023
    Assignee: INNOSCIENC (ZHUHAI) TECHNOLOGY CO., LTD.
    Inventors: King Yuen Wong, Ronghui Hao, Jinhan Zhang
  • Patent number: 11742397
    Abstract: Embodiments of this application disclose a semiconductor device and a manufacturing method thereof. The semiconductor device includes a substrate, a first nitride semiconductor layer disposed on the substrate and having a first bandgap, and a second nitride semiconductor layer disposed on the first nitride semiconductor layer and having a second bandgap. The second bandgap is larger than the first bandgap. The semiconductor device further includes a gate contact disposed over the second nitride semiconductor layer and a first field plate disposed over the gate contact. The first field plate has a first surface facing the substrate, a second surface facing the substrate, and a protruded portion. The protruded portion has a bottom surface facing the substrate. The bottom surface is located between the first surface and the second surface.
    Type: Grant
    Filed: October 8, 2020
    Date of Patent: August 29, 2023
    Assignee: INNOSCIENCE (ZHUHAI) TECHNOLOGY CO., LTD.
    Inventors: Jinhan Zhang, Xiaoyan Zhang, Kai Hu, Ronghui Hao, Junhui Ma