Patents by Inventor Jin-Sung Jung

Jin-Sung Jung has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240179978
    Abstract: A display device comprises a substrate; a circuit array layer comprising pixel drivers, data lines, first dummy lines, and second dummy lines; and a light emitting array layer. The display area comprises middle, first side, and second side regions. The data lines comprise first, second, and third data lines disposed in the middle, first side, and second side regions, respectively. The first dummy lines comprise a first data detour line disposed in the first side region and adjacent to a part of the second data line, and auxiliary lines. The second dummy lines comprise a second data detour line configured to connect the first data detour line to the third data line, and additional lines. The auxiliary lines comprise a bias auxiliary line to which a bias power is applied; and a second power auxiliary line to which a second power is applied.
    Type: Application
    Filed: February 8, 2024
    Publication date: May 30, 2024
    Inventors: Jin Sung AN, Sung Ho KIM, Yong Jae KIM, Yun Hwan PARK, Yoon Jee SHIN, Sug Woo JUNG, Hyun Wook CHOI
  • Publication number: 20240097061
    Abstract: The present invention discloses a back contact solar cell. The back contact solar cell includes a semiconductor substrate having a front surface and a rear surface; a first conductive type semiconductor region having a first conductive type and a second conductive type semiconductor region having a second conductive type at an interval on the rear surface of the semiconductor substrate. Furthermore, the rear surface of the semiconductor substrate has a texturing structure at the interval between the first conductive type semiconductor region and the second conductive type semiconductor region.
    Type: Application
    Filed: November 7, 2023
    Publication date: March 21, 2024
    Inventors: Hwa Nyeon Kim, Ju Hwan Yun, Jong Hwan Kim, Bum Sung Kim, II Hyoung Jung, Jin Ah Kim
  • Patent number: 11937476
    Abstract: A display device comprises a substrate; a circuit array layer comprising pixel drivers, data lines, first dummy lines, and second dummy lines; and a light emitting array layer. The display area comprises middle, first side, and second side regions. The data lines comprise first, second, and third data lines disposed in the middle, first side, and second side regions, respectively. The first dummy lines comprise a first data detour line disposed in the first side region and adjacent to a part of the second data line, and auxiliary lines. The second dummy lines comprise a second data detour line configured to connect the first data detour line to the third data line, and additional lines. The auxiliary lines comprise a bias auxiliary line to which a bias power is applied; and a second power auxiliary line to which a second power is applied.
    Type: Grant
    Filed: May 4, 2023
    Date of Patent: March 19, 2024
    Assignee: Samsung Display Co., Ltd.
    Inventors: Jin Sung An, Sung Ho Kim, Yong Jae Kim, Yun Hwan Park, Yoon Jee Shin, Sug Woo Jung, Hyun Wook Choi
  • Publication number: 20220202211
    Abstract: Provided are a bedding and a bedding cover therefor, the bedding including an upper cover having a first fastening member; a lower cover having a second fastening member; and a bedding insert fitted between the upper cover and the lower cover, and having a third fastening member for coupling to the upper cover and a fourth fastening member for coupling to the lower cover, the upper cover and the lower cover being coupled to each other by the first fastening member and the second fastening member, and being separated from each other by releasing the coupling between the first fastening member and the second fastening member; the upper cover further including a fifth fastening member disposed at a position corresponding to the third fastening member; and the lower cover further including a sixth fastening member disposed at a position corresponding to the fourth fastening member.
    Type: Application
    Filed: January 23, 2020
    Publication date: June 30, 2022
    Inventors: Jin-Young JUNG, Jin-Sung JUNG
  • Publication number: 20080225598
    Abstract: Provided is a test method of a NAND flash memory. The method includes programming a page of a selected memory block in the flash memory; accumulating a program result of the page; and repeating the programming of other pages and the accumulating of the program result of the other pages until all pages in the selected memory block are programmed.
    Type: Application
    Filed: March 11, 2008
    Publication date: September 18, 2008
    Applicant: Samsung Electronics Co., Ltd.
    Inventors: Jin-Sung Jung, Jong-Kook Kim
  • Publication number: 20040145387
    Abstract: A method for testing a multi-chip package formed of different types of semiconductor devices, using an integrated burn-in test program which can reduce throughput time, reduce the possibility of error by an operator, and reduce workload. A multi-chip package is tested in burn-in equipment capable of applying a plurality of scan control clock signals. An integrated burn-in test program requires fewer burn-in test programs to be uploaded, fewer contact tests, and fewer bin sorting operations.
    Type: Application
    Filed: January 20, 2004
    Publication date: July 29, 2004
    Inventors: Geum-Jin Yun, Jin-Sung Jung, Seong-Goo Kang, Jeong-Ho Bang, Byoung-Jun Min