Patents by Inventor Jiro Yugami

Jiro Yugami has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20060068561
    Abstract: A semiconductor device and a method for manufacturing the same of forming a silicon nitride film selectively without giving damages or contaminations to a surface of the silicon substrate thereby forming different types of gate dielectrics in one identical silicon substrate, are obtained by forming a silicon dioxide on the surface of a silicon substrate, then removing a portion thereof, forming a silicon nitride film to the surface of the substrate from which the silicon dioxide has been removed and, simultaneously, introducing nitrogen to the surface of the silicon dioxide which is left not being removed or, alternatively, depositing a silicon dioxide on the surface of the silicon substrate by chemical vapor deposition, then removing a portion thereof, forming a silicon nitride film on the surface of a substrate from which the silicon dioxide has been removed, and, simultaneously, introducing nitrogen to the surface of the silicon dioxide left not being removed, successively, dissolving and removing nitrogen
    Type: Application
    Filed: November 14, 2005
    Publication date: March 30, 2006
    Inventors: Shimpei Tsujikawa, Toshiyuki Mine, Jiro Yugami, Natsuki Yokoyama, Tsuyoshi Yamauchi
  • Patent number: 6982468
    Abstract: A semiconductor device and a method for manufacturing the same of forming a silicon nitride film selectively without giving damages or contaminations to a surface of the silicon substrate thereby forming different types of gate dielectrics in one identical silicon substrate, are obtained by forming a silicon dioxide on the surface of a silicon substrate, then removing a portion thereof, forming a silicon nitride film to the surface of the substrate from which the silicon dioxide has been removed and, simultaneously, introducing nitrogen to the surface of the silicon dioxide which is left not being removed or, alternatively, depositing a silicon dioxide on the surface of the silicon substrate by chemical vapor deposition, then removing a portion thereof, forming a silicon nitride film on the surface of a substrate from which the silicon dioxide has been removed, and, simultaneously, introducing nitrogen to the surface of the silicon dioxide left not being removed, successively, dissolving and removing nitrogen
    Type: Grant
    Filed: September 16, 2004
    Date of Patent: January 3, 2006
    Assignees: Renesas Technology Corp., Hitachi ULSI Systems Co., Ltd.
    Inventors: Shimpei Tsujikawa, Toshiyuki Mine, Jiro Yugami, Natsuki Yokoyama, Tsuyoshi Yamauchi
  • Patent number: 6953728
    Abstract: This semiconductor device manufacturing method comprises the steps of: forming a thick gate oxide film (thick oxide film) in a first region of a substrate, forming a thin gate oxide film (thin oxide layer) in a second region, and then, applying oxynitridation to these gate oxide films; forming gate electrodes to 1d on these gate oxide films; and implanting an ion that contains nitrogen or nitrogen atoms into at least one part of an interface between the hick gate oxide film (thick oxide film) and the substrate before or after the step of forming the gate electrodes, thereby forming a highly oxy-nitrided region. In this manner, in a semiconductor device in which there coexist a MISFET having a thin gate insulation film and a MISFET having a thick gate insulation film, hot carrier reliability of the MISFET having the thick gate insulation film is improved.
    Type: Grant
    Filed: February 11, 2004
    Date of Patent: October 11, 2005
    Assignee: Hitachi, Ltd.
    Inventors: Eiichi Murakami, Akio Nishida, Kazunori Umeda, Kousuke Okuyama, Toshiaki Yamanaka, Jiro Yugami, Shinichiro Kimura
  • Patent number: 6897104
    Abstract: A semiconductor device and a method for manufacturing the same of forming a silicon nitride film selectively without giving damages or contaminations to a surface of the silicon substrate thereby forming different types of gate dielectrics in one identical silicon substrate, are obtained by forming a silicon dioxide on the surface of a silicon substrate, then removing a portion thereof, forming a silicon nitride film to the surface of the substrate from which the silicon dioxide has been removed and, simultaneously, introducing nitrogen to the surface of the silicon dioxide which is left not being removed or, alternatively, depositing a silicon dioxide on the surface of the silicon substrate by chemical vapor deposition, then removing a portion thereof, forming a silicon nitride film on the surface of a substrate from which the silicon dioxide has been removed, and, simultaneously, introducing nitrogen to the surface of the silicon dioxide left not being removed, successively, dissolving and removing nitrogen
    Type: Grant
    Filed: June 3, 2003
    Date of Patent: May 24, 2005
    Assignees: Renesas Technology Corp., Hitachi ULSI Systems Co., Ltd.
    Inventors: Shimpei Tsujikawa, Toshiyuki Mine, Jiro Yugami, Natsuki Yokoyama, Tsuyoshi Yamauchi
  • Publication number: 20050104141
    Abstract: There is provided a semiconductor device configured as follows. On a semiconductor substrate, a titanium oxide film which is an insulating film having a higher dielectric constant than that of a silicon dioxide film is formed as a gate insulating film, and a gate electrode is disposed thereon, resulting in a field effect transistor. The end portions in the gate length direction of the titanium oxide film are positioned inwardly from the respective end portions on the source side and on the drain side of the gate electrode, and the end portions of the titanium oxide film are positioned in a region in which the gate electrode overlaps with the source region and the drain region in plan configuration. This semiconductor device operates at a high speed, and is excellent in short channel characteristics and driving current. Further, in the semiconductor device, the amount of metallic elements introduced into a silicon substrate is small.
    Type: Application
    Filed: December 2, 2004
    Publication date: May 19, 2005
    Inventors: Jiro Yugami, Natsuki Yokoyama, Toshiyuki Mine, Yasushi Goto
  • Publication number: 20050029600
    Abstract: A semiconductor device and a method for manufacturing the same of forming a silicon nitride film selectively without giving damages or contaminations to a surface of the silicon substrate thereby forming different types of gate dielectrics in one identical silicon substrate, are obtained by forming a silicon dioxide on the surface of a silicon substrate, then removing a portion thereof, forming a silicon nitride film to the surface of the substrate from which the silicon dioxide has been removed and, simultaneously, introducing nitrogen to the surface of the silicon dioxide which is left not being removed or, alternatively, depositing a silicon dioxide on the surface of the silicon substrate by chemical vapor deposition, then removing a portion thereof, forming a silicon nitride film on the surface of a substrate from which the silicon dioxide has been removed, and, simultaneously, introducing nitrogen to the surface of the silicon dioxide left not being removed, successively, dissolving and removing nitrogen
    Type: Application
    Filed: September 16, 2004
    Publication date: February 10, 2005
    Inventors: Shimpei Tsujikawa, Toshiyuki Mine, Jiro Yugami, Natsuki Yokoyama, Tsuyoshi Yamauchi
  • Patent number: 6849513
    Abstract: The present invention provides a MOS semiconductor device which enables gate leakage current reduction with a thinner gate dielectric film for higher speed, and a production method thereof. According to the present invention, a gate dielectric film 6 is made as follows: after forming a silicon nitride film 3 with a specified thickness, it is annealed in an oxidizing atmosphere to form silicon oxide 4 on the silicon nitride film 3, then this silicon oxide 4 is completely removed by exposure to a dissolving liquid. As a result, at depths between 0.12 nm and 0.5 nm from the top surface of the silicon nitride film 3 in the gate dielectric film 6 whose main constituent elements are silicon, nitrogen and oxygen, the nitrogen concentration is higher than the oxygen concentration. This enables the use of a thinner gate dielectric film with silicon, nitrogen and oxygen as main constituent elements while at the same time realizing reduction in leakage currents.
    Type: Grant
    Filed: October 14, 2003
    Date of Patent: February 1, 2005
    Assignee: Renesas Technology Corp.
    Inventors: Shimpei Tsujikawa, Jiro Yugami, Toshiyuki Mine, Masahiro Ushiyama
  • Patent number: 6833582
    Abstract: A nonvolatile semiconductor memory device configured by a select MOS transistor provided with a gate insulator film and a select gate electrode, as well as a memory MOS transistor provided with a capacitor insulator film comprising a lower potential barrier film, a charge trapping film, and an upper potential barrier film, as well as a memory gate electrode. The charge trapping film is formed with a silicon oxynitride film and the upper potential barrier film is omitted or its thickness is limited to 1 nm and under to prevent the Gm degradation to be caused by the silicon oxynitride film, thereby lowering the erasure gate voltage. The charge trapping film is formed with a silicon oxynitride film used as a main charge trapping film and a silicon nitride film formed on or beneath the silicon oxynitride film so as to form a potential barrier effective only for holes. And, a hot-hole erasing method is employed to lower the erasure voltage.
    Type: Grant
    Filed: January 29, 2004
    Date of Patent: December 21, 2004
    Assignee: Renesas Technology Corp.
    Inventors: Toshiyuki Mine, Takashi Hashimoto, Senichi Nishibe, Nozomu Matsuzaki, Hitoshi Kume, Jiro Yugami
  • Patent number: 6833296
    Abstract: There is provided a semiconductor device configured as follows. On a semiconductor substrate, a titanium oxide film which is an insulating film having a higher dielectric constant than that of a silicon dioxide film is formed as a gate insulating film, and a gate electrode is disposed thereon, resulting in a field effect transistor. The end portions in the gate length direction of the titanium oxide film are positioned inwardly from the respective end portions on the source side and on the drain side of the gate electrode, and the end portions of the titanium oxide film are positioned in a region in which the gate electrode overlaps with the source region and the drain region in plan configuration. This semiconductor device operates at a high speed, and is excellent in short channel characteristics and driving current. Further, in the semiconductor device, the amount of metallic elements introduced into a silicon substrate is small.
    Type: Grant
    Filed: February 12, 2004
    Date of Patent: December 21, 2004
    Assignee: Renesas Technology Corp.
    Inventors: Jiro Yugami, Natsuki Yokoyama, Toshiyuki Mine, Yasushi Goto
  • Publication number: 20040198002
    Abstract: This semiconductor device manufacturing method comprises the steps of: forming a thick gate oxide film (thick oxide film) in a first region of a substrate, forming a thin gate oxide film (thin oxide layer) in a second region, and then, applying oxynitridation to these gate oxide films; forming gate electrodes to 1d on these gate oxide films; and implanting an ion that contains nitrogen or nitrogen atoms into at least one part of an interface between the hick gate oxide film (thick oxide film) and the substrate before or after the step of forming the gate electrodes, thereby forming a highly oxy-nitrided region. In this manner, in a semiconductor device in which there coexist a MISFET having a thin gate insulation film and a MISFET having a thick gate insulation film, hot carrier reliability of the MISFET having the thick gate insulation film is improved.
    Type: Application
    Filed: February 11, 2004
    Publication date: October 7, 2004
    Applicant: Hitachi, Ltd.
    Inventors: Eiichi Murakami, Akio Nishida, Kazunori Umeda, Kousuke Okuyama, Toshiaki Yamanaka, Jiro Yugami, Shinichiro Kimura
  • Publication number: 20040183122
    Abstract: A nonvolatile semiconductor memory device configured by a select MOS transistor provided with a gate insulator film and a select gate electrode, as well as a memory MOS transistor provided with a capacitor insulator film comprising a lower potential barrier film, a charge trapping film, and an upper potential barrier film, as well as a memory gate electrode. The charge trapping film is formed with a silicon oxynitride film and the upper potential barrier film is omitted or its thickness is limited to 1 nm and under to prevent the Gm degradation to be caused by the silicon oxynitride film, thereby lowering the erasure gate voltage. The charge trapping film is formed with a silicon oxynitride film used as a main charge trapping film and a silicon nitride film formed on or beneath the silicon oxynitride film so as to form a potential barrier effective only for holes. And, a hot-hole erasing method is employed to lower the erasure voltage.
    Type: Application
    Filed: January 29, 2004
    Publication date: September 23, 2004
    Applicant: Renesas Technology Corp.
    Inventors: Toshiyuki Mine, Takashi Hashimoto, Senichi Nishibe, Nozomu Matsuzaki, Hitoshi Kume, Jiro Yugami
  • Publication number: 20040159889
    Abstract: There is provided a semiconductor device configured as follows. On a semiconductor substrate, a titanium oxide film which is an insulating film having a higher dielectric constant than that of a silicon dioxide film is formed as a gate insulating film, and a gate electrode is disposed thereon, resulting in a field effect transistor. The end portions in the gate length direction of the titanium oxide film are positioned inwardly from the respective end portions on the source side and on the drain side of the gate electrode, and the end portions of the titanium oxide film are positioned in a region in which the gate electrode overlaps with the source region and the drain region in plan configuration. This semiconductor device operates at a high speed, and is excellent in short channel characteristics and driving current. Further, in the semiconductor device, the amount of metallic elements introduced into a silicon substrate is small.
    Type: Application
    Filed: February 12, 2004
    Publication date: August 19, 2004
    Inventors: Jiro Yugami, Natsuki Yokoyama, Toshiyuki Mine, Yasushi Goto
  • Patent number: 6777296
    Abstract: Disclosed is a method of improving smoothness on a surface of a gate dielectric composed of a high dielectric film made of metal oxide. A dielectric film with a high permittivity made of metal oxide such as a TiO2 film or a ZrO2 film having an amorphous structure is deposited over a silicon substrate by the plasma enhanced chemical vapor deposition method, and the film is used as a gate dielectric. Since the gate dielectric has good surface smoothness, simultaneous reductions of both the film thickness of a gate dielectric and the gate leakage current can be achieved. In addition, it is also possible to reduce the variation in the characteristics of the devices.
    Type: Grant
    Filed: December 18, 2002
    Date of Patent: August 17, 2004
    Assignee: Renesas Technology Corp.
    Inventors: Shimpei Tsujikawa, Toshiyuki Mine, Jiro Yugami, Hirotaka Hamamura
  • Publication number: 20040082131
    Abstract: The present invention provides a MOS semiconductor device which enables gate leakage current reduction with a thinner gate dielectric film for higher speed, and a production method thereof. According to the present invention, a gate dielectric film 6 is made as follows: after forming a silicon nitride film 3 with a specified thickness, it is annealed in an oxidizing atmosphere to form silicon oxide 4 on the silicon nitride film 3, then this silicon oxide 4 is completely removed by exposure to a dissolving liquid. As a result, at depths between 0.12 nm and 0.5 nm from the top surface of the silicon nitride film 3 in the gate dielectric film 6 whose main constituent elements are silicon, nitrogen and oxygen, the nitrogen concentration is higher than the oxygen concentration. This enables the use of a thinner gate dielectric film with silicon, nitrogen and oxygen as main constituent elements while at the same time realizing reduction in leakage currents.
    Type: Application
    Filed: October 14, 2003
    Publication date: April 29, 2004
    Applicant: Hitachi, Ltd.
    Inventors: Shimpei Tsujikawa, Jiro Yugami, Toshiyuki Mine, Masahiro Ushiyama
  • Patent number: 6727146
    Abstract: This semiconductor device manufacturing method comprises the steps of: forming a thick gate oxide film (thick oxide film) in a first region of a substrate, forming a thin gate oxide film (thin oxide layer) in a second region, and then, applying oxynitridation to these gate oxide films; forming gate electrodes to 1d on these gate oxide films; and implanting an ion that contains nitrogen or nitrogen atoms into at least one part of an interface between the hick gate oxide film (thick oxide film) and the substrate before or after the step of forming the gate electrodes, thereby forming a highly oxy-nitrided region. In this manner, in a semiconductor device in which there coexist a MISFET having a thin gate insulation film and a MISFET having a thick gate insulation film, hot carrier reliability of the MISFET having the thick gate insulation film is improved.
    Type: Grant
    Filed: November 6, 2002
    Date of Patent: April 27, 2004
    Assignee: Hitachi, Ltd.
    Inventors: Eiichi Murakami, Akio Nishida, Kazunori Umeda, Kousuke Okuyama, Toshiaki Yamanaka, Jiro Yugami, Shinichiro Kimura
  • Patent number: 6723625
    Abstract: Disclosed is a semiconductor device (e.g., nonvolatile semiconductor memory device) and method of forming the device. The device includes a gate electrode (e.g., floating gate electrode) having a first layer of an amorphous silicon film, or a polycrystalline silicon thin film or a film of a combination of amorphous and polycrystalline silicon, on the gate insulating film. Where the film includes polycrystalline silicon, the thickness of the film is less than 10 nm. A thicker polycrystalline silicon film can be provided on or overlying the first layer. The memory device can increase the write/erase current significantly without increasing the low electric field leakage current after application of stresses, which in turn reduces write/erase time substantially.
    Type: Grant
    Filed: September 23, 2002
    Date of Patent: April 20, 2004
    Assignee: Renesas Technology Corporation
    Inventors: Toshiyuki Mine, Jiro Yugami, Takashi Kobayashi, Masahiro Ushiyama
  • Patent number: 6710383
    Abstract: There is provided a semiconductor device configured as follows. On a semiconductor substrate, a titanium oxide film which is an insulating film having a higher dielectric constant than that of a silicon dioxide film is formed as a gate insulating film, and a gate electrode is disposed thereon, resulting in a field effect transistor. The end portions in the gate length direction of the titanium oxide film are positioned inwardly from the respective end portions on the source side and on the drain side of the gate electrode, and the end portions of the titanium oxide film are positioned in a region in which the gate electrode overlaps with the source region and the drain region in plan configuration. This semiconductor device operates at a high speed, and is excellent in short channel characteristics and driving current. Further, in the semiconductor device, the amount of metallic elements introduced into a silicon substrate is small.
    Type: Grant
    Filed: December 7, 2001
    Date of Patent: March 23, 2004
    Assignee: Renesas Technology Corporation
    Inventors: Jiro Yugami, Natsuki Yokoyama, Toshiyuki Mine, Yasushi Goto
  • Publication number: 20030228725
    Abstract: A semiconductor device and a method for manufacturing the same of forming a silicon nitride film selectively without giving damages or contaminations to a surface of the silicon substrate thereby forming different types of gate dielectrics in one identical silicon substrate, are obtained by forming a silicon dioxide on the surface of a silicon substrate, then removing a portion thereof, forming a silicon nitride film to the surface of the substrate from which the silicon dioxide has been removed and, simultaneously, introducing nitrogen to the surface of the silicon dioxide which is left not being removed or, alternatively, depositing a silicon dioxide on the surface of the silicon substrate by chemical vapor deposition, then removing a portion thereof, forming a silicon nitride film on the surface of a substrate from which the silicon dioxide has been removed, and, simultaneously, introducing nitrogen to the surface of the silicon dioxide left not being removed, successively, dissolving and removing nitrogen
    Type: Application
    Filed: June 3, 2003
    Publication date: December 11, 2003
    Applicants: Hitachi, Ltd., Hitachi ULSI Systems Co., Ltd.
    Inventors: Shimpei Tsujikawa, Toshiyuki Mine, Jiro Yugami, Natsuki Yokoyama, Tsuyoshi Yamauchi
  • Patent number: 6656804
    Abstract: The present invention provides a MOS semiconductor device which enables gate leakage current reduction with a thinner gate dielectric film for higher speed, and a production method thereof. According to the present invention, a gate dielectric film 6 is made as follows: after forming a silicon nitride film 3 with a specified thickness, it is annealed in an oxidizing atmosphere to form silicon oxide 4 on the silicon nitride film 3, then this silicon oxide 4 is completely removed by exposure to a dissolving liquid. As a result, at depths between 0.12 nm and 0.5 nm from the top surface of the silicon nitride film 3 in the gate dielectric film 6 whose main constituent elements are silicon, nitrogen and oxygen, the nitrogen concentration is higher than the oxygen concentration. This enables the use of a thinner gate dielectric film with silicon, nitrogen and oxygen as main constituent elements while at the same time realizing reduction in leakage currents.
    Type: Grant
    Filed: June 29, 2001
    Date of Patent: December 2, 2003
    Assignee: Hitachi, Ltd.
    Inventors: Shimpei Tsujikawa, Jiro Yugami, Toshiyuki Mine, Masahiro Ushiyama
  • Publication number: 20030171005
    Abstract: Disclosed is a method of improving smoothness on a surface of a gate dielectric composed of a high dielectric film made of metal oxide. A dielectric film with a high permittivity made of metal oxide such as a TiO2 film or a ZrO2 film having an amorphous structure is deposited over a silicon substrate by the plasma enhanced chemical vapor deposition method, and the film is used as a gate dielectric. Since the gate dielectric has good surface smoothness, simultaneous reductions of both the film thickness of a gate dielectric and the gate leakage current can be achieved. In addition, it is also possible to reduce the variation in the characteristics of the devices.
    Type: Application
    Filed: December 18, 2002
    Publication date: September 11, 2003
    Inventors: Shimpei Tsujikawa, Toshiyuki Mine, Jiro Yugami, Hirotaka Hamamura