Patents by Inventor Jitendra Kumar
Jitendra Kumar has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20240411620Abstract: A method for providing an extensible architecture to facilitate automated event management is disclosed. The method includes receiving an indication that relates to an occurrence of a first event, the indication including event data; parsing the event data to generate event messages that correspond to the first event, each of the event messages relating to a structured data set that is accessible within a network environment; applying, by using the at least one event message, a rule and a corresponding trigger to accounts that are associated with the first event; initiating resolution actions for each of the accounts based on the rule and the corresponding trigger; and modifying a resolution indicator that is associated with each of the accounts based on results of the resolution actions.Type: ApplicationFiled: June 6, 2023Publication date: December 12, 2024Applicant: JPMorgan Chase Bank, N.A.Inventors: Rasik GOYAL, Sanjay DURGADIN, Raushon KUMAR, Elisabeth KOZACK, Zachary R. WARMAN, Tushar MISHRA, Selvakumar DHARMARAJ, Jitendra Kumar PANDEY, Mike FOREST, Umesh SAWANT, Kevin BOLAN, Dharani MANJUNATH, Diana L. CASTRO COOK
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Publication number: 20240396490Abstract: A coupling for use with a solar tracker including an upper portion and a lower portion, the upper portion including a generally tubular body including one or more stamped end portions and the lower portion designed to secure the upper portion to a support rail of a solar power system.Type: ApplicationFiled: May 20, 2024Publication date: November 28, 2024Inventors: Abhimanyu Anil Sable, Ashwajit Wahane, Jitendra Morankar, Phani Kumar, Raghavendra Praveen Maddulapalli, Venkata Nitin Mythreya Yadlapalli
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Publication number: 20240392836Abstract: Coupling assemblies for use with solar trackers include a housing, a bearing, and at least one hard stop. The housing includes a circular aperture and protruding members extending from the housing. The bearing fits within the circular aperture and rotate within the circular aperture of the housing. The bearing includes an aperture having the shape of the cross-section of a torque tube. The hard stop engages with the protruding members to limit rotation of the bearing and torque tube to a preconfigured articulation range. The housing may include opposing ball bearing paths disposed along an inner surface of the circular aperture, and hard stops at end portions of the opposing ball bearing paths. The bearing may include ball bearing races in an outer portion of the bearing. The coupling assembly may include ball bearings configured to move in the ball bearing paths and the ball bearing races.Type: ApplicationFiled: May 21, 2024Publication date: November 28, 2024Inventors: Abhimanyu Anil Sable, Alexander W. AU, Ashwajit Wahane, Jitendra Morankar, Phani Kumar, Raghavendra Praveen Maddulapalli, Ricardo Delgado-Nanez
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Patent number: 12155972Abstract: Methods and systems for resolving one or more faults in a security camera include installing an Auto-Executable Function (AEF) on the security camera. The AEF causes the controller to backup the set of user defined configuration settings to a memory of the security camera, reset the security camera back to the set of default configuration settings, reboot the security camera, and restore the set of user defined configuration settings. In many cases, this will resolve many unresolved faults within video camera and place the video camera back online. When this does not resolve a fault, the AEF creates a diagnostic report, wirelessly transmits the diagnostic report to a mobile device of a user, the mobile device identifies a software patch for resolving the fault, and the software patch is uploaded and installed on the security camera.Type: GrantFiled: August 4, 2022Date of Patent: November 26, 2024Assignee: HONEYWELL INTERNATIONAL INC.Inventors: Jitendra S. Chaurasia, Mourian Balasubramanian, Amit Kumar Grewal
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Publication number: 20240388246Abstract: An autonomous cleaning system bridge includes a pair of parallel beams and a pair of transverse beam assemblies interposed between the pair of parallel beams and disposed in spaced relation to one another. Each transverse beam assembly includes an outer tube extending between a first end portion coupled to a first parallel beam and an opposite, second end portion, an insert coupled to the second end portion and defining a through-bore, and an inner tube extending between a first end portion and an opposite, second end portion, the second end portion of the inner tube coupled to a second parallel beam, wherein the inner tube is slidably supported within the through-bore to enable to autonomous cleaning system bridge to transition from a first, expanded configuration to a second, collapsed configuration due to contact between the second parallel beam and a portion of a solar tracker system.Type: ApplicationFiled: May 15, 2024Publication date: November 21, 2024Inventors: Abhimanyu Anil Sable, Ashwajit Wahane, Jitendra Morankar, Phani Kumar
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Publication number: 20240388243Abstract: A solar tracker system including at least two solar trackers arranged substantially in parallel, each solar tracker including a torque tube and a plurality of piers supporting the torque tube, a drive mechanism mounted on one of the plurality of piers associated with a first of the at least two solar trackers to rotate the first of the at least two solar trackers, a pulley mounted on each torque tube of the at least two solar trackers, and a cable connecting the pulley of the first of the at least two solar trackers to the pulley of a second of the at least two solar trackers, wherein rotation of the first of the at least two solar trackers is translated to the second of the at least two solar trackers via the cable.Type: ApplicationFiled: May 15, 2024Publication date: November 21, 2024Inventors: Raghavendra Praveen Maddulapalli, Abhimanyu Anil Sable, Ashwajit Wahane, Jitendra Morankar, Phani Kumar, Ricardo Delgado-Nanez, Venkata Nitin Mythreya Yadlapalli, Bhanu Rekha Bandhakavi
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Patent number: 12147344Abstract: Disclosed herein are methods, systems, and processes to provide coherency across disjoint caches in clustered environments. It is determined whether a data object is owned by an owner node, where the owner node is one of multiple nodes of a cluster. If the owner node for the data object is identified by the determining, a request is sent to the owner node for the data object. However, if the owner node for the data object is not identified by the determining, selects a node in the cluster is selected as the owner node, and the request for the data object is sent to the owner node.Type: GrantFiled: November 14, 2022Date of Patent: November 19, 2024Assignee: Veritas Technologies LLCInventors: Bhushan Jagtap, Mark Hemment, Anindya Banerjee, Ranjit Noronha, Jitendra Patidar, Kundan Kumar, Sneha Pawar
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Patent number: 12147586Abstract: An information handling system may include a processor, a data processing unit communicatively coupled to the processor, and a management controller communicatively coupled to the processor and the data processing unit and configured for out-of-band management of the information handling system. The management controller may further be configured to obtain a hardware inventory and capabilities of the data processing unit; based on the hardware inventory and capabilities, generate a firmware capsule for execution during a basic input/output system phase of the data processing unit to cause a secure erasure of contents of a memory of the data processing unit; and communicate the firmware capsule to the data processing unit during an operating system phase of the data processing unit and cause the data processing unit to reboot to its basic input/output system phase in order to execute drivers of the firmware capsule in order to securely erase the memory.Type: GrantFiled: April 6, 2022Date of Patent: November 19, 2024Assignee: Dell Products L.P.Inventors: Deepaganesh Paulraj, Aniruddha Herekar, Sriparna Som, Jitendra Kumar Rath
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Publication number: 20240352014Abstract: The present disclosure encompasses solid state forms of Vericiguat, in embodiments crystalline polymorphs of Vericiguat, processes for preparation thereof, and pharmaceutical compositions thereof.Type: ApplicationFiled: August 31, 2022Publication date: October 24, 2024Inventors: Luna Ben-Sahel Katsav, Jenny Goldshtein, Limor Adani, Abed Masarwa, Anantha Rajmohan Muthusamy, Meenakshi Sundaram Somasundaram, Siva Rama Krishna Muppalla, Anand Kumar Pandey, Jitendra Kamalakar Sonar, Sumit Kumar
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Patent number: 12119387Abstract: Low resistance approaches for fabricating contacts, and semiconductor structures having low resistance metal contacts, are described. In an example, an integrated circuit structure includes a semiconductor structure above a substrate. A gate electrode is over the semiconductor structure, the gate electrode defining a channel region in the semiconductor structure. A first semiconductor source or drain structure is at a first end of the channel region at a first side of the gate electrode. A second semiconductor source or drain structure is at a second end of the channel region at a second side of the gate electrode, the second end opposite the first end. A source or drain contact is directly on the first or second semiconductor source or drain structure, the source or drain contact including a barrier layer and an inner conductive structure.Type: GrantFiled: September 25, 2020Date of Patent: October 15, 2024Assignee: Intel CorporationInventors: Gilbert Dewey, Nazila Haratipour, Siddharth Chouksey, Jack T. Kavalieros, Jitendra Kumar Jha, Matthew V. Metz, Mengcheng Lu, Anand S. Murthy, Koustav Ganguly, Ryan Keech, Glenn A. Glass, Arnab Sen Gupta
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Publication number: 20240332392Abstract: Approaches for fabricating an integrated circuit structure including a titanium silicide material, and the resulting structures, are described. In an example, an integrated circuit structure includes a semiconductor fin above a substrate, a gate electrode over the top and adjacent to the sidewalls of a portion of the semiconductor fin. A titanium silicide material is in direct contact with each of first and second epitaxial semiconductor source or drain structures at first and second sides of the gate electrode. The titanium silicide material is conformal with and hermetically sealing a non-flat topography of each of the first and second epitaxial semiconductor source or drain structures. The titanium silicide material has a total atomic composition including 95% or greater stoichiometric TiSi2.Type: ApplicationFiled: June 7, 2024Publication date: October 3, 2024Inventors: Dan S. LAVRIC, Glenn A. GLASS, Thomas T. TROEGER, Suresh VISHWANATH, Jitendra Kumar JHA, John F. RICHARDS, Anand S. MURTHY, Srijit MUKHERJEE
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Patent number: 12081407Abstract: Systems and methods are provided for planning a future network topology with associated configuration settings of existing nodes in a network and enacting changes to the configuration settings after the network has been physically changed to the planned future topology. The method can include, in response to receiving a topology plan to change a network from an initial network topology to a future network topology, determine a configuration plan to change configuration settings of one or more existing Network Elements (NEs) deployed in the network in order to transition the network from the initial network topology to the future network topology, and, in response to discovering that the network has been physically changed to match the future network topology, automatically enact the configuration plan to change the configuration settings of the one or more existing NEs.Type: GrantFiled: March 25, 2022Date of Patent: September 3, 2024Assignee: Ciena CorporationInventors: Dale Frederick Zacharias, Jitendra Kumar Yadav
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Patent number: 12046654Abstract: Approaches for fabricating an integrated circuit structure including a titanium silicide material, and the resulting structures, are described. In an example, an integrated circuit structure includes a semiconductor fin above a substrate, a gate electrode over the top and adjacent to the sidewalls of a portion of the semiconductor fin. A titanium silicide material is in direct contact with each of first and second epitaxial semiconductor source or drain structures at first and second sides of the gate electrode. The titanium silicide material is conformal with and hermetically sealing a non-flat topography of each of the first and second epitaxial semiconductor source or drain structures. The titanium silicide material has a total atomic composition including 95% or greater stoichiometric TiSi2.Type: GrantFiled: June 25, 2020Date of Patent: July 23, 2024Assignee: Intel CorporationInventors: Dan S. Lavric, Glenn A. Glass, Thomas T. Troeger, Suresh Vishwanath, Jitendra Kumar Jha, John F. Richards, Anand S. Murthy, Srijit Mukherjee
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Publication number: 20240244496Abstract: This document discloses a solution for managing multiple subscriber identifiers in a network node. According to an aspect, a method for a first network node comprises: storing at least two subscriber identifiers; triggering a handover procedure for a first subscriber identifier of the at least two subscriber identifiers; and transmitting, during the handover procedure, a handover message to a second network node, the second network node managing a target cell for the handover procedure, wherein the handover message comprises at least a second subscriber identifier of the at least two subscriber identifiers.Type: ApplicationFiled: June 17, 2021Publication date: July 18, 2024Inventors: Kishore KRISHNE GOWDA, Nandagopal PEETHAMBARAN NAIR RAJALAKSHMI, Sharath RAVEENDRAN, Jitendra Kumar SAINI, Sambhram KANAVALLI, Nanda KUMAR, Frank FREDERIKSEN, Faranaz SABOURI-SICHANI
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Publication number: 20240232142Abstract: A method for processing data, comprising receiving a folder attached request at a virtual media service operating on a processor, creating a virtual image data file and lookup table in response to the folder attached request at the virtual media service, preparing content to be populated into a master boot record region in response to the folder attached request and generating a virtual USB device in response to the populated master boot record.Type: ApplicationFiled: October 21, 2022Publication date: July 11, 2024Applicant: DELL PRODUCTS L.P.Inventors: Jitendra Kumar, Rajeshkumar Ichchhubhai Patel, Lakshmi Satya Sai Sindhu Karri
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Publication number: 20240134829Abstract: A method for processing data, comprising receiving a folder attached request at a virtual media service operating on a processor, creating a virtual image data file and lookup table in response to the folder attached request at the virtual media service, preparing content to be populated into a master boot record region in response to the folder attached request and generating a virtual USB device in response to the populated master boot record.Type: ApplicationFiled: October 20, 2022Publication date: April 25, 2024Applicant: DELL PRODUCTS L.P.Inventors: Jitendra Kumar, Rajeshkumar Ichchhubhai Patel, Lakshmi Satya Sai Sindhu Karri
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Publication number: 20240105508Abstract: Disclosed herein are integrated circuit (IC) devices with contacts using nitridized molybdenum. For example, a contact arrangement for an IC device may include a semiconductor material and a contact extending into a portion of the semiconductor material. The contact may include molybdenum. The molybdenum may be in a first layer and a second layer, where the second layer may further include nitrogen. The first layer may have a thickness between about 5 nanometers and 16 nanometers, and the second layer may have a thickness between about 0.5 nanometers to 2.5 nanometers. The contact may further include a fill material (e.g., an electrically conductive material) and the second layer may be in contact with the fill material. The molybdenum may have a low resistance, and thus may improve the electrical performance of the contact. The nitridized molybdenum may prevent oxidation during the fabrication of the contact.Type: ApplicationFiled: September 27, 2022Publication date: March 28, 2024Applicant: Intel CorporationInventors: Jitendra Kumar Jha, Justin Mueller, Nazila Haratipour, Gilbert W. Dewey, Chi-Hing Choi, Jack T. Kavalieros, Siddharth Chouksey, Nancy Zelick, Jean-Philippe Turmaud, I-Cheng Tung, Blake Bluestein
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Publication number: 20240097186Abstract: An EB-PVD technique was used to fabricate ceramic/polymer/ceramic (LAGP/PE/LAGP) hybrid separator for rechargeable LIBs and Li batteries. The application of a ceramic electrolyte (LAGP) layer on traditional PE separator soaked in 1-M LiAsF6 liquid electrolyte combined the best attributes of traditional PE separator and solid inorganic electrolytes. The synergistic behavior of hybrid separator resulted in a high mechanical stability/flexibility, increased liquid uptake, high ion conduction, reduced cell voltage polarization, no lithium dendrite formation, and increased usable lithium content as compared to the state-of-the-art PE separator used in LIBs. The functional separator can be used to prolong life cycle and power capability of present LIBs. Thickness and density optimization of LAGP or similar electrolytes on polymer or other battery separators and their use in full Li battery (LIB, Li—S, Li—O2, Li-Ph, flow battery) cells are expected to further improve performance.Type: ApplicationFiled: April 14, 2023Publication date: March 21, 2024Inventors: Jitendra Kumar, Guru Subramanyam
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Publication number: 20240076008Abstract: A throttle control and safety switch device that serves the dual function of adjusting a throttle of an ATV (all-terrain vehicle) while turning off the engine in the event of failure of a throttle cable or if the throttle cable is stuck, is disclosed. The throttle control and safety switch device includes an operating lever connected to a pivot shaft for pivotal movement about an axis (A-A?). A first carrier connected to the pivot shaft includes a safety switch and a cable attachment portion to engage a throttle actuating cable. The safety switch transmits a cutoff signal to an electronic control unit (ECU) upon actuation by a plunger portion of a second carrier pivotally connected to the pivot shaft via fastener and connected to the first carrier via a dowel and slot arrangement.Type: ApplicationFiled: August 31, 2023Publication date: March 7, 2024Applicant: UNO Minda LimitedInventors: Tarun MALHOTRA, Shwetaank SHARMA, Jitendra Kumar SAINI
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Patent number: 11923290Abstract: Embodiments disclosed herein include semiconductor devices with source/drain interconnects that include a barrier layer. In an embodiment the semiconductor device comprises a source region and a drain region. In an embodiment, a semiconductor channel is between the source region and the drain region, and a gate electrode is over the semiconductor channel. In an embodiment, the semiconductor device further comprises interconnects to the source region and the drain region. In an embodiment, the interconnects comprise a barrier layer, a metal layer, and a fill metal.Type: GrantFiled: June 26, 2020Date of Patent: March 5, 2024Assignee: Intel CorporationInventors: Siddharth Chouksey, Gilbert Dewey, Nazila Haratipour, Mengcheng Lu, Jitendra Kumar Jha, Jack T. Kavalieros, Matthew V. Metz, Scott B Clendenning, Eric Charles Mattson