Patents by Inventor Jiun-Yun Li

Jiun-Yun Li has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20220309372
    Abstract: An electronic device includes a pair of depletion gates, an accumulation gate, and a conductive resonator. The depletion gates are spaced apart from each other. The accumulation gate is over the depletion gates. The conductive resonator is over the depletion gates and the accumulation gate. The conductive resonator includes a first portion, a second portion, and a third portion. The first portion and the second portion are on opposite sides of the accumulation gate. The third portion interconnects the first and second portions of the conductive resonator and across the depletion gates. A bottom surface of the first portion of the conductive resonator is lower than a bottom surface of the accumulation gate.
    Type: Application
    Filed: July 8, 2021
    Publication date: September 29, 2022
    Applicants: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD., NATIONAL TAIWAN UNIVERSITY
    Inventors: Jiun-Yun LI, Shih-Yuan CHEN, Yao-Chun CHANG, Ian HUANG, Chiung-Yu CHEN
  • Publication number: 20220199555
    Abstract: An electronic device includes a substrate, a transistor, and a ring resonator. The transistor is over the substrate. The ring resonator is over the substrate and includes a conductive loop and an impedance matching element. The conductive loop overlaps with the transistor. The impedance matching element is on the conductive loop and electrically isolated from the transistor.
    Type: Application
    Filed: March 9, 2022
    Publication date: June 23, 2022
    Applicants: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD., NATIONAL TAIWAN UNIVERSITY
    Inventors: Shih-Yuan CHEN, Jiun-Yun LI, Rui-Fu XU, Chiung-Yu CHEN, Ting-I YEH, Yu-Jui WU, Yao-Chun CHANG
  • Publication number: 20220123110
    Abstract: The current disclosure describes a new vertical tunnel field-effect transistor (TFET). The TFET includes a source layer over a substrate. A first channel layer is formed over the source layer. A drain layer is stacked over the first channel layer with a second channel layer stacked therebetween. The drain layer and the second channel layer overlap a first surface portion of the first channel layer. A gate structure is positioned over the channel layer by a second surface portion of the channel layer and contacts a sidewall of the second channel layer.
    Type: Application
    Filed: December 29, 2021
    Publication date: April 21, 2022
    Inventors: Jiun-Yun Li, Pao-chuan Shih, Wei-Chih Hou
  • Patent number: 11276653
    Abstract: An electronic device includes a substrate, a transistor, and a ring resonator. The transistor is over the substrate. The transistor is configured to generate a quantum dot. The ring resonator is over the substrate and includes a conductive loop and an impedance matching element. The conductive loop overlaps with the transistor. The impedance matching element is on the conductive loop and is configured to determine a resonance frequency of the ring resonator.
    Type: Grant
    Filed: October 17, 2019
    Date of Patent: March 15, 2022
    Assignees: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD., NATIONAL TAIWAN UNIVERSITY
    Inventors: Shih-Yuan Chen, Jiun-Yun Li, Rui-Fu Xu, Chiung-Yu Chen, Ting-I Yeh, Yu-Jui Wu, Yao-Chun Chang
  • Patent number: 11245011
    Abstract: The current disclosure describes a new vertical tunnel field-effect transistor (TFET). The TFET includes a source layer over a substrate. A first channel layer is formed over the source layer. A drain layer is stacked over the first channel layer with a second channel layer stacked therebetween. The drain layer and the second channel layer overlap a first surface portion of the first channel layer. A gate structure is positioned over the channel layer by a second surface portion of the channel layer and contacts a sidewall of the second channel layer.
    Type: Grant
    Filed: September 25, 2018
    Date of Patent: February 8, 2022
    Assignees: Taiwan Semiconductor Manufacturing Co., Ltd., National Taiwan University
    Inventors: Jiun-Yun Li, Pao-Chuan Shih, Wei-Chih Hou
  • Publication number: 20210118826
    Abstract: An electronic device includes a substrate, a transistor, and a ring resonator. The transistor is over the substrate. The transistor is configured to generate a quantum dot. The ring resonator is over the substrate and includes a conductive loop and an impedance matching element. The conductive loop overlaps with the transistor. The impedance matching element is on the conductive loop and is configured to determine a resonance frequency of the ring resonator.
    Type: Application
    Filed: October 17, 2019
    Publication date: April 22, 2021
    Applicants: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD., NATIONAL TAIWAN UNIVERSITY
    Inventors: Shih-Yuan CHEN, Jiun-Yun LI, Rui-Fu XU, Chiung-Yu CHEN, Ting-I YEH, Yu-Jui WU, Yao-Chun CHANG
  • Publication number: 20200098867
    Abstract: The current disclosure describes a new vertical tunnel field-effect transistor (TFET). The TFET includes a source layer over a substrate. A first channel layer is formed over the source layer. A drain layer is stacked over the first channel layer with a second channel layer stacked therebetween. The drain layer and the second channel layer overlap a first surface portion of the first channel layer. A gate structure is positioned over the channel layer by a second surface portion of the channel layer and contacts a sidewall of the second channel layer.
    Type: Application
    Filed: September 25, 2018
    Publication date: March 26, 2020
    Inventors: Jiun-Yun Li, Pao-Chuan Shih, Wei-Chih Hou
  • Patent number: 9972746
    Abstract: A substrate with a lithium imide layer, a LED with a lithium imide layer and a manufacturing method of the LED are provided. The substrate includes a lithium niobate layer and a lithium imide layer. The lithium imide layer is formed on a surface of the lithium niobate layer.
    Type: Grant
    Filed: February 2, 2017
    Date of Patent: May 15, 2018
    Assignee: OPTO TECH CORPORATION
    Inventors: Lung-Han Peng, Jiun-Yun Li, Jun-Wei Peng, Po-Yuan Chiu
  • Publication number: 20180062024
    Abstract: A substrate with a lithium imide layer, a LED with a lithium imide layer and a manufacturing method of the LED are provided. The substrate includes a lithium niobate layer and a lithium imide layer. The lithium imide layer is formed on a surface of the lithium niobate layer.
    Type: Application
    Filed: February 2, 2017
    Publication date: March 1, 2018
    Inventors: LUNG-HAN PENG, JIUN-YUN LI, JUN-WEI PENG, PO-YUAN CHIU
  • Patent number: 9786842
    Abstract: A single memory cell has the functions of a storage element and a selector. The memory cell includes a P-type layer, a tunneling structure and an N-type layer. The tunneling structure is formed on the P-type layer. The N-type layer is formed on the tunneling structure. The tunneling structure is a stack structure including a first material layer, a second material layer and a third material layer. By adjusting a bias voltage that is applied to the P-type layer and the N-type layer, the tunneling structure is controlled to be in the amorphous state or the crystalline state. Consequently, the memory cell has the memorizing and storing functions. The memory cell has the P-type layer, the tunneling structure and the N-type layer. By adjusting the bias voltage, the function of the selector is achieved.
    Type: Grant
    Filed: September 30, 2016
    Date of Patent: October 10, 2017
    Assignee: OPTO TECH CORPORATION
    Inventors: Ming-Yi Yan, Jhih-You Lu, Hsien-Chih Huang, Yun-Shiuan Li, Jiun-Yun Li, I-Chun Cheng, Chih-Ming Lai, Yue-Lin Huang, Lung-Han Peng