Patents by Inventor Jiun-Yun Li
Jiun-Yun Li has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20250072299Abstract: An electronic device includes a substrate, a hyperbolic magnet, a pair of depletion gates, a pair of barrier gates and a accumulation gate. The hyperbolic magnet is over the substrate and has a first magnet portion and a second magnet portion separated from each other. The first magnet portion and the second magnet portion have a first convex surface and a second convex surface facing the first convex surface, respectively. The depletion gates are separated from each other and between the first convex surface and the second convex surface over the substrate. The barrier gates are between the depletion gates. The accumulation gate is over the depletion gates and between the barrier gates.Type: ApplicationFiled: August 24, 2023Publication date: February 27, 2025Applicants: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD., NATIONAL TAIWAN UNIVERSITYInventors: Che-Hao CHANG, Jiun-Yun LI, Yu-Cheng LI, Yu-Jul WU
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Patent number: 12237376Abstract: The current disclosure describes a new vertical tunnel field-effect transistor (TFET). The TFET includes a source layer over a substrate. A first channel layer is formed over the source layer. A drain layer is stacked over the first channel layer with a second channel layer stacked therebetween. The drain layer and the second channel layer overlap a first surface portion of the first channel layer. A gate structure is positioned over the channel layer by a second surface portion of the channel layer and contacts a sidewall of the second channel layer.Type: GrantFiled: December 29, 2021Date of Patent: February 25, 2025Assignees: Taiwan Semiconductor Manufacturing Co., Ltd., National Taiwan UniversityInventors: Jiun-Yun Li, Pao-chuan Shih, Wei-Chih Hou
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Publication number: 20240395735Abstract: An electronic device includes a substrate, a transistor, and a ring resonator. The transistor is over the substrate. The ring resonator is over the substrate and overlaps with the transistor. The ring resonator includes a conductive loop and an impedance matching element. The conductive loop includes a loop portion having two first parts and a second part and two feeding lines. Each of the first parts of the loop portion is between the second part of the loop portion and one of the feeding lines, and a tunnel barrier of the transistor is closer to the second part than to the feeding lines. The impedance matching element is closer to the feeding lines than to the second part.Type: ApplicationFiled: July 31, 2024Publication date: November 28, 2024Applicants: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD., NATIONAL TAIWAN UNIVERSITYInventors: Shih-Yuan CHEN, Jiun-Yun LI, Rui-Fu XU, Chiung-Yu CHEN, Ting-I YEH, Yu-Jui WU, Yao-Chun CHANG
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Publication number: 20240339547Abstract: A flash memory device includes a substrate, a semiconductor quantum well layer, a semiconductor spacer, a semiconductor channel layer, a gate structure, and source/drain regions. The semiconductor quantum well layer is formed of a first semiconductor material and is disposed over the substrate. The semiconductor spacer is formed of a second semiconductor material and is disposed over the first semiconductor channel layer. The semiconductor channel layer is formed of the first semiconductor material and is disposed over the semiconductor spacer. Thea gate structure is over the second semiconductor channel layer. The source/drain regions are over the substrate and are on opposite sides of the gate structure.Type: ApplicationFiled: June 13, 2024Publication date: October 10, 2024Applicants: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD., NATIONAL TAIWAN UNIVERSITYInventors: Jiun-Yun LI, Nai-Wen HSU, Wei-Chih HOU, Yu-Jui WU, Yen CHUANG, Chia-Yu LIU
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Patent number: 12051756Abstract: A flash memory device includes a substrate, a semiconductor quantum well layer, a semiconductor spacer, a semiconductor channel layer, a gate structure, and source/drain regions. The semiconductor quantum well layer is formed of a first semiconductor material and is disposed over the substrate. The semiconductor spacer is formed of a second semiconductor material and is disposed over the first semiconductor channel layer. The semiconductor channel layer is formed of the first semiconductor material and is disposed over the semiconductor spacer. Thea gate structure is over the second semiconductor channel layer. The source/drain regions are over the substrate and are on opposite sides of the gate structure.Type: GrantFiled: January 13, 2022Date of Patent: July 30, 2024Assignees: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD., NATIONAL TAIWAN UNIVERSITYInventors: Jiun-Yun Li, Nai-Wen Hsu, Wei-Chih Hou, Yu-Jui Wu, Yen Chuang, Chia-Yu Liu
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Publication number: 20240185105Abstract: An electronic device includes a pair of depletion gates, an accumulation gate, and a conductive resonator. The depletion gates are spaced apart from each other. The accumulation gate is over the depletion gates. The conductive resonator is over the depletion gates and the accumulation gate. The conductive resonator includes a first portion, a second portion, and a third portion. The first portion and the second portion are on opposite sides of the accumulation gate. The third portion interconnects the first and second portions of the conductive resonator and across the depletion gates. A bottom surface of the first portion of the conductive resonator is lower than a bottom surface of the accumulation gate.Type: ApplicationFiled: February 16, 2024Publication date: June 6, 2024Applicants: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD., NATIONAL TAIWAN UNIVERSITYInventors: Jiun-Yun LI, Shih-Yuan CHEN, Yao-Chun CHANG, Ian HUANG, Chiung-Yu CHEN
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Patent number: 11934916Abstract: An electronic device includes a pair of depletion gates, an accumulation gate, and a conductive resonator. The depletion gates are spaced apart from each other. The accumulation gate is over the depletion gates. The conductive resonator is over the depletion gates and the accumulation gate. The conductive resonator includes a first portion, a second portion, and a third portion. The first portion and the second portion are on opposite sides of the accumulation gate. The third portion interconnects the first and second portions of the conductive resonator and across the depletion gates. A bottom surface of the first portion of the conductive resonator is lower than a bottom surface of the accumulation gate.Type: GrantFiled: July 8, 2021Date of Patent: March 19, 2024Assignees: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD., NATIONAL TAIWAN UNIVERSITYInventors: Jiun-Yun Li, Shih-Yuan Chen, Yao-Chun Chang, Ian Huang, Chiung-Yu Chen
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Publication number: 20240021547Abstract: An electronic device includes a substrate, a transistor, and a ring resonator. The transistor is over the substrate. The ring resonator is over the substrate and overlaps with the transistor. The ring resonator includes a conductive loop and an impedance matching element. The conductive loop includes a loop portion having two first parts and a second part and two feeding lines. Each of the first parts of the loop portion is between the second part of the loop portion and one of the feeding lines, and a tunnel barrier of the transistor is closer to the second part than to the feeding lines. The impedance matching element is closer to the feeding lines than to the second part.Type: ApplicationFiled: September 27, 2023Publication date: January 18, 2024Applicants: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD., NATIONAL TAIWAN UNIVERSITYInventors: Shih-Yuan CHEN, Jiun-Yun LI, Rui-Fu XU, Chiung-Yu CHEN, Ting-I YEH, Yu-Jui WU, Yao-Chun CHANG
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Publication number: 20230020015Abstract: A flash memory device includes a substrate, a semiconductor quantum well layer, a semiconductor spacer, a semiconductor channel layer, a gate structure, and source/drain regions. The semiconductor quantum well layer is formed of a first semiconductor material and is disposed over the substrate. The semiconductor spacer is formed of a second semiconductor material and is disposed over the first semiconductor channel layer. The semiconductor channel layer is formed of the first semiconductor material and is disposed over the semiconductor spacer. Thea gate structure is over the second semiconductor channel layer. The source/drain regions are over the substrate and are on opposite sides of the gate structure.Type: ApplicationFiled: January 13, 2022Publication date: January 19, 2023Applicants: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD., NATIONAL TAIWAN UNIVERSITYInventors: Jiun-Yun LI, Nai-Wen HSU, Wei-Chih HOU, Yu-Jui WU, Yen CHUANG, Chia-Yu LIU
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Publication number: 20220309372Abstract: An electronic device includes a pair of depletion gates, an accumulation gate, and a conductive resonator. The depletion gates are spaced apart from each other. The accumulation gate is over the depletion gates. The conductive resonator is over the depletion gates and the accumulation gate. The conductive resonator includes a first portion, a second portion, and a third portion. The first portion and the second portion are on opposite sides of the accumulation gate. The third portion interconnects the first and second portions of the conductive resonator and across the depletion gates. A bottom surface of the first portion of the conductive resonator is lower than a bottom surface of the accumulation gate.Type: ApplicationFiled: July 8, 2021Publication date: September 29, 2022Applicants: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD., NATIONAL TAIWAN UNIVERSITYInventors: Jiun-Yun LI, Shih-Yuan CHEN, Yao-Chun CHANG, Ian HUANG, Chiung-Yu CHEN
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Publication number: 20220199555Abstract: An electronic device includes a substrate, a transistor, and a ring resonator. The transistor is over the substrate. The ring resonator is over the substrate and includes a conductive loop and an impedance matching element. The conductive loop overlaps with the transistor. The impedance matching element is on the conductive loop and electrically isolated from the transistor.Type: ApplicationFiled: March 9, 2022Publication date: June 23, 2022Applicants: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD., NATIONAL TAIWAN UNIVERSITYInventors: Shih-Yuan CHEN, Jiun-Yun LI, Rui-Fu XU, Chiung-Yu CHEN, Ting-I YEH, Yu-Jui WU, Yao-Chun CHANG
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Publication number: 20220123110Abstract: The current disclosure describes a new vertical tunnel field-effect transistor (TFET). The TFET includes a source layer over a substrate. A first channel layer is formed over the source layer. A drain layer is stacked over the first channel layer with a second channel layer stacked therebetween. The drain layer and the second channel layer overlap a first surface portion of the first channel layer. A gate structure is positioned over the channel layer by a second surface portion of the channel layer and contacts a sidewall of the second channel layer.Type: ApplicationFiled: December 29, 2021Publication date: April 21, 2022Inventors: Jiun-Yun Li, Pao-chuan Shih, Wei-Chih Hou
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Patent number: 11276653Abstract: An electronic device includes a substrate, a transistor, and a ring resonator. The transistor is over the substrate. The transistor is configured to generate a quantum dot. The ring resonator is over the substrate and includes a conductive loop and an impedance matching element. The conductive loop overlaps with the transistor. The impedance matching element is on the conductive loop and is configured to determine a resonance frequency of the ring resonator.Type: GrantFiled: October 17, 2019Date of Patent: March 15, 2022Assignees: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD., NATIONAL TAIWAN UNIVERSITYInventors: Shih-Yuan Chen, Jiun-Yun Li, Rui-Fu Xu, Chiung-Yu Chen, Ting-I Yeh, Yu-Jui Wu, Yao-Chun Chang
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Patent number: 11245011Abstract: The current disclosure describes a new vertical tunnel field-effect transistor (TFET). The TFET includes a source layer over a substrate. A first channel layer is formed over the source layer. A drain layer is stacked over the first channel layer with a second channel layer stacked therebetween. The drain layer and the second channel layer overlap a first surface portion of the first channel layer. A gate structure is positioned over the channel layer by a second surface portion of the channel layer and contacts a sidewall of the second channel layer.Type: GrantFiled: September 25, 2018Date of Patent: February 8, 2022Assignees: Taiwan Semiconductor Manufacturing Co., Ltd., National Taiwan UniversityInventors: Jiun-Yun Li, Pao-Chuan Shih, Wei-Chih Hou
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Publication number: 20210118826Abstract: An electronic device includes a substrate, a transistor, and a ring resonator. The transistor is over the substrate. The transistor is configured to generate a quantum dot. The ring resonator is over the substrate and includes a conductive loop and an impedance matching element. The conductive loop overlaps with the transistor. The impedance matching element is on the conductive loop and is configured to determine a resonance frequency of the ring resonator.Type: ApplicationFiled: October 17, 2019Publication date: April 22, 2021Applicants: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD., NATIONAL TAIWAN UNIVERSITYInventors: Shih-Yuan CHEN, Jiun-Yun LI, Rui-Fu XU, Chiung-Yu CHEN, Ting-I YEH, Yu-Jui WU, Yao-Chun CHANG
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Publication number: 20200098867Abstract: The current disclosure describes a new vertical tunnel field-effect transistor (TFET). The TFET includes a source layer over a substrate. A first channel layer is formed over the source layer. A drain layer is stacked over the first channel layer with a second channel layer stacked therebetween. The drain layer and the second channel layer overlap a first surface portion of the first channel layer. A gate structure is positioned over the channel layer by a second surface portion of the channel layer and contacts a sidewall of the second channel layer.Type: ApplicationFiled: September 25, 2018Publication date: March 26, 2020Inventors: Jiun-Yun Li, Pao-Chuan Shih, Wei-Chih Hou
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Patent number: 9972746Abstract: A substrate with a lithium imide layer, a LED with a lithium imide layer and a manufacturing method of the LED are provided. The substrate includes a lithium niobate layer and a lithium imide layer. The lithium imide layer is formed on a surface of the lithium niobate layer.Type: GrantFiled: February 2, 2017Date of Patent: May 15, 2018Assignee: OPTO TECH CORPORATIONInventors: Lung-Han Peng, Jiun-Yun Li, Jun-Wei Peng, Po-Yuan Chiu
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Publication number: 20180062024Abstract: A substrate with a lithium imide layer, a LED with a lithium imide layer and a manufacturing method of the LED are provided. The substrate includes a lithium niobate layer and a lithium imide layer. The lithium imide layer is formed on a surface of the lithium niobate layer.Type: ApplicationFiled: February 2, 2017Publication date: March 1, 2018Inventors: LUNG-HAN PENG, JIUN-YUN LI, JUN-WEI PENG, PO-YUAN CHIU
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Patent number: 9786842Abstract: A single memory cell has the functions of a storage element and a selector. The memory cell includes a P-type layer, a tunneling structure and an N-type layer. The tunneling structure is formed on the P-type layer. The N-type layer is formed on the tunneling structure. The tunneling structure is a stack structure including a first material layer, a second material layer and a third material layer. By adjusting a bias voltage that is applied to the P-type layer and the N-type layer, the tunneling structure is controlled to be in the amorphous state or the crystalline state. Consequently, the memory cell has the memorizing and storing functions. The memory cell has the P-type layer, the tunneling structure and the N-type layer. By adjusting the bias voltage, the function of the selector is achieved.Type: GrantFiled: September 30, 2016Date of Patent: October 10, 2017Assignee: OPTO TECH CORPORATIONInventors: Ming-Yi Yan, Jhih-You Lu, Hsien-Chih Huang, Yun-Shiuan Li, Jiun-Yun Li, I-Chun Cheng, Chih-Ming Lai, Yue-Lin Huang, Lung-Han Peng