Patents by Inventor Jiutao Li

Jiutao Li has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 6730547
    Abstract: Methods of forming metal-doped chalcogenide layers and devices containing such doped chalcogenide layers include using a plasma to induce diffusion of metal into a chalcogenide layer concurrently with metal deposition. The plasma contains at least one noble gas of low atomic weight, such as neon or helium. The plasma has a sputter yield sufficient to sputter a metal target and a UV component of its emitted spectrum sufficient to induce diffusion of the sputtered metal into the chalcogenide layer. Using such methods, a conductive layer can be formed on the doped chalcogenide layer in situ. In integrated circuit devices, such as non-volatile chalcogenide memory devices, doping of the chalcogenide layer concurrently with metal deposition and formation of a conductive layer in situ with the doping of the chalcogenide layer reduces contamination concerns and physical damage resulting from moving the device substrate from tool to tool, thus facilitating improved device reliability.
    Type: Grant
    Filed: November 1, 2002
    Date of Patent: May 4, 2004
    Assignee: Micron Technology, Inc.
    Inventors: Jiutao Li, Allen McTeer
  • Patent number: 6709958
    Abstract: Methods of forming metal-doped chalcogenide layers and devices containing such doped chalcogenide layers include using a plasma to induce diffusion of metal into a chalcogenide layer concurrently with metal deposition. The plasma contains at least one noble gas of low atomic weight, such as neon or helium. The plasma has a sputter yield sufficient to sputter a metal target and a UV component of its emitted spectrum sufficient to induce diffusion of the sputtered metal into the chalcogenide layer. Using such methods, a conductive layer can be formed on the doped chalcogenide layer in situ. In integrated circuit devices, such as non-volatile chalcogenide memory devices, doping of the chalcogenide layer concurrently with metal deposition and formation of a conductive layer in situ with the doping of the chalcogenide layer reduces contamination concerns and physical damage resulting from moving the device substrate from tool to tool, thus facilitating improved device reliability.
    Type: Grant
    Filed: August 30, 2001
    Date of Patent: March 23, 2004
    Assignee: Micron Technology, Inc.
    Inventors: Jiutao Li, Allen McTeer
  • Publication number: 20040043553
    Abstract: A method of forming a programmable conductor memory cell array is disclosed wherein metal and chalcogenide glass are co-sputtered to fill an array of cell vias in a prepared substrate. The prepared substrate is heated above room temperature before the metal and chalcogenide glass film is deposited, and the heating is maintained throughout the deposition. The resulting metal/chalcogenide glass film has good homogeneity, a desired ratio of components, and has a regular surface.
    Type: Application
    Filed: August 29, 2003
    Publication date: March 4, 2004
    Inventors: Jiutao Li, Allen McTeer
  • Publication number: 20040040837
    Abstract: A method of fabricating a glass containing target for sputter deposition of a glass onto a substrate. The method includes synthesizing a glass from pure chemical element materials and then forming the synthesized glass into a powder, which is then used to form a glass containing target. In accordance with one aspect of the invention, the glass containing target may be used for sputter deposition of a thin coating of glass on a substrate. In exemplary embodiments, the glass is a chalcogenide glass target useful in fabricating memory devices.
    Type: Application
    Filed: August 29, 2002
    Publication date: March 4, 2004
    Inventors: Allen McTeer, Jiutao Li, Terry L. Gilton
  • Publication number: 20040040835
    Abstract: A method of sputter depositing silver selenide and controlling the stoichiometry and nodular defect formations of a sputter deposited silver-selenide film. The method includes depositing silver-selenide using a sputter deposition process at a pressure of about 0.3 mTorr to about 10 mTorr. In accordance with one aspect of the invention, an RF sputter deposition process may be used preferably at pressures of about 2 mTorr to about 3 mTorr. In accordance with another aspect of the invention, a pulse DC sputter deposition process may be used preferably at pressures of about 4 mTorr to about 5 mTorr.
    Type: Application
    Filed: August 29, 2002
    Publication date: March 4, 2004
    Inventors: Jiutao Li, Keith Hampton, Allen McTeer
  • Publication number: 20030228771
    Abstract: A method of forming a programmable conductor memory cell array is disclosed wherein metal and chalcogenide glass are co-sputtered to fill an array of cell vias in a prepared substrate. The prepared substrate is heated above room temperature before the metal and chalcogenide glass film is deposited, and the heating is maintained throughout the deposition. The resulting metal/chalcogenide glass film has good homogeneity, a desired ratio of components, and has a regular surface.
    Type: Application
    Filed: June 6, 2002
    Publication date: December 11, 2003
    Inventors: Jiutao Li, Allen McTeer
  • Publication number: 20030228717
    Abstract: The present invention is related to methods and apparatus that allow a chalcogenide glass such as germanium selenide (GeXSe1-X) to be doped with a metal such as silver, copper, or zinc without utilizing an ultraviolet (UV) photodoping step to dope the chalcogenide glass with the metal. The chalcogenide glass doped with the metal can be used to store data in a memory device. Advantageously, the systems and methods co-sputter the metal and the chalcogenide glass and allow for relatively precise and efficient control of a constituent ratio between the doping metal and the chalcogenide glass. Further advantageously, the systems and methods enable the doping of the chalcogenide glass with a relatively high degree of uniformity over the depth of the formed layer of chalcogenide glass and the metal. Also, the systems and methods allow a metal concentration to be varied in a controlled manner along the thin film depth.
    Type: Application
    Filed: June 6, 2002
    Publication date: December 11, 2003
    Inventors: Jiutao Li, Allen McTeer, Gregory Herdt, Trung T. Doan
  • Patent number: 6660136
    Abstract: The invention includes methods of forming a non-volatile resistance variable device and methods of forming a metal layer comprising silver and tungsten. A method of forming a non-volatile resistance variable device includes forming a chalcogenide material over a semiconductor substrate. First and second electrodes are formed operably proximate the chalcogenide material. At least one of the first and second electrodes includes a metal layer having silver and tungsten. The metal layer is formed by providing the substrate within a sputter deposition chamber. One or more target(s) is/are provided within the chamber which include(s) at least tungsten and silver. The one or more target(s) is/are sputtered using a sputtering gas comprising at least one of Xe, Kr and Rn under conditions effective to deposit the metal layer onto the substrate. The metal layer can be fabricated independent of fabrication of a non-volatile resistance variable device.
    Type: Grant
    Filed: March 27, 2002
    Date of Patent: December 9, 2003
    Assignee: Micron Technology, Inc.
    Inventors: Jiutao Li, Shane P. Leiphart
  • Publication number: 20030186504
    Abstract: Methods of forming metal-doped chalcogenide layers and devices containing such doped chalcogenide layers include using a plasma to induce diffusion of metal into a chalcogenide layer concurrently with metal deposition. The plasma contains at least one noble gas of low atomic weight, such as neon or helium. The plasma has a sputter yield sufficient to sputter a metal target and a UV component of its emitted spectrum sufficient to induce diffusion of the sputtered metal into the chalcogenide layer. Using such methods, a conductive layer can be formed on the doped chalcogenide layer in situ. In integrated circuit devices, such as non-volatile chalcogenide memory devices, doping of the chalcogenide layer concurrently with metal deposition and formation of a conductive layer in situ with the doping of the chalcogenide layer reduces contamination concerns and physical damage resulting from moving the device substrate from tool to tool, thus facilitating improved device reliability.
    Type: Application
    Filed: August 30, 2001
    Publication date: October 2, 2003
    Inventors: Jiutao Li, Allen McTeer
  • Publication number: 20030183507
    Abstract: The invention includes methods of forming a non-volatile resistance variable device and methods of forming a metal layer comprising silver and tungsten. A method of forming a non-volatile resistance variable device includes forming a chalcogenide material over a semiconductor substrate. First and second electrodes are formed operably proximate the chalcogenide material. At least one of the first and second electrodes includes a metal layer having silver and tungsten. The metal layer is formed by providing the substrate within a sputter deposition chamber. One or more target(s) is/are provided within the chamber which include(s) at least tungsten and silver. The one or more target(s) is/are sputtered using a sputtering gas comprising at least one of Xe, Kr and Rn under conditions effective to deposit the metal layer onto the substrate. The metal layer can be fabricated independent of fabrication of a non-volatile resistance variable device.
    Type: Application
    Filed: March 27, 2002
    Publication date: October 2, 2003
    Applicant: Micron Technology, Inc.
    Inventors: Jiutao Li, Shane P. Leiphart
  • Publication number: 20030068861
    Abstract: Methods of forming metal-doped chalcogenide layers and devices containing such doped chalcogenide layers include using a plasma to induce diffusion of metal into a chalcogenide layer concurrently with metal deposition. The plasma contains at least one noble gas of low atomic weight, such as neon or helium. The plasma has a sputter yield sufficient to sputter a metal target and a UV component of its emitted spectrum sufficient to induce diffusion of the sputtered metal into the chalcogenide layer. Using such methods, a conductive layer can be formed on the doped chalcogenide layer in situ. In integrated circuit devices, such as non-volatile chalcogenide memory devices, doping of the chalcogenide layer concurrently with metal deposition and formation of a conductive layer in situ with the doping of the chalcogenide layer reduces contamination concerns and physical damage resulting from moving the device substrate from tool to tool, thus facilitating improved device reliability.
    Type: Application
    Filed: November 1, 2002
    Publication date: April 10, 2003
    Inventors: Jiutao Li, Allen McTeer
  • Publication number: 20030068862
    Abstract: Methods of forming metal-doped chalcogenide layers and devices containing such doped chalcogenide layers include using a plasma to induce diffusion of metal into a chalcogenide layer concurrently with metal deposition. The plasma contains at least one noble gas of low atomic weight, such as neon or helium. The plasma has a sputter yield sufficient to sputter a metal target and a UV component of its emitted spectrum sufficient to induce diffusion of the sputtered metal into the chalcogenide layer. Using such methods, a conductive layer can be formed on the doped chalcogenide layer in situ. In integrated circuit devices, such as non-volatile chalcogenide memory devices, doping of the chalcogenide layer concurrently with metal deposition and formation of a conductive layer in situ with the doping of the chalcogenide layer reduces contamination concerns and physical damage resulting from moving the device substrate from tool to tool, thus facilitating improved device reliability.
    Type: Application
    Filed: November 1, 2002
    Publication date: April 10, 2003
    Inventors: Jiutao Li, Allen McTeer
  • Publication number: 20030047772
    Abstract: A method for fabricating chalcogenide materials on substrates, which reduces and/or eliminates agglomeration of materials on the chalcogenide materials; and system and devices for performing the method, semiconductor devices so produced, and machine readable media containing the method. One method disclosed includes forming a first layer, forming a second layer on the first layer, forming a third layer on the second layer, wherein the third layer is essentially transparent to irradiation, and irradiating the second layer through the third layer to cause the second layer to diffuse into the first layer thereby creating an integral layer of materials from the first and second layers.
    Type: Application
    Filed: October 28, 2002
    Publication date: March 13, 2003
    Inventor: Jiutao Li
  • Publication number: 20030047773
    Abstract: A method for fabricating chalcogenide materials on substrates, which reduces and/or eliminates agglomeration of materials on the chalcogenide materials; and system and devices for performing the method, semiconductor devices so produced, and machine readable media containing the method. One method disclosed includes forming a first layer, forming a second layer on the first layer, forming a third layer on the second layer, wherein the third layer is essentially transparent to irradiation, and irradiating the second layer through the third layer to cause the second layer to diffuse into the first layer thereby creating an integral layer of materials from the first and second layers.
    Type: Application
    Filed: October 28, 2002
    Publication date: March 13, 2003
    Inventor: Jiutao Li
  • Publication number: 20030045049
    Abstract: A method of forming a non-volatile resistance variable device includes forming a first conductive electrode material on a substrate. A metal doped chalcogenide comprising material is formed over the first conductive electrode material. Such comprises the metal and AxBy, where “B” is selected from S, Se and Te and mixtures thereof, and where “A” comprises at least one element which is selected from Group 13, Group 14, Group 15, or Group 17 of the periodic table. In one aspect, the chalcogenide comprising material is exposed to and HNO3 solution. In one aspect the outer surface is oxidized effective to form a layer comprising at least one of an oxide of “A” or an oxide of “B”. In one aspect, a passivating material is formed over the metal doped chalcogenide comprising material. A second conductive electrode material is deposited, and a second conductive electrode material of the device is ultimately formed therefrom.
    Type: Application
    Filed: August 29, 2001
    Publication date: March 6, 2003
    Inventors: Kristy A. Campbell, Terry L. Gilton, John T. Moore, Jiutao Li
  • Publication number: 20020132417
    Abstract: A method for fabricating chalcogenide materials on substrates, which reduces and/or eliminates agglomeration of materials on the chalcogenide materials; and system and devices for performing the method, semiconductor devices so produced, and machine readable media containing the method. One method disclosed includes forming a first layer, forming a second layer on the first layer, forming a third layer on the second layer, wherein the third layer is essentially transparent to irradiation, and irradiating the second layer through the third layer to cause the second layer to diffuse into the first layer thereby creating an integral layer of materials from the first and second layers.
    Type: Application
    Filed: March 15, 2001
    Publication date: September 19, 2002
    Inventor: Jiutao Li