Abstract: A method includes providing a plurality of failure dies, and performing a chip probing on the plurality of failure dies to generate a data log comprising electrical characteristics of the plurality of failure dies. An automatic net tracing is performed to trace failure candidate nodes in the failure dies. A failure layer analysis is performed on results obtained from the automatic net tracing. Physical failure analysis (PFA) samples are selected from the plurality of failure dies using results obtained in the step of performing the failure layer analysis.

Abstract: A method of extending advanced process control (APC) models includes constructing an APC model table including APC model parameters of a plurality of products and a plurality of work stations. The APC model table includes empty cells and cells filled with existing APC model parameters. Average APC model parameters of the existing APC model parameters are calculated, and filled into the empty cells as initial values. An iterative calculation is performed to update the empty cells with updated values.

Abstract: In accordance with an embodiment, a method for exception handling comprises accessing an exception type for an exception, filtering historical data based on at least one defined criterion to provide a data train comprising data sets, assigning a weight to each data set, and providing a current control parameter. The data sets each comprise a historical condition and a historical control parameter, and the weight assigned to each data set is based on each historical condition. The current control parameter is provided using the weight and the historical control parameter for each data set.

Abstract: A method for providing bin-based control when manufacturing integrated circuit devices is disclosed. The method comprises performing a plurality of processes on a plurality of wafer lots; determining a required bin quantity, an actual bin quantity, and a projected bin quantity; comparing the determined required bin quantity with the determined actual bin quantity and determined projected bin quantity; and modifying at least one of the plurality of processes on the plurality of wafer lots if the determined actual bin quantity and determined projected bin quantity fail to satisfy the determined required bin quantity.

Abstract: The present disclosure provides a method of fabricating a semiconductor device. The method includes collecting a plurality of manufacturing data sets from a plurality of semiconductor processes, respectively. The method includes normalizing each of the manufacturing data sets in a manner so that statistical differences among the manufacturing data sets are reduced. The method includes establishing a database that includes the normalized manufacturing data sets. The method includes normalizing the database in a manner so that the manufacturing data sets in the normalized database are statistically compatible with a selected one of the manufacturing data sets. The method includes predicting performance of a selected one of the semiconductor processes by using the normalized database. The selected semiconductor process corresponds to the selected manufacturing data set. The method includes controlling a semiconductor processing machine in response to the predicted performance.

Abstract: A method for monitoring overlay of a direct-write system. The method includes providing a substrate having a pattern formed thereon by the direct-write system, generating data associated with the substrate pattern, decomposing the data by applying a transformation matrix, and determining an overlay index based on the decomposed data, the overlay index corresponding to a variation component of the substrate pattern relative to a target pattern.

Abstract: The present disclosure provides a semiconductor manufacturing method. The method includes providing product data of a product, the product data including a sensitive product parameter; searching existing products according to the sensitive product parameter to identify a relevant product from the existing products; determining an initial value of a processing model parameter to the product using corresponding data of the relevant product; assigning the initial value of the processing model parameter to a processing model associated with a manufacturing process; thereafter, tuning a processing recipe using the processing model; and performing the manufacturing process to a semiconductor wafer using the processing recipe.

Abstract: The present disclosure describes a semiconductor manufacturing apparatus. The apparatus includes a processing chamber designed to perform a process to a wafer; an electrostatic chuck (E-chuck) configured in the processing chamber and designed to secure the wafer, wherein the E-chuck includes an electrode and a dielectric feature formed on the electrode; a tuning structure designed to hold the E-chuck to the processing chamber by clamping forces, wherein the tuning structure is operable to dynamically adjust the clamping forces; a sensor integrated with the E-chuck and sensitive to the clamping forces; and a process control module for controlling the tuning structure to adjust the clamping forces based on pre-measurement data from the wafer and sensor data from the sensor.

Abstract: The present disclosure provides a semiconductor manufacturing method. The method includes performing a first process to a wafer; measuring the wafer for wafer data after the first process; securing the wafer on an E-chuck in a processing chamber; collecting sensor data from a sensor embedded in the E-chuck; adjusting clamping forces to the E-chuck based on the wafer data and the sensor data; and thereafter performing a second process to the wafer secured on the E-chuck in the processing chamber.

Abstract: A method for monitoring overlay of a direct-write system. The method includes providing a substrate having a pattern formed thereon by the direct-write system, generating data associated with the substrate pattern, decomposing the data by applying a transformation matrix, and determining an overlay index based on the decomposed data, the overlay index corresponding to a variation component of the substrate pattern relative to a target pattern.

Abstract: System and method for implementing wafer acceptance test (“WAT”) advanced process control (“APC”) are described. In one embodiment, the method comprises performing a key process on a sample number of wafers of a lot of wafers; performing a key inline measurement related to the key process to produce metrology data for the wafers; predicting WAT data from the metrology data using an inline-to-WAT model; and using the predicted WAT data to tune a WAT APC process for controlling a tuning process or a process APC process.

Abstract: A method for providing bin-based control when manufacturing integrated circuit devices is disclosed. The method comprises performing a plurality of processes on a plurality of wafer lots; determining a required bin quantity, an actual bin quantity, and a projected bin quantity; comparing the determined required bin quantity with the determined actual bin quantity and determined projected bin quantity; and modifying at least one of the plurality of processes on the plurality of wafer lots if the determined actual bin quantity and determined projected bin quantity fail to satisfy the determined required bin quantity.

Abstract: The present disclosure provides a semiconductor manufacturing method. The method includes performing a first process to a wafer; measuring the wafer for wafer data after the first process; securing the wafer on an E-chuck in a processing chamber; collecting sensor data from a sensor embedded in the E-chuck; adjusting clamping forces to the E-chuck based on the wafer data and the sensor data; and thereafter performing a second process to the wafer secured on the E-chuck in the processing chamber.

Abstract: An apparatus includes a process chamber configured to perform an ion implantation process. A cooling platen or electrostatic chuck is provided within the process chamber. The cooling platen or electrostatic chuck is configured to support a semiconductor wafer. The cooling platen or electrostatic chuck has a plurality of temperature zones. Each temperature zone includes at least one fluid conduit within or adjacent to the cooling platen or electrostatic chuck. At least two coolant sources are provided, each fluidly coupled to a respective one of the fluid conduits and configured to supply a respectively different coolant to a respective one of the plurality of temperature zones during the ion implantation process. The coolant sources include respectively different chilling or refrigeration units.

Abstract: A number of air actuated valves are added to a conventional apparatus for treating semiconductor wafers with HMDS, hexamethyl-disilazane, vapor to improve the adhesion between the wafers and resist layers. These valves allow for automatic purging of the HMDS vapor from the pipes in the apparatus by dry nitrogen thereby preventing HMDS vapor condensation in the pipes which leads to contamination of the HMDS supply. The valve system prevents any backstreaming of nitrogen gas into the HMDS supply tank.

Abstract: A method and apparatus for cleaning a spray stream nozzle employed in dispensing upon a photoexposed blanket photoresist layer formed over a semiconductor substrate a photoresist developer solution. There is first provided a spray stream nozzle having a minimum of one aperture formed therein. There is then provided through the spray stream nozzle a volume of a photoresist developer solution sufficient to develop a photoexposed blanket photoresist layer formed over a semiconductor substrate placed beneath the spray stream nozzle. Finally, there is provided then through the spray stream nozzle a volume of a solvent which is not susceptible to clogging the spray stream nozzle.

Abstract: A number of air actuated valves are added to a conventional apparatus for treating semiconductor wafers with HMDS, hexamethyl-disilazane, vapor to improve the adhesion between the wafers and resist layers. These valves allow for automatic purging of the HMDS vapor from the pipes in the apparatus by dry nitrogen thereby preventing HMDS vapor condensation in the pipes which leads to contamination of the HMDS supply. The valve system prevents any backstreaming of nitrogen gas into the HMDS supply tank.