Patents by Inventor Joachim Weyers

Joachim Weyers has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20210193646
    Abstract: A single chip power semiconductor device includes: first and second load terminals; a semiconductor body integrated in the single chip and coupled to the load terminals and configured to conduct a load current along a load current path between the load terminals; a control terminal and at least one control electrode electrically connected thereto, the at least one control electrode being electrically insulated from the semiconductor body and configured to control the load current based on a control voltage between the control terminal and the first load terminal; a protection structure integrated, separately from the load current path, in the single chip and including a series connection of pn junctions with first semiconductor regions of a first conductivity type and second semiconductor regions of a second conductivity type. The series connection of the pn-junctions is connected in forward bias between the control terminal and the first load terminal.
    Type: Application
    Filed: December 14, 2020
    Publication date: June 24, 2021
    Inventors: Guang Zeng, Anton Mauder, Joachim Weyers
  • Patent number: 10971620
    Abstract: A method includes partly removing a supporting layer arranged between a first semiconductor layer and a second semiconductor layer using an etching process to form at least one undercut between the first semiconductor layer and the second semiconductor layer, at least partly filling the at least one undercut with a first material having a higher thermal conductivity than the supporting layer, and forming a sensor device in or on the second semiconductor layer. Semiconductor arrangements and devices produced by the method are also described.
    Type: Grant
    Filed: June 20, 2019
    Date of Patent: April 6, 2021
    Assignee: Infineon Technologies Dresden GmbH & Co. KG
    Inventors: Joachim Weyers, Andreas Boehm, Anton Mauder, Patrick Schindler, Stefan Tegen, Armin Tilke, Uwe Wahl
  • Publication number: 20200321463
    Abstract: A semiconductor device includes a semiconductor body comprising a first surface, a second surface opposite to the first surface, an active region, and an edge region surrounding the active region in a horizontal plane. The semiconductor device further includes a plurality of transistor cells at least partly integrated in the active region. Each transistor cell includes a drift region separated from a source region by a body region, and a gate electrode dielectrically insulated from the body region. The semiconductor device also includes a sensor device having a first sensor region of a first doping type integrated in the edge region. The first sensor region is electrically coupled to a first contact pad and to a second contact pad. Each contact pad is arranged either on the first surface or on the second surface. The sensor device at least partially extends around the active region.
    Type: Application
    Filed: April 2, 2020
    Publication date: October 8, 2020
    Inventors: Joachim Weyers, Andreas Boehm, Franz Hirler, Enrique Vecino Vazquez
  • Patent number: 10741541
    Abstract: A method of manufacturing a semiconductor device includes forming an amorphous silicon layer over a first isolation layer. The method further includes simultaneously forming a gate oxide layer of a transistor device and transforming the amorphous silicon layer into a polycrystalline silicon layer by a thermal oxidation process. Herein a cover oxide layer is formed on the polycrystalline silicon layer.
    Type: Grant
    Filed: October 4, 2016
    Date of Patent: August 11, 2020
    Assignee: Infineon Technologies Dresden GmbH
    Inventors: Joachim Weyers, Markus Schmitt, Armin Tilke, Stefan Tegen, Thomas Bertrams
  • Publication number: 20200243505
    Abstract: In an embodiment, a semiconductor die includes a transistor device that has a cell field and an edge termination region, a source pad arranged on the cell field, a gate pad laterally arranged laterally adjacent the cell field and in the edge termination region, a shielding region laterally surrounding the cell field, the shielding region including a non-depletable doped. The polysilicon ESD protection diode is arranged laterally between the gate pad and the source pad and vertically above at least a portion of the shielding region, and includes at least two separate sections that are electrically coupled in parallel between the gate pad and the source pad. The sections are laterally spaced apart by a gap situated at a corner of the gate pad.
    Type: Application
    Filed: January 23, 2020
    Publication date: July 30, 2020
    Inventor: Joachim Weyers
  • Publication number: 20200044064
    Abstract: A semiconductor device includes a semiconductor body. The semiconductor body has a first surface and a second surface opposite to the first surface. A transistor cell structure is provided in the semiconductor body. A gate contact structure includes a gate line electrically coupled to a gate electrode layer of the transistor cell structure, and a gate pad electrically coupled to the gate line. A gate resistor structure is electrically coupled between the gate pad and the gate electrode layer. An electric resistivity of the gate resistor structure is greater than the electric resistivity of the gate electrode layer.
    Type: Application
    Filed: October 15, 2019
    Publication date: February 6, 2020
    Inventors: Joachim Weyers, Katarzyna Kowalik-Seidl, Andreas Schloegl, Enrique Vecino Vazquez
  • Publication number: 20200027949
    Abstract: A switched-mode power supply includes a power semiconductor device that includes a semiconductor body comprising transistor cells and a drift zone between a drain layer and the transistor cells, the transistor cells comprising source zones, wherein the device exhibits a first output charge gradient when a voltage between the drain layer and the source zones of the transistor cells increases from a depletion voltage of the semiconductor device to a maximum drain/source voltage of the semiconductor device, wherein the device exhibits a second output charge gradient when a voltage between the drain layer and the source zones of the semiconductor device decreases from the maximum drain/source voltage to the depletion voltage of the semiconductor device, and wherein the semiconductor device is configured such that the first output charge gradient deviates by less than 5% from the second output charge gradient.
    Type: Application
    Filed: September 30, 2019
    Publication date: January 23, 2020
    Inventors: Armin Willmeroth, Franz Hirler, Bjoern Fischer, Joachim Weyers
  • Patent number: 10541327
    Abstract: A semiconductor device includes a trench structure extending into a semiconductor body from a first surface. The trench structure has a shield electrode, a dielectric structure and a diode structure. The diode structure is arranged at least partly between the first surface and a first part of the dielectric structure. The shield electrode is arranged between the first part of the dielectric structure and a bottom of the trench structure. The shield electrode and the semiconductor body are electrically isolated by the dielectric structure. Corresponding methods of manufacture are also described.
    Type: Grant
    Filed: April 12, 2018
    Date of Patent: January 21, 2020
    Assignee: Infineon Technologies Austria AG
    Inventors: Joachim Weyers, Franz Hirler
  • Publication number: 20190393334
    Abstract: A method includes partly removing a supporting layer arranged between a first semiconductor layer and a second semiconductor layer using an etching process to form at least one undercut between the first semiconductor layer and the second semiconductor layer, at least partly filling the at least one undercut with a first material having a higher thermal conductivity than the supporting layer, and forming a sensor device in or on the second semiconductor layer. Semiconductor arrangements and devices produced by the method are also described.
    Type: Application
    Filed: June 20, 2019
    Publication date: December 26, 2019
    Inventors: Joachim Weyers, Andreas Boehm, Anton Mauder, Patrick Schindler, Stefan Tegen, Armin Tilke, Uwe Wahl
  • Patent number: 10504891
    Abstract: A semiconductor device includes a semiconductor body having first and second opposing sides, an active area, and an inactive area which is, in a projection onto to the first and/or second side, arranged between the active area and an edge of the semiconductor body. A transistor structure in the active area includes a source region adjacent the first side and forms a first pn-junction in the semiconductor body. A gate electrode insulated from the semiconductor body is arranged adjacent to the first pn-junction. A capacitor in the inactive area includes first and second conductors arranged over each other on the first side. A source contact structure arranged above the capacitor is in Ohmic connection with the source region and the first conductor. A gate contact structure is arranged above the capacitor, spaced apart from the source contact structure and in Ohmic connection with the gate electrode and the second conductor.
    Type: Grant
    Filed: August 8, 2018
    Date of Patent: December 10, 2019
    Assignee: Infineon Technologies Austria AG
    Inventors: Joachim Weyers, Franz Hirler, Maximilian Treiber
  • Patent number: 10483383
    Abstract: A semiconductor device includes a semiconductor body. The semiconductor body has a first surface and a second surface opposite to the first surface. A transistor cell structure is provided in the semiconductor body. A gate contact structure includes a gate line electrically coupled to a gate electrode layer of the transistor cell structure, and a gate pad electrically coupled to the gate line. A gate resistor structure is electrically coupled between the gate pad and the gate electrode layer. An electric resistivity of the gate resistor structure is greater than the electric resistivity of the gate electrode layer.
    Type: Grant
    Filed: March 14, 2018
    Date of Patent: November 19, 2019
    Assignee: Infineon Technologies Dresden GmbH & Co. KG
    Inventors: Joachim Weyers, Katarzyna Kowalik-Seidl, Andreas Schloegl, Enrique Vecino Vazquez
  • Patent number: 10468479
    Abstract: A semiconductor device includes a semiconductor body, which includes transistor cells and a drift zone between a drain layer and the transistor cells. The drift zone includes a compensation structure. Above a depletion voltage a first output charge gradient obtained by increasing a drain-to-source voltage from the depletion voltage to a maximum drain-to-source voltage deviates by less than 5% from a second output charge gradient obtained by decreasing the drain-to-source voltage from the maximum drain-to-source voltage to the depletion voltage. At the depletion voltage the first output charge gradient exhibits a maximum curvature.
    Type: Grant
    Filed: May 14, 2014
    Date of Patent: November 5, 2019
    Assignee: Infineon Technologies Austria AG
    Inventors: Armin Willmeroth, Franz Hirler, Bjoern Fischer, Joachim Weyers
  • Patent number: 10418358
    Abstract: A semiconductor device includes a semiconductor body having a first surface and a second surface opposite to the first surface. A first isolation layer is provided over the first surface of the semiconductor body. The semiconductor device further includes an electrostatic discharge protection structure over the first isolation layer. The electrostatic discharge protection structure has a first terminal region of a first conductivity type and a second terminal region of a second conductivity type opposite to the first conductivity type.
    Type: Grant
    Filed: August 23, 2017
    Date of Patent: September 17, 2019
    Assignee: Infineon Technologies Dresden GmbH & Co. KG
    Inventor: Joachim Weyers
  • Patent number: 10354992
    Abstract: A semiconductor device includes a transistor arrangement and a diode structure. The diode structure is coupled between a gate electrode structure of the transistor arrangement and a source electrode structure of the transistor arrangement. An insulating layer is located vertically between the diode structure and a front side surface of a semiconductor substrate of the semiconductor device. The diode structure includes at least one diode pn-junction. A substrate pn-junction extends from the front side surface of the semiconductor substrate into the semiconductor substrate between a shielding doping region and an edge doping portion. The edge doping portion is located adjacent to the shielding doping region within the semiconductor substrate. At the front side surface of the semiconductor substrate, the substrate pn-junction is located laterally between the diode pn-junction and a source contact region of the diode structure with the source electrode structure.
    Type: Grant
    Filed: September 28, 2017
    Date of Patent: July 16, 2019
    Assignee: Infineon Technologies Dresden GmbH & Co. KG
    Inventors: Joachim Weyers, Franz Hirler, Ahmed Mahmoud, Yann Ruet, Enrique Vecino Vazquez
  • Publication number: 20190051647
    Abstract: A semiconductor device includes a semiconductor body having first and second opposing sides, an active area, and an inactive area which is, in a projection onto to the first and/or second side, arranged between the active area and an edge of the semiconductor body. A transistor structure in the active area includes a source region adjacent the first side and forms a first pn-junction in the semiconductor body. A gate electrode insulated from the semiconductor body is arranged adjacent to the first pn-junction. A capacitor in the inactive area includes first and second conductors arranged over each other on the first side. A source contact structure arranged above the capacitor is in Ohmic connection with the source region and the first conductor. A gate contact structure is arranged above the capacitor, spaced apart from the source contact structure and in Ohmic connection with the gate electrode and the second conductor.
    Type: Application
    Filed: August 8, 2018
    Publication date: February 14, 2019
    Inventors: Joachim Weyers, Franz Hirler, Maximilian Treiber
  • Patent number: 10199367
    Abstract: A semiconductor device includes a semiconductor body having opposite first and second surfaces. The semiconductor device further includes a transistor structure in the semiconductor body and a source contact structure overlapping the transistor structure. The source contact structure is electrically connected to source regions of the transistor structure. A gate contact structure is further provided, which has a part separated from the source contact structure by a longitudinal gap within a lateral plane. Gate interconnecting structures bridge the longitudinal gap and are electrically coupled between the gate contact structure and a gate electrode of the transistor structure. Electrostatic discharge protection structures bridge the longitudinal gap and are electrically coupled between the gate contact structure and the source contact structure.
    Type: Grant
    Filed: March 14, 2017
    Date of Patent: February 5, 2019
    Assignee: Infineon Technologies Dresden GmbH
    Inventors: Markus Schmitt, Armin Tilke, Joachim Weyers
  • Publication number: 20180301553
    Abstract: A semiconductor device includes a trench structure extending into a semiconductor body from a first surface. The trench structure has a shield electrode, a dielectric structure and a diode structure. The diode structure is arranged at least partly between the first surface and a first part of the dielectric structure. The shield electrode is arranged between the first part of the dielectric structure and a bottom of the trench structure. The shield electrode and the semiconductor body are electrically isolated by the dielectric structure. Corresponding methods of manufacture are also described.
    Type: Application
    Filed: April 12, 2018
    Publication date: October 18, 2018
    Inventors: Joachim Weyers, Franz Hirler
  • Publication number: 20180301537
    Abstract: A semiconductor device includes a semiconductor body having a first surface and a second surface opposite to the first surface. A transistor structure is formed is the semiconductor body. A trench structure extends from the first surface into the semiconductor body. An electrostatic discharge protection structure is accommodated in the trench structure. The electrostatic discharge protection structure includes a first terminal region and a second terminal region. A source contact structure at the first surface is electrically connected to source regions of the transistor structure and to the first terminal region. A gate contact structure at the first surface is electrically connected to a gate electrode of the transistor structure and to the second terminal region.
    Type: Application
    Filed: April 12, 2018
    Publication date: October 18, 2018
    Inventors: Joachim Weyers, Stefan Gamerith, Franz Hirler, Anton Mauder
  • Publication number: 20180269296
    Abstract: A semiconductor device includes a semiconductor body. The semiconductor body has a first surface and a second surface opposite to the first surface. A transistor cell structure is provided in the semiconductor body. A gate contact structure includes a gate line electrically coupled to a gate electrode layer of the transistor cell structure, and a gate pad electrically coupled to the gate line. A gate resistor structure is electrically coupled between the gate pad and the gate electrode layer. An electric resistivity of the gate resistor structure is greater than the electric resistivity of the gate electrode layer.
    Type: Application
    Filed: March 14, 2018
    Publication date: September 20, 2018
    Inventors: Joachim Weyers, Katarzyna Kowalik-Seidl, Andreas Schloegl, Enrique Vecino Vazquez
  • Patent number: 9991252
    Abstract: A semiconductor device includes a semiconductor body having first and second opposing surfaces, a first isolation layer on the first surface of the semiconductor body, and an electrostatic discharge protection structure. The electrostatic discharge protection structure includes a diode structure on the first isolation layer, a first terminal and a second terminal. The diode structure includes a polysilicon layer having first regions and at least one second region of opposite conductivity type alternatingly arranged along a first lateral direction between the first terminal and the second terminal. The diode structure extends from an electrostatic discharge protection part into an edge termination part along a second lateral direction. A first breakdown voltage associated with the diode structure in the electrostatic discharge protection part is smaller than a second breakdown voltage associated with the diode structure in the edge termination part.
    Type: Grant
    Filed: May 27, 2016
    Date of Patent: June 5, 2018
    Assignee: Infineon Technologies Dresden GmbH
    Inventor: Joachim Weyers