Patents by Inventor Joel Goergen

Joel Goergen has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20220397599
    Abstract: Regulation of a voltage gradient may be provided. A plurality of test voltage values associated with a corresponding plurality of locations associated with an electronic device may be received. Then, based on the plurality of test voltage values, a target setpoint may be determined for a power supply that supplies power to the electronic device. The target setpoint may be configured to cause a maximum of voltage values at the plurality of locations to be below a maximum voltage level defined by a specification for the electronic device. The target setpoint may also be configured to cause a minimum of the voltage values at the plurality of locations to be above a minimum voltage level defined by the specification for the electronic device. The power supply may then be driven at the target setpoint.
    Type: Application
    Filed: June 10, 2021
    Publication date: December 15, 2022
    Applicant: Cisco Technology, Inc.
    Inventors: Jerrold Mark Pianin, Joel Goergen, Shobhana Ram Punjabi
  • Publication number: 20220393776
    Abstract: Channel predictive behavior and fault analysis may be provided. A forward time value may be determined comprising a time a forward signal takes to travel from a transmitter over a channel to the receiver. Next, a reflected time value may be determined comprising a time a reflected signal takes to travel to the receiver. The reflected signal may be associated with the forward signal. A discontinuity may then be determined to exist on the channel based on the forward time value and the reflected time value. The reflected signal may be caused by the discontinuity and a high impedance or low impedance at the transmitter present after the forward signal is sent.
    Type: Application
    Filed: June 8, 2021
    Publication date: December 8, 2022
    Applicant: Cisco Technology, Inc.
    Inventors: Amendra Koul, David Nozadze, Mike Sapozhnikov, Joel Goergen, Arnav Shailesh Shah
  • Patent number: 11482802
    Abstract: An apparatus includes a printed circuit board (PCB). The PCB includes a plurality of through-holes extending through the PCB between a PCB first surface and a PCB second surface that opposes the PCB first surface, where each through-hole includes a via extending from the PCB first surface to a depth within the through-hole that is distanced from the PCB second surface. An integrated circuit surface mount is connected at the PCB first surface with vias of the through-holes, and a cable interconnect assembly is surface mount connected at the PCB second surface. The cable interconnect assembly includes a plurality of contact pins, each contact pin extending within a corresponding through-hole and having a sufficient dimension to engage and electrically connect with the via of the corresponding through-hole so as to facilitate exchange of an electrical signal between the integrated circuit and the cable interconnect assembly.
    Type: Grant
    Filed: May 28, 2021
    Date of Patent: October 25, 2022
    Assignee: CISCO TECHNOLOGY, INC.
    Inventors: Jason Visneski, George Edward Curtis, Mike Sapozhnikov, Peter Gunadisastra, Joel Goergen
  • Publication number: 20220326142
    Abstract: An apparatus includes a first printed circuit board (PCB), the first PCB including a first interface, and a corrosion sensor assembly. The corrosion sensor assembly including a second interface arranged to be coupled to the first interface. The corrosion sensor assembly further including a signal trace field and a plurality of components, where the signal trace field and the plurality of components are arranged to provide an indication of whether the apparatus is in an environment that is corrosive.
    Type: Application
    Filed: June 24, 2022
    Publication date: October 13, 2022
    Inventors: Joel Goergen, Robert Gregory Twiss, Elizabeth Kochuparambil
  • Patent number: 11425821
    Abstract: A printed circuit board (PCB) includes a plurality of layers disposed at different depths of the PCB, circuit components disposed at different layers of the PCB, and a plurality of temperature measurement sensors located at one or more layers of the PCB, where each temperature measurement sensor is associated with a corresponding circuit component. A measured temperature is obtained at an embedded temperature measurement sensor located at an embedded layer within the PCB, and the measured temperature is correlated with an electrical property of an embedded circuit component located at the same embedded layer within the PCB as the embedded temperature measurement sensor. A plurality of moisture measurement sensors can also be located at one or more layers of the PCB to facilitate a measured moisture with an electrical property of an embedded circuit component.
    Type: Grant
    Filed: August 22, 2019
    Date of Patent: August 23, 2022
    Assignee: CISCO TECHNOLOGY, INC.
    Inventors: Amendra Koul, Mike Sapozhnikov, David Nozadze, Joel Goergen
  • Patent number: 11402318
    Abstract: According to one aspect, an apparatus includes a first printed circuit board (PCB), the first PCB including a first interface, and a corrosion sensor assembly. The corrosion sensor assembly including a second interface arranged to be coupled to the first interface, the corrosion sensor assembly further including a signal trace field and a plurality of components, wherein the signal trace field and the plurality of components are arranged to provide an indication of whether the apparatus is in an environment that is corrosive.
    Type: Grant
    Filed: July 28, 2020
    Date of Patent: August 2, 2022
    Assignee: CISCO TECHNOLOGY, INC.
    Inventors: Joel Goergen, Robert Gregory Twiss, Elizabeth Kochuparambil
  • Publication number: 20220240419
    Abstract: A combined liquid and air cooling system is provided over a printed circuit board (PCB) of an electronic device, where the PCB includes an integrated circuit package including an application specific integrated circuit (ASIC) die and a plurality of high bandwidth memory (HBM) modules located proximate the ASIC die, and the combined liquid and air cooling system includes a liquid cooling system located over the integrated circuit package and an air cooling system integrated with the liquid cooling system and a portion of the PCB. The system operates in a normal mode, where both liquid and air cooling systems provide cooling to components of the PCB, and a fail-safe mode, where the liquid cooling system is not operating (e.g., due to a detected condition) but the air cooling system operation is adjusted such that it provides sufficient cooling to PCB components which facilitates continuous operation of the electronic device.
    Type: Application
    Filed: April 14, 2022
    Publication date: July 28, 2022
    Inventors: M. Baris Dogruoz, Joel Goergen
  • Publication number: 20220216712
    Abstract: In one embodiment, a battery backup unit (BBU) cut-off and recharge circuit includes: a first transistor, a power entry connection connected to a main power supply, where power from the power entry connection flows to application circuits for an electronic device, and the first transistor is positioned between a BBU and the power entry connection, and a microcontroller, where the microcontroller is operative to: detect a loss of power from the main power supply, turn on the first transistor to enable the BBU to discharge through the power entry connection to application circuits, detect a status of charge (SOC) for the BBU, and upon detecting that the SOC is under a predefined threshold, set the BBU cut-off and recharge circuit to a lockdown state by turning off the first transistor.
    Type: Application
    Filed: March 24, 2022
    Publication date: July 7, 2022
    Inventors: Xiqun ZHU, Sung Kee BAEK, Wingo CHEONG, Steven Anthony GRANZELLA, Joel GOERGEN, Charles Calvin BYERS
  • Publication number: 20220217837
    Abstract: A conductive signal transmission structure for an electronic device (e.g., a printed circuit board of an electronic device) includes a copper material and a graphene layer disposed within the copper material at a depth below a surface of the structure. The depth of the graphene layer is further within a skin depth region of the structure when a transmission signal applied to the conductive signal transmission structure has a signal speed of at least 112 Gbps.
    Type: Application
    Filed: March 24, 2022
    Publication date: July 7, 2022
    Inventors: Joel Goergen, Scott Hinaga, Jessica Kiefer, Alpesh Umakant Bhobe, D. Brice Achkir, David Nozadze, Amendra Koul, Mehmet Onder Cap, Madeline Marie Roemer
  • Publication number: 20220181807
    Abstract: An apparatus includes a printed circuit board (PCB). The PCB includes a plurality of through-holes extending through the PCB between a PCB first surface and a PCB second surface that opposes the PCB first surface, where each through-hole includes a via extending from the PCB first surface to a depth within the through-hole that is distanced from the PCB second surface. An integrated circuit surface mount is connected at the PCB first surface with vias of the through-holes, and a cable interconnect assembly is surface mount connected at the PCB second surface. The cable interconnect assembly includes a plurality of contact pins, each contact pin extending within a corresponding through-hole and having a sufficient dimension to engage and electrically connect with the via of the corresponding through-hole so as to facilitate exchange of an electrical signal between the integrated circuit and the cable interconnect assembly.
    Type: Application
    Filed: May 28, 2021
    Publication date: June 9, 2022
    Inventors: Jason Visneski, George Edward Curtis, Mike Sapozhnikov, Peter Gunadisastra, Joel Goergen
  • Patent number: 11343945
    Abstract: A combined liquid and air cooling system is provided over a printed circuit board (PCB) of an electronic device, where the PCB includes an integrated circuit package including an application specific integrated circuit (ASIC) die and a plurality of high bandwidth memory (HBM) modules located proximate the ASIC die, and the combined liquid and air cooling system includes a liquid cooling system located over the integrated circuit package and an air cooling system integrated with the liquid cooling system and a portion of the PCB. The system operates in a normal mode, where both liquid and air cooling systems provide cooling to components of the PCB, and a fail-safe mode, where the liquid cooling system is not operating (e.g., due to a detected condition) but the air cooling system operation is adjusted such that it provides sufficient cooling to PCB components which facilitates continuous operation of the electronic device.
    Type: Grant
    Filed: November 27, 2019
    Date of Patent: May 24, 2022
    Assignee: CISCO TECHNOLOGY, INC.
    Inventors: M. Baris Dogruoz, Joel Goergen
  • Patent number: 11342762
    Abstract: In one embodiment, a battery backup unit (BBU) cut-off and recharge circuit includes: a first transistor, a power entry connection connected to a main power supply, where power from the power entry connection flows to application circuits for an electronic device, and the first transistor is positioned between a BBU and the power entry connection, and a microcontroller, where the microcontroller is operative to: detect a loss of power from the main power supply, turn on the first transistor to enable the BBU to discharge through the power entry connection to application circuits, detect a status of charge (SOC) for the BBU, and upon detecting that the SOC is under a predefined threshold, set the BBU cut-off and recharge circuit to a lockdown state by turning off the first transistor.
    Type: Grant
    Filed: November 13, 2020
    Date of Patent: May 24, 2022
    Assignee: CISCO TECHNOLOGY, INC.
    Inventors: Xiqun Zhu, Sung Kee Baek, Wingo Cheong, Steven Anthony Granzella, Joel Goergen, Charles Calvin Byers
  • Patent number: 11330702
    Abstract: A conductive signal transmission structure for an electronic device (e.g., a printed circuit board of an electronic device) includes a copper material and a graphene layer disposed within the copper material at a depth below a surface of the structure. The depth of the graphene layer is further within a skin depth region of the structure when a transmission signal is applied to the structure that is in the GHz frequency range.
    Type: Grant
    Filed: October 26, 2020
    Date of Patent: May 10, 2022
    Assignee: CISCO TECHNOLOGY, INC.
    Inventors: Joel Goergen, Scott Hinaga, Jessica Kiefer, Alpesh Umakant Bhobe, D. Brice Achkir, David Nozadze, Amendra Koul, Mehmet Onder Cap, Madeline Marie Roemer
  • Publication number: 20220039257
    Abstract: A structure includes a first copper layer and a first carbon layer applied directly to a surface of the first copper layer, a second copper layer and a second carbon layer applied directly to a surface of the second copper layer, and an insulating core disposed between the first and second copper layers. Each of the first carbon layer and the second carbon layer faces toward and directly contacts the insulating core. The structure provides electrical power to a component of an electronic device.
    Type: Application
    Filed: October 18, 2021
    Publication date: February 3, 2022
    Inventors: Joel Goergen, Jessica Kiefer, Alpesh Umakant Bhobe, Kameron Rose Hurst, D. Brice Achkir, Amendra Koul, Scott Hinaga, David Nozadze
  • Patent number: 11202368
    Abstract: A power plane structure for a printed circuit board includes a copper layer, and a carbon layer applied directly to a surface of the copper layer. The carbon layer can include graphite or graphene. In additional embodiments, a duplicate power plane structure for a printed circuit board includes two power planes separated by an insulating core, each power plane including a copper layer and a carbon layer applied directly to a surface of the copper layer.
    Type: Grant
    Filed: August 28, 2020
    Date of Patent: December 14, 2021
    Assignee: CISCO TECHNOLOGY, INC.
    Inventors: Joel Goergen, Jessica Kiefer, Alpesh Umakant Bhobe, Kameron Rose Hurst, D. Brice Achkir, Amendra Koul, Scott Hinaga, David Nozadze
  • Publication number: 20210382967
    Abstract: An apparatus includes a printed circuit board (PCB) that includes a woven glass laminate layer. The woven glass laminate layer includes a plurality of glass bundles woven together, where a marker structure including at least one marker is defined within the woven glass laminate layer. A security chip is coupled with the PCB and includes memory that stores an authentication identifier of the PCB, where the authentication ID includes a representation of the marker structure.
    Type: Application
    Filed: July 30, 2020
    Publication date: December 9, 2021
    Inventors: Joel Goergen, Sam Gupta, Dylan Thomas Walker, Chirag K. Shroff, Christopher Shannon Gourley, Rachel Marie Weeks, Elizabeth Ann Kochuparambil, Ronald Lee Shaffer II
  • Patent number: 11184688
    Abstract: A system includes a tray, where the tray includes a rail and a bracket that secures the rail to a networking device such that the rail is distanced from a surface of the networking device. A support post is removably coupled to the rail. The support post includes a first support member and a second support member vertically displaced from the first support member, where each of the first and second support members includes a support structure that supports a cable connected with a port at the surface of the networking device and routes the cable away from the networking device to another location distanced from the networking device. The cable supported by the first support member is separated and segregated from the cable supported by the second support member. With minimal touch, a support post can be moved from one location to another along the rail.
    Type: Grant
    Filed: November 4, 2019
    Date of Patent: November 23, 2021
    Assignee: CISCO TECHNOLOGY, INC.
    Inventors: Rohit Dev Gupta, Joel Goergen, Arjun Guzar Jayaprakash, Naveen Kumar Bangalore Shiva Kumar
  • Publication number: 20210337657
    Abstract: A conductive signal transmission structure for an electronic device (e.g., a printed circuit board of an electronic device) includes a copper material and a graphene layer disposed within the copper material at a depth below a surface of the structure. The depth of the graphene layer is further within a skin depth region of the structure when a transmission signal is applied to the structure that is in the GHz frequency range.
    Type: Application
    Filed: October 26, 2020
    Publication date: October 28, 2021
    Inventors: Joel Goergen, Scott Hinaga, Jessica Kiefer, Alpesh Umakant Bhobe, D. Brice Achkir, David Nozadze, Amendra Koul, Mehmet Onder Cap, Madeline Marie Roemer
  • Publication number: 20210334862
    Abstract: A system includes a millimeter (MM) wave radar detector, where the MM wave radar detector generates signal data associated with a person of interest (POI) within a field of view of the MM wave radar detector. The system further includes an Access Point (AP) coupled with the MM wave radar detector. The AP includes a computing device to receive and analyze the signal data provided by the MM wave radar detector to determine a movement or action of the POI within the field of view, and facilitate generation of a feedback response in response to the determined movement or action of the POI.
    Type: Application
    Filed: July 15, 2020
    Publication date: October 28, 2021
    Inventors: Joel Goergen, Kameron Rose Hurst, John Scott Scheeler, Alpesh Umakant Bhobe, Dylan Thomas Walker, Aaron P. Tondra
  • Publication number: 20210337666
    Abstract: A power plane structure for a printed circuit board includes a copper layer, and a carbon layer applied directly to a surface of the copper layer. The carbon layer can include graphite or graphene. In additional embodiments, a duplicate power plane structure for a printed circuit board includes two power planes separated by an insulating core, each power plane including a copper layer and a carbon layer applied directly to a surface of the copper layer.
    Type: Application
    Filed: August 28, 2020
    Publication date: October 28, 2021
    Inventors: Joel Goergen, Jessica Kiefer, Alpesh Umakant Bhobe, Kameron Rose Hurst, D. Brice Achkir, Amendra Koul, Scott Hinaga, David Nozadze