Patents by Inventor Joel Richard

Joel Richard has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20250151198
    Abstract: Techniques to move high current power distribution layers for integrated circuit core power and serializer-deserializer (SERDES) power into a center area of the integrated circuit footprint. This provides a more reliable and higher current distribution into the center of a large integrated circuit footprint, without causing disruption of high speed signal routing or increased signal integrity burden to the high speed signals. Arrangements and methods for routing out the core power area of a main printed circuit board under an integrated circuit and replacing it with a custom power printed circuit board (power plug) that is attached by a metalized paste sintering process. This provides a more reliable and higher current distribution into the center of a large integrated circuit or other high-power component, without causing disruption of high speed signal routing.
    Type: Application
    Filed: February 7, 2024
    Publication date: May 8, 2025
    Inventors: Joel Richard Goergen, Elizabeth Kochuparambil, Scott Hinaga, Kameron Rose Hurst, Mike Sapozhnikov, Shobhana Punjabi, David Nozadze, Marco Croci
  • Publication number: 20250147090
    Abstract: In one embodiment, a method generally comprises monitoring real-time electrical data at Power Sourcing Equipment (PSE) transmitting power over a cable to a Powered Device (PD), calculating thermal characteristics for the cable based on the monitored data, and periodically updating the thermal characteristics based on the monitored data. The power comprises multi-phase pulse power, the data comprises voltage and current measured for each phase of the multi-phase pulse power, and the voltage is greater than 60 volts at the PSE.
    Type: Application
    Filed: January 8, 2025
    Publication date: May 8, 2025
    Inventors: Joel Richard Goergen, Chad M. Jones, Christopher Daniel Bullock, Dylan T. Walker
  • Publication number: 20250147256
    Abstract: A device is provided that includes a printed circuit board and an integrated circuit that is installed on the printed circuit board. A plurality of optical transceiver modules are positioned on the printed circuit board around three or more sides of the integrated circuit. The plurality of optical transceiver modules are to be in operable communication with the integrated circuit. A faceplate is installed that has multiple face portions that expose receptacles for the plurality of optical transceiver modules around the integrated circuit.
    Type: Application
    Filed: February 6, 2024
    Publication date: May 8, 2025
    Inventors: Joel Richard Goergen, Giovanni Giobbio, Krishnagopal Goswami, Prashanth Pavithran, Marco Croci, Meir Peleg, Vic Hong Chia, Hua Yang, Mete Yilmaz, Xin Mao
  • Publication number: 20250140447
    Abstract: Techniques are provided to mitigate serializer-deserializer performance limiting positive/negative (P/N) skew issues in high-speed cable channels. This may be achieved by adding stripes with low/high dielectric constant (dk) material compared to the main dielectric surrounding cable wires. By adding strips/stripes in the main dielectric, a non-homogeneous dielectric structure is created, and this results in greater coupling between the signal conductors in the cable, which in turn reduces skew impact. This may be useful in twinaxial cables as well as stripline printed circuit boards.
    Type: Application
    Filed: January 22, 2024
    Publication date: May 1, 2025
    Inventors: Mike Sapozhnikov, Amendra Koul, David Nozadze, Joel Richard Goergen, Sayed Ashraf Mamun, Upen Reddy Kareti
  • Publication number: 20250140292
    Abstract: Embodiments of the present invention provide systems, methods, and computer storage media for cutting down a user's larger input video into an edited video comprising the most important video segments and applying corresponding video effects. Some embodiments of the present invention are directed to adding face-aware scale magnification to the trimmed video (e.g., applying scale magnification to simulate a camera zoom effect that hides shot cuts with respect to the subject's face). For example, as the trimmed video transitions from one video segment to the next video segment, a scale magnification may be applied that zooms in on a detected face at a boundary between the video segments to smooth the transition between video segments.
    Type: Application
    Filed: February 2, 2024
    Publication date: May 1, 2025
    Inventors: Anh Lan TRUONG, Deepali ANEJA, Hijung SHIN, Rubaiat HABIB, Jakub FISER, Kishore RADHAKRISHNA, Joel Richard BRANDT, Matthew David FISHER, Zeyu JIN, Kim Pascal PIMMEL, Wilmot LI, Lubomira Assenova DONTCHEVA
  • Publication number: 20250133652
    Abstract: In some embodiments, an apparatus includes a layer of a printed circuit board (PCB), a pair of signal vias formed on the layer of the PCB and including a first signal via a second signal via each configured to propagate a respective signal, a first plurality of ground vias formed on the layer and at least partially circumferentially surrounding the first signal via of the pair of signal vias, and a second plurality of ground vias formed on the layer and at least partially circumferentially surrounding the second signal via of the pair of signal vias. The first plurality of ground vias and the second plurality of ground vias include a shared ground via.
    Type: Application
    Filed: December 7, 2023
    Publication date: April 24, 2025
    Inventors: Yuqing Zhu, Wenbin Ma, Mike Sapozhnikov, Weiying Ding, Mingjian Gao, Mingtong Zuo, David Nozadze, Joel Richard Goergen
  • Publication number: 20250126552
    Abstract: Devices, systems, methods, and processes for feature level power calibration are described herein. Network devices include sensors that generate sensor readings indicative of various device parameters. A calibration logic utilizes the sensor readings and feature permutations associated with the sensor readings to predict a feature level power consumption for all features of the network device. The calibration logic then applies a calibration factor to the predicted feature level power consumption and obtains an actual feature level power consumption. Using the actual feature level power consumption, the calibration logic determines an actual power consumption for feature licenses of the network device. The feature and feature license level power consumption is utilized for determining which features or feature licenses can be deactivated when the device power consumption is outside a threshold limit. Such dynamic deactivation ensures that the network device accurately meets the sustainability goals.
    Type: Application
    Filed: May 14, 2024
    Publication date: April 17, 2025
    Inventors: Marisol Palmero Amador, Snezana Mitrovic, Derek W. Engi, Gonzalo A. Salgueiro, Joel Richard Goergen
  • Patent number: 12275320
    Abstract: In one embodiment, an apparatus includes a power source and a moveable charging arm coupled to the power source and comprising a charging plate for contact with an electric vehicle contact plate. The charging arm is operable to transmit direct current (DC) pulse power with testing performed between high voltage pulses directly from the charging plate to the electric vehicle contact plate to charge one or more batteries at the electric vehicle. A method for charging the electric vehicle is also disclosed herein.
    Type: Grant
    Filed: June 8, 2023
    Date of Patent: April 15, 2025
    Inventors: Joel Richard Goergen, Chad M. Jones, Robert Gregory Twiss
  • Publication number: 20250105544
    Abstract: The present embodiments are directed to a system with a first power assembly having a first power enclosure configured to attach to an optical plug and a first power connector disposed in the first power enclosure, as well as a second power assembly having a second power enclosure configured to attach to an optical enclosure that is configured to receive the optical plug and a second power connector disposed in the second power enclosure. The first power connector and the second power connector are configured to couple to each other.
    Type: Application
    Filed: January 18, 2024
    Publication date: March 27, 2025
    Inventors: Joel Richard Goergen, Chad M. Jones, Jason Dewayne Potterf, Mala Krishnan
  • Publication number: 20250107055
    Abstract: Presented herein is a printed circuit board (PCB) assembly with an absorber having a perforated structure. The absorber is positioned between a trace of a PCB and a connector that couples the PCB to an enclosure. The absorber includes a perforated structure to maintain an integrity of a signal propagated along the trace, while improving electromagnetic interference and/or electromagnetic compatibility properties.
    Type: Application
    Filed: December 20, 2023
    Publication date: March 27, 2025
    Inventors: Wenbin Ma, Shiqing He, Yong Wu, Joel Richard Goergen, Mike Sapozhnikov, Xinghai Tang, Dewen Xu, Haiying Zhu
  • Patent number: 12261446
    Abstract: In one embodiment, a power system includes a power panel operable to distribute alternating current (AC) power and pulse power to a plurality of power outlets and having an AC circuit breaker and a pulse power circuit breaker, the pulse power comprising a sequence of pulses alternating between a low direct current (DC) voltage state and a high DC voltage state, a power inverter and converter coupled to the power panel through an AC power connection and a pulse power connection and including a DC power input for receiving DC power from a renewable energy source, an AC power input for receiving AC power, and a connection to an energy storage device, and a power controller in communication with the power inverter and converter and operable to balance power load and allocate power received at the DC power input and the AC power input to the power panel.
    Type: Grant
    Filed: June 23, 2023
    Date of Patent: March 25, 2025
    Assignee: CISCO TECHNOLOGY, INC.
    Inventors: Joel Richard Goergen, Chad M. Jones
  • Patent number: 12259420
    Abstract: In one embodiment, a method includes receiving at a thermal modeling module, data from a Power Sourcing Equipment device (PSE) for cables extending from the PSE to Powered Devices (PDs), the cables configured to transmit power and data from the PSE to the PDs, calculating at the thermal modeling module, thermal characteristics for the cables based on the data, and identifying a thermal rise above a specified threshold at one of the cables. The data comprises real-time electrical data for the cables. An apparatus and logic are also disclosed herein.
    Type: Grant
    Filed: June 2, 2023
    Date of Patent: March 25, 2025
    Assignee: CISCO TECHNOLOGY, INC.
    Inventors: Joel Richard Goergen, Chad M. Jones, Christopher Daniel Bullock, Dylan T. Walker
  • Publication number: 20250097060
    Abstract: In one embodiment, a method includes transmitting pulse power on two wire pairs, the pulse power comprising a plurality of high voltage pulses with the high voltage pulses on the wire pairs offset between the wire pairs to provide continuous power, performing low voltage fault detection on each of the wire pairs between the high voltage pulses, and transmitting data on at least one of the wire pairs during transmittal of the high voltage pulses. Data transmittal is suspended during the low voltage fault detection.
    Type: Application
    Filed: November 27, 2024
    Publication date: March 20, 2025
    Inventors: Chad M. Jones, Joel Richard Goergen, George Allan Zimmerman, Richard Anthony O'Brien, Douglas Paul Arduini, Jason DeWayne Potterf, Sung Kee Baek
  • Publication number: 20250088112
    Abstract: In one embodiment, a method includes transmitting multi-phase pulse power from power sourcing equipment to a powered device in a data center, wherein the multi-phase pulse power comprises multiple phases of power delivered in a sequence of pulses defined by alternating low direct current voltage states and high direct current voltage states, and synchronizing the pulses at the power sourcing equipment with the pulses at the powered device.
    Type: Application
    Filed: November 25, 2024
    Publication date: March 13, 2025
    Inventors: Richard Anthony O'Brien, Joel Richard Goergen, Chad M. Jones, Jason DeWayne Potterf, George Allan Zimmerman
  • Patent number: 12237773
    Abstract: In one embodiment, a method includes transmitting multi-phase pulse power from power sourcing equipment to a powered device in a data center, wherein the multi-phase pulse power comprises multiple phases of power delivered in a sequence of pulses defined by alternating low direct current voltage states and high direct current voltage states, and synchronizing the pulses at the power sourcing equipment with the pulses at the powered device.
    Type: Grant
    Filed: December 13, 2023
    Date of Patent: February 25, 2025
    Assignee: CISCO TECHNOLOGY, INC.
    Inventors: Richard Anthony O'Brien, Joel Richard Goergen, Chad M. Jones, Jason DeWayne Potterf, George Allan Zimmerman
  • Publication number: 20250063658
    Abstract: In some embodiments, an apparatus, includes a pad of a printed circuit board (PCB) configured to couple to an electrical component separate from the PCB and a via formed through the pad. The via is offset from a center of the pad such that a distance between the via and a most adjacent trace electrically separate from the via is above a threshold distance.
    Type: Application
    Filed: August 15, 2023
    Publication date: February 20, 2025
    Inventors: Mike Sapozhnikov, David Nozadze, Joel Richard Goergen, Wenbin Ma, Upen Reddy Kareti, Weiying Ding
  • Patent number: 12218770
    Abstract: In one embodiment, a method includes transmitting pulse power on two wire pairs, the pulse power comprising a plurality of high voltage pulses with the high voltage pulses on the wire pairs offset between the wire pairs to provide continuous power, performing low voltage fault detection on each of the wire pairs between the high voltage pulses, and transmitting data on at least one of the wire pairs during transmittal of the high voltage pulses. Data transmittal is suspended during the low voltage fault detection.
    Type: Grant
    Filed: October 13, 2023
    Date of Patent: February 4, 2025
    Assignee: CISCO TECHNOLOGY, INC.
    Inventors: Chad M. Jones, Joel Richard Goergen, George Allan Zimmerman, Richard Anthony O'Brien, Douglas Paul Arduini, Jason DeWayne Potterf, Sung Kee Baek
  • Publication number: 20250038462
    Abstract: Presented herein are techniques for connectors, apparatuses, and system with connectors for data and power. A connector at an end of the network cable can be configured to mate with a port in a device. The connector can include a set of data pins for connecting data wires in the network cable to the port. The connector can include a set of power pins for connecting power wires in the network cable to the port. The set of power pins can carry a higher electrical power than that carried by the set of data pins. A first spacing between adjacent power pins in the set of power pins has at least a minimum distance to reduce voltage breakdown between the adjacent power pins in the set of power pin.
    Type: Application
    Filed: July 27, 2023
    Publication date: January 30, 2025
    Inventors: George Allan Zimmerman, Chad M. Jones, Jason Dewayne Potterf, Joel Richard Goergen, Elizabeth Kochuparambil
  • Publication number: 20250038494
    Abstract: A power distribution unit (PDU) includes a housing configured to be mounted into or on a rack that has a plurality of shelf positions for a variety of computing equipment, networking equipment or data storage equipment. The PDU includes power inputs. The power inputs are configured to receive one or more of: alternating current (AC) power, high voltage direct current (DC) power, single-phase fault managed power, or multi-phase fault managed power. The PDU further includes at least one fault managed power module configured to be contained in the housing, the at least one fault managed power module including a power transmitter configured to generate single-phase or multi-phase fault managed power from the AC power and/or high voltage DC power. The PDU also includes a plurality of connectors on the housing and configured to provide cable connections to one or more of the plurality of shelf positions of the rack.
    Type: Application
    Filed: July 27, 2023
    Publication date: January 30, 2025
    Inventors: Chad M. Jones, Jason Dewayne Potterf, Joel Richard Goergen, Elizabeth Kochuparambil, Douglas Paul Arduini
  • Publication number: 20250039039
    Abstract: Presented herein are techniques for preventing an electrical arc upon disconnect of a network cable. A method can include monitoring a network cable connected to a device for faults at a remote location from a connector of the network cable by observing conditions on the network cable of power applied to the network cable, wherein the network cable is for sending data and power. The method can further include detecting a fault on the network cable, wherein the fault was introduced intentionally at the connector prior to disconnecting the connector from the device. The method can further include terminating power at the remote location that is sent over the network cable to prevent an electrical arc upon disconnecting the connector from the device.
    Type: Application
    Filed: July 27, 2023
    Publication date: January 30, 2025
    Inventors: George Allan Zimmerman, Chad M. Jones, Jason Dewayne Potterf, Joel Richard Goergen, Elizabeth Kochuparambil