Abstract: A device is provided that includes a printed circuit board having a top surface, a first trace disposed directly on the top surface of the printed circuit board, and a second trace disposed directly on the top surface of the printed circuit board adjacent the first trace. A first metal dome is positioned over the first trace and is configured to block crosstalk between the first trace and the second trace.

Abstract: Devices, networks, systems, methods, and processes for standardizing power usage measurement in various devices, components, etc. Measurement methods for power verification in AC or DC input power are often over simplified or done with a method that achieves inaccurate or highly suspect results. Different testing methods for the same device to be verified are often used, resulting in lack of consistency and any sense of accuracy and/or relevance. Part of this problem is the lack of unified electrical measuring and changes in operation based on network usage and ambient temperature. Thus, various embodiments described herein are directed to generating standardized power usage data and charts that can indicate a more accurate power usage level of an apparatus. This can allow for more effective network managing decisions and increase overall network sustainability.

Abstract: A multi-lamination stack up structure that separates high speed routing and the power delivery plane. The multi-lamination stack up structure includes M+N layers. The M layers are located on the top of the PCB and focus on high speed design routing. The N layers are located on the bottom of the PCB and are used for the power plane. In one implementation, the PCB uses a through hole or VIA for M+N layers power connection at the chip ball grid array area.

Abstract: Described herein are devices, systems, methods, and processes for an efficient liquid cooling system for electronic components mounted on a printed circuit board (PCB). The system utilizes PCB through holes to carry a liquid coolant. The cooling system includes a coolant loop through which a pump circulates the coolant. A cooling sub-assembly includes a cooling channel thermally coupled to the component to be cooled. The cooling sub-assembly further includes a coolant supply PCB through hole that carries the cooled coolant from a supply manifold on the bottom side of the PCB to the cooling channel on the top side of the PCB and a coolant return PCB through hole that carries the heated coolant from the cooling channel to the return manifold on the bottom side of the PCB. The cooling system includes a control system for coolant distribution that can react to component temperatures.

Abstract: Methods for operating a power transmitter and a power receiver to enable selection of one of a plurality of power modes in a coordinated manner, as needed by a power receiver. The plurality of power modes may include fault managed power modes at different voltages, at least one non-fault managed power mode and an alternating current (AC) power mode.

Abstract: A power transceiver with bi-directional fault managed power is provided that enable role reversals and fault detections. Specifically, a method is provided in which a first power transceiver detects whether a fault is present on one or more wires. The first power transceiver is configured to transmit power over the one or more wires from a power source device to a second power transceiver. The method further includes determining whether the fault is an intentional fault generated by the second power transceiver and controlling the first power transceiver to switch to a receiver mode for receiving the power over the one or more wires from the second power transceiver based on determining that the fault is the intentional fault.

Abstract: In one embodiment, a thermal management device includes a heat sink base and heat sink fins comprising a single element formed from a plurality of graphene layers with carbon nanotubes interposed between the graphene layers. A method is also disclosed herein.

Abstract: A system is provided for a multi-drop overhead charging of electric vehicles and fault managed power distribution. The system includes at least two overhead wires that extend over a predetermined distance and are configured to bidirectionally distribute power among one or more electric vehicles. The system further includes a mounting arrangement configured to support the at least two overhead wires at a predetermined level above ground and one or more connection interfaces. Each connection interface is configured to contact the at least two overhead wires and connect to a respective electric vehicle to charge a battery therein or to obtain the power from the battery and provide the power to the at least two overhead wires to charge another battery of another electric vehicle.

Abstract: In some aspects, the techniques described herein relate to a printed circuit board, comprising a layer, a first trace coupled to the layer and carrying a first signal; a second trace coupled to the layer and carrying a second signal; and a loss introducing feature that creates an additional signal loss in one of the first trace or the second trace, wherein the additional signal loss balances a first signal loss and a second signal loss.

Abstract: In one embodiment, a method generally comprises monitoring real-time electrical data at Power Sourcing Equipment (PSE) transmitting power over a cable to a Powered Device (PD), calculating thermal characteristics for the cable based on the monitored data, and periodically updating the thermal characteristics based on the monitored data. The power comprises multi-phase pulse power, the data comprises voltage and current measured for each phase of the multi-phase pulse power, and the voltage is greater than 60 volts at the PSE.

Abstract: Techniques to move high current power distribution layers for integrated circuit core power and serializer-deserializer (SERDES) power into a center area of the integrated circuit footprint. This provides a more reliable and higher current distribution into the center of a large integrated circuit footprint, without causing disruption of high speed signal routing or increased signal integrity burden to the high speed signals. Arrangements and methods for routing out the core power area of a main printed circuit board under an integrated circuit and replacing it with a custom power printed circuit board (power plug) that is attached by a metalized paste sintering process. This provides a more reliable and higher current distribution into the center of a large integrated circuit or other high-power component, without causing disruption of high speed signal routing.

Abstract: A device is provided that includes a printed circuit board and an integrated circuit that is installed on the printed circuit board. A plurality of optical transceiver modules are positioned on the printed circuit board around three or more sides of the integrated circuit. The plurality of optical transceiver modules are to be in operable communication with the integrated circuit. A faceplate is installed that has multiple face portions that expose receptacles for the plurality of optical transceiver modules around the integrated circuit.

Abstract: Techniques are provided to mitigate serializer-deserializer performance limiting positive/negative (P/N) skew issues in high-speed cable channels. This may be achieved by adding stripes with low/high dielectric constant (dk) material compared to the main dielectric surrounding cable wires. By adding strips/stripes in the main dielectric, a non-homogeneous dielectric structure is created, and this results in greater coupling between the signal conductors in the cable, which in turn reduces skew impact. This may be useful in twinaxial cables as well as stripline printed circuit boards.

Abstract: In some embodiments, an apparatus includes a layer of a printed circuit board (PCB), a pair of signal vias formed on the layer of the PCB and including a first signal via a second signal via each configured to propagate a respective signal, a first plurality of ground vias formed on the layer and at least partially circumferentially surrounding the first signal via of the pair of signal vias, and a second plurality of ground vias formed on the layer and at least partially circumferentially surrounding the second signal via of the pair of signal vias. The first plurality of ground vias and the second plurality of ground vias include a shared ground via.

Abstract: Devices, systems, methods, and processes for feature level power calibration are described herein. Network devices include sensors that generate sensor readings indicative of various device parameters. A calibration logic utilizes the sensor readings and feature permutations associated with the sensor readings to predict a feature level power consumption for all features of the network device. The calibration logic then applies a calibration factor to the predicted feature level power consumption and obtains an actual feature level power consumption. Using the actual feature level power consumption, the calibration logic determines an actual power consumption for feature licenses of the network device. The feature and feature license level power consumption is utilized for determining which features or feature licenses can be deactivated when the device power consumption is outside a threshold limit. Such dynamic deactivation ensures that the network device accurately meets the sustainability goals.

Abstract: In one embodiment, an apparatus includes a power source and a moveable charging arm coupled to the power source and comprising a charging plate for contact with an electric vehicle contact plate. The charging arm is operable to transmit direct current (DC) pulse power with testing performed between high voltage pulses directly from the charging plate to the electric vehicle contact plate to charge one or more batteries at the electric vehicle. A method for charging the electric vehicle is also disclosed herein.

Abstract: The present embodiments are directed to a system with a first power assembly having a first power enclosure configured to attach to an optical plug and a first power connector disposed in the first power enclosure, as well as a second power assembly having a second power enclosure configured to attach to an optical enclosure that is configured to receive the optical plug and a second power connector disposed in the second power enclosure. The first power connector and the second power connector are configured to couple to each other.

Abstract: Presented herein is a printed circuit board (PCB) assembly with an absorber having a perforated structure. The absorber is positioned between a trace of a PCB and a connector that couples the PCB to an enclosure. The absorber includes a perforated structure to maintain an integrity of a signal propagated along the trace, while improving electromagnetic interference and/or electromagnetic compatibility properties.

Abstract: In one embodiment, a power system includes a power panel operable to distribute alternating current (AC) power and pulse power to a plurality of power outlets and having an AC circuit breaker and a pulse power circuit breaker, the pulse power comprising a sequence of pulses alternating between a low direct current (DC) voltage state and a high DC voltage state, a power inverter and converter coupled to the power panel through an AC power connection and a pulse power connection and including a DC power input for receiving DC power from a renewable energy source, an AC power input for receiving AC power, and a connection to an energy storage device, and a power controller in communication with the power inverter and converter and operable to balance power load and allocate power received at the DC power input and the AC power input to the power panel.

Abstract: In one embodiment, a method includes receiving at a thermal modeling module, data from a Power Sourcing Equipment device (PSE) for cables extending from the PSE to Powered Devices (PDs), the cables configured to transmit power and data from the PSE to the PDs, calculating at the thermal modeling module, thermal characteristics for the cables based on the data, and identifying a thermal rise above a specified threshold at one of the cables. The data comprises real-time electrical data for the cables. An apparatus and logic are also disclosed herein.