Patents by Inventor Joerg Siegert

Joerg Siegert has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 12100644
    Abstract: An intermetal dielectric and metal layers embedded in the intermetal dielectric are arranged on a substrate of semiconductor material. A via hole is formed in the substrate, and a metallization contacting a contact area of one of the metal layers is applied in the via hole. The metallization, the metal layer comprising the contact area and the intermetal dielectric are partially removed at the bottom of the via hole in order to form a hole penetrating the intermetal dielectric and extending the via hole. A continuous passivation is arranged on sidewalls within the via hole and the hole, and the metallization contacts the contact area around the hole. Thus the presence of a thin membrane of layers, which is usually formed at the bottom of a hollow through-substrate via, is avoided.
    Type: Grant
    Filed: December 20, 2019
    Date of Patent: September 24, 2024
    Assignee: AMS AG
    Inventors: Bernhard Loeffler, Thomas Bodner, Joerg Siegert
  • Patent number: 11697201
    Abstract: An exoskeleton system includes a first exoskeleton unit configured to support a first body part, a second exoskeleton unit configured to support a second body part, and a control device. The first exoskeleton unit and the second exoskeleton unit are mechanically decoupled from each other. The control device is configured to control, based on a control model, at least one of the first exoskeleton unit and the second exoskeleton unit. The control model is based on a multibody system that models the first exoskeleton unit, the second exoskeleton unit, and at least one of the first body part and the second body part.
    Type: Grant
    Filed: May 9, 2020
    Date of Patent: July 11, 2023
    Assignee: Universitaet Stuttgart
    Inventors: Joerg Siegert, Urs Schneider
  • Patent number: 11572271
    Abstract: The disclosure relates to a method for manufacturing a planarized etch-stop layer, ESL, for a hydrofluoric acid, HF, vapor phase etching process. The method includes providing a first planarized layer on top of a surface of a substrate, the first planarized layer having a patterned and structured metallic material and a filling material. The method further includes depositing on top of the first planarized layer the planarized ESL of an ESL material with low HF etch rate, wherein the planarized ESL has a low surface roughness and a thickness of less than 150 nm, in particular of less than 100 nm.
    Type: Grant
    Filed: May 8, 2019
    Date of Patent: February 7, 2023
    Assignee: AMS AG
    Inventors: Alessandro Faes, Sophie Guillemin, Joerg Siegert, Karl Tuttner
  • Patent number: 11535512
    Abstract: The disclosure relates to a method for manufacturing a planarized etch-stop layer, ESL, for a hydrofluoric acid, HF, vapor phase etching process. The method includes providing a first planarized layer on top of a surface of a substrate, the first planarized layer having a patterned and structured metallic material and a filling material. The method further includes depositing on top of the first planarized layer the planarized ESL of an ESL material with low HF etch rate, wherein the planarized ESL has a low surface roughness and a thickness of less than 150 nm, in particular of less than 100 nm.
    Type: Grant
    Filed: May 8, 2019
    Date of Patent: December 27, 2022
    Assignee: AMS AG
    Inventors: Alessandro Faes, Sophie Guillemin, Joerg Siegert, Karl Tuttner
  • Patent number: 11313749
    Abstract: In an embodiment a pressure sensor device includes a substrate body, a pressure sensor having a membrane and a cap body having at least one opening, wherein the pressure sensor is arranged between the substrate body and the cap body in a vertical direction which is perpendicular to a main plane of extension of the substrate body, and wherein the mass of the substrate body amounts to at least 80% of the mass of the cap body and at most 120% of the mass of the cap body.
    Type: Grant
    Filed: October 2, 2017
    Date of Patent: April 26, 2022
    Assignee: SCIOSENSE B.V.
    Inventors: Joerg Siegert, Willem Frederik Adrianus Besling, Coenraad Cornelis Tak, Martin Schrems, Franz Schrank
  • Patent number: 11271134
    Abstract: A method for manufacturing an optical sensor is provided. The method comprises providing an optical sensor arrangement which comprises at least two optical sensor elements on a carrier, where the optical sensor arrangement comprises a light entrance surface at the side of the optical sensor elements facing away from the carrier. The method further comprises forming a trench between two optical sensor elements in a vertical direction which is perpendicular to the main plane of extension of the carrier, where the trench extends from the light entrance surface of the sensor arrangement at least to the carrier. Moreover, the method comprises coating the trench with an opaque material, forming electrical contacts for the at least two optical sensor elements on a back side of the carrier facing away from the optical sensor elements, and forming at least one optical sensor by dicing the optical sensor arrangement along the trench.
    Type: Grant
    Filed: October 15, 2018
    Date of Patent: March 8, 2022
    Assignee: AMS AG
    Inventors: Gregor Toschkoff, Thomas Bodner, Franz Schrank, Miklos Labodi, Joerg Siegert, Martin Schrems
  • Publication number: 20220059434
    Abstract: An intermetal dielectric and metal layers embedded in the intermetal dielectric are arranged on a substrate of semiconductor material. A via hole is formed in the substrate, and a metallization contacting a contact area of one of the metal layers is applied in the via hole. The metallization, the metal layer comprising the contact area and the intermetal dielectric are partially removed at the bottom of the via hole in order to form a hole penetrating the intermetal dielectric and extending the via hole. A continuous passivation is arranged on sidewalls within the via hole and the hole, and the metallization contacts the contact area around the hole. Thus the presence of a thin membrane of layers, which is usually formed at the bottom of a hollow through-substrate via, is avoided.
    Type: Application
    Filed: December 20, 2019
    Publication date: February 24, 2022
    Inventors: Bernhard LOEFFLER, Thomas BODNER, Joerg SIEGERT
  • Patent number: 11107848
    Abstract: The semiconductor device for detection of radiation comprises a semiconductor substrate (1) with a main surface (11), a dielectric layer (6) comprising at least one compound of a semiconductor material, an integrated circuit (2) including at least one component sensitive to radiation (3), a wiring (4) of the integrated circuit embedded in an intermetal layer (8) of the dielectric layer (6), an electrically conductive through-substrate via (5) contacting the wiring, and an optical filter element (7) arranged immediately on the dielectric layer above the component sensitive to radiation. The dielectric layer comprises a passivation layer (9) at least above the through-substrate via, the passivation layer comprises a dielectric material that is different from the intermetal layer (8), and the wiring is arranged between the main surface and the passivation layer.
    Type: Grant
    Filed: February 24, 2014
    Date of Patent: August 31, 2021
    Assignee: AMS AG
    Inventors: Hubert Enichlmair, Franz Schrank, Joerg Siegert
  • Publication number: 20210214216
    Abstract: The disclosure relates to a method for manufacturing a planarized etch-stop layer, ESL, for a hydrofluoric acid, HF, vapor phase etching process. The method includes providing a first planarized layer on top of a surface of a substrate, the first planarized layer having a patterned and structured metallic material and a filling material. The method further includes comprises depositing on top of the first planarized layer the planarized ESL of an ESL material with low HF etch rate, wherein the planarized ESL has a low surface roughness and a thickness of less than 150 nm, in particular of less than 100 nm.
    Type: Application
    Filed: May 8, 2019
    Publication date: July 15, 2021
    Inventors: Alessandro FAES, Sophie GUILLEMIN, Joerg SIEGERT, Karl TUTTNER
  • Publication number: 20200346342
    Abstract: An exoskeleton system includes a first exoskeleton unit configured to support a first body part, a second exoskeleton unit configured to support a second body part, and a control device. The first exoskeleton unit and the second exoskeleton unit are mechanically decoupled from each other. The control device is configured to control, based on a control model, at least one of the first exoskeleton unit and the second exoskeleton unit. The control model is based on a multibody system that models the first exoskeleton unit, the second exoskeleton unit, and at least one of the first body part and the second body part.
    Type: Application
    Filed: May 9, 2020
    Publication date: November 5, 2020
    Inventors: Joerg SIEGERT, Urs SCHNEIDER
  • Publication number: 20200313031
    Abstract: A method for manufacturing an optical sensor is provided. The method comprises providing an optical sensor arrangement which comprises at least two optical sensor elements on a carrier, where the optical sensor arrangement comprises a light entrance surface at the side of the optical sensor elements facing away from the carrier. The method further comprises forming a trench between two optical sensor elements in a vertical direction which is perpendicular to the main plane of extension of the carrier, where the trench extends from the light entrance surface of the sensor arrangement at least to the carrier. Moreover, the method comprises coating the trench with an opaque material, forming electrical contacts for the at least two optical sensor elements on a back side of the carrier facing away from the optical sensor elements, and forming at least one optical sensor by dicing the optical sensor arrangement along the trench.
    Type: Application
    Filed: October 15, 2018
    Publication date: October 1, 2020
    Inventors: Gregor TOSCHKOFF, Thomas BODNER, Franz SCHRANK, Miklos LABODI, Joerg SIEGERT, Martin SCHREMS
  • Patent number: 10684412
    Abstract: A semiconductor device has a semiconductor substrate and a first metallization stack arranged on the substrate. The substrate has and/or carries a plurality of electronic circuit elements. The first metallization stack has electrically insulating layers and at least one metallization layer. The semiconductor device further has a second metallization stack arranged on the first metallization stack and comprising further electrically insulating layers and an optical waveguide layer. The optical waveguide layer has at least one optical waveguide structure. Furthermore, one of the electrically insulating layers and one of the further electrically insulating layers are in direct contact with each other and form a pair of directly bonded layers.
    Type: Grant
    Filed: August 25, 2016
    Date of Patent: June 16, 2020
    Assignee: ams AG
    Inventors: Jochen Kraft, Joerg Siegert
  • Patent number: 10644047
    Abstract: A top surface of a substrate is provided with a detection element for detecting electromagnetic radiation. A refractive element is formed by a portion of a cover element, which is attached to the substrate, so that the refractive element is arranged facing the detection element. The refractive element may be arranged within a recess of the cover element, so that a cavity is formed between the detection element and the refraction element.
    Type: Grant
    Filed: December 15, 2016
    Date of Patent: May 5, 2020
    Assignee: ams AG
    Inventors: Jens Hofrichter, Franz Schrank, Joerg Siegert
  • Publication number: 20190265119
    Abstract: A pressure sensor device comprises a substrate body, a pressure sensor comprising a membrane, and a cap body comprising at least one opening. The pressure sensor is arranged between the substrate body and the cap body in a vertical direction which is perpendicular to the main plane of extension of the substrate body, and the mass of the substrate body equals approximately the mass of the cap body. Furthermore, a method for forming a pressure sensor device is provided.
    Type: Application
    Filed: October 2, 2017
    Publication date: August 29, 2019
    Inventors: Joerg Siegert, Willem Frederik Adrianus Besling, Coenraad Cornelis Tak, Martin SCHREMS, FRANZ SCHRANK
  • Patent number: 10332931
    Abstract: The semiconductor device comprises a semiconductor wafer with an integrated circuit, formed by a plurality of dies, a further semiconductor wafer, which differs from the semiconductor wafer in diameter and semiconductor material, the semiconductor wafer and the further semiconductor wafer being bonded to one another by means of a bonding layer, and an electrically conductive contact layer arranged on the further semiconductor wafer opposite to the bonding layer.
    Type: Grant
    Filed: March 9, 2017
    Date of Patent: June 25, 2019
    Assignee: ams AG
    Inventors: Cathal Cassidy, Joerg Siegert, Franz Schrank
  • Patent number: 10283541
    Abstract: A photosensor (2) is arranged in a semiconductor substrate (1) at a main surface (10), a dielectric layer (4) is arranged on or above the main surface, the dielectric layer including a metal layer (6) electrically connected with the photosensor, and an aperture layer (16) formed from an opaque or semitransparent material is arranged on or above the dielectric layer. The aperture layer is provided with an array of transparent aperture zones (18) above the photosensor, each of the aperture zones penetrating the aperture layer.
    Type: Grant
    Filed: November 9, 2015
    Date of Patent: May 7, 2019
    Assignee: ams AG
    Inventors: Joerg Siegert, Franz Schrank, Martin Schrems
  • Publication number: 20190035835
    Abstract: A top surface of a substrate is provided with a detection element for detecting electromagnetic radiation. A refractive element is formed by a portion of a cover element, which is attached to the substrate, so that the refractive element is arranged facing the detection element. The refractive element may be arranged within a recess of the cover element, so that a cavity is formed between the detection element and the refraction element.
    Type: Application
    Filed: December 15, 2016
    Publication date: January 31, 2019
    Inventors: Jens HOFRICHTER, Franz SCHRANK, Joerg SIEGERT
  • Publication number: 20190025505
    Abstract: A semiconductor device has a semiconductor substrate and a first metallization stack arranged on the substrate. The substrate has and/or carries a plurality of electronic circuit elements. The first metallization stack has electrically insulating layers and at least one metallization layer. The semiconductor device further has a second metallization stack arranged on the first metallization stack and comprising further electrically insulating layers and an optical waveguide layer. The optical waveguide layer has at least one optical waveguide structure. Furthermore, one of the electrically insulating layers and one of the further electrically insulating layers are in direct contact with each other and form a pair of directly bonded layers.
    Type: Application
    Filed: August 25, 2016
    Publication date: January 24, 2019
    Applicant: ams AG
    Inventors: Jochen KRAFT, Joerg SIEGERT
  • Patent number: 9991177
    Abstract: According to the improved concept, a method for analyzing a semiconductor element comprising polymer residues located on a surface of the semiconductor element is provided. The method comprises marking at least a fraction of the residues by exposing the semiconductor element to a fluorescent substance and detecting the marked residues by visualizing the marked residues on the surface of the semiconductor element using fluorescence microscopy.
    Type: Grant
    Filed: November 29, 2017
    Date of Patent: June 5, 2018
    Assignee: ams AG
    Inventors: Helene Gehles, Thomas Bodner, Joerg Siegert
  • Publication number: 20180090393
    Abstract: According to the improved concept, a method for analyzing a semiconductor element comprising polymer residues located on a surface of the semiconductor element is provided. The method comprises marking at least a fraction of the residues by exposing the semiconductor element to a fluorescent substance and detecting the marked residues by visualizing the marked residues on the surface of the semiconductor element using fluorescence microscopy.
    Type: Application
    Filed: November 29, 2017
    Publication date: March 29, 2018
    Inventors: Helene GEHLES, Thomas BODNER, Joerg SIEGERT