Patents by Inventor Joerg Siegert

Joerg Siegert has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20200348198
    Abstract: Capacitive pressure sensors and other devices are disclosed. In an embodiment a semiconductor device includes a first electrode, a cavity over the first electrode and a second electrode including a suspended membrane over the cavity and electrically conductive anchor trenches laterally surrounding the cavity, wherein the anchor trenches include an inner anchor trench and an outer anchor trench, the outer anchor trench having rounded corners.
    Type: Application
    Filed: November 16, 2018
    Publication date: November 5, 2020
    Inventors: Willem Frederik Adrianus Besling, Casper Van Der Avoort, Remco Henricus Wilhelmus Pijnenburg, Olaf Wunnicke, Jörg Siegert, Alessandro Faes
  • Publication number: 20200346342
    Abstract: An exoskeleton system includes a first exoskeleton unit configured to support a first body part, a second exoskeleton unit configured to support a second body part, and a control device. The first exoskeleton unit and the second exoskeleton unit are mechanically decoupled from each other. The control device is configured to control, based on a control model, at least one of the first exoskeleton unit and the second exoskeleton unit. The control model is based on a multibody system that models the first exoskeleton unit, the second exoskeleton unit, and at least one of the first body part and the second body part.
    Type: Application
    Filed: May 9, 2020
    Publication date: November 5, 2020
    Inventors: Joerg SIEGERT, Urs SCHNEIDER
  • Publication number: 20200340875
    Abstract: A capacitive sensor is disclosed. In an embodiment a semiconductor device includes a die including a capacitive pressure sensor integrated on a CMOS circuit, wherein the capacitive pressure sensor includes a first electrode and a second electrode separated from one another by a cavity, the second electrode including a suspended tensile membrane, and wherein the first electrode is composed of one or more aluminum-free layers containing Ti.
    Type: Application
    Filed: January 10, 2019
    Publication date: October 29, 2020
    Inventors: Willem Frederik Adrianus Besling, Remco Henricus Wilhelmus Pijnenburg, Kailash Vijayakumar, Jörg Siegert, Alessandro Faes
  • Publication number: 20200313031
    Abstract: A method for manufacturing an optical sensor is provided. The method comprises providing an optical sensor arrangement which comprises at least two optical sensor elements on a carrier, where the optical sensor arrangement comprises a light entrance surface at the side of the optical sensor elements facing away from the carrier. The method further comprises forming a trench between two optical sensor elements in a vertical direction which is perpendicular to the main plane of extension of the carrier, where the trench extends from the light entrance surface of the sensor arrangement at least to the carrier. Moreover, the method comprises coating the trench with an opaque material, forming electrical contacts for the at least two optical sensor elements on a back side of the carrier facing away from the optical sensor elements, and forming at least one optical sensor by dicing the optical sensor arrangement along the trench.
    Type: Application
    Filed: October 15, 2018
    Publication date: October 1, 2020
    Inventors: Gregor TOSCHKOFF, Thomas BODNER, Franz SCHRANK, Miklos LABODI, Joerg SIEGERT, Martin SCHREMS
  • Patent number: 10684412
    Abstract: A semiconductor device has a semiconductor substrate and a first metallization stack arranged on the substrate. The substrate has and/or carries a plurality of electronic circuit elements. The first metallization stack has electrically insulating layers and at least one metallization layer. The semiconductor device further has a second metallization stack arranged on the first metallization stack and comprising further electrically insulating layers and an optical waveguide layer. The optical waveguide layer has at least one optical waveguide structure. Furthermore, one of the electrically insulating layers and one of the further electrically insulating layers are in direct contact with each other and form a pair of directly bonded layers.
    Type: Grant
    Filed: August 25, 2016
    Date of Patent: June 16, 2020
    Assignee: ams AG
    Inventors: Jochen Kraft, Joerg Siegert
  • Patent number: 10644047
    Abstract: A top surface of a substrate is provided with a detection element for detecting electromagnetic radiation. A refractive element is formed by a portion of a cover element, which is attached to the substrate, so that the refractive element is arranged facing the detection element. The refractive element may be arranged within a recess of the cover element, so that a cavity is formed between the detection element and the refraction element.
    Type: Grant
    Filed: December 15, 2016
    Date of Patent: May 5, 2020
    Assignee: ams AG
    Inventors: Jens Hofrichter, Franz Schrank, Joerg Siegert
  • Publication number: 20190265119
    Abstract: A pressure sensor device comprises a substrate body, a pressure sensor comprising a membrane, and a cap body comprising at least one opening. The pressure sensor is arranged between the substrate body and the cap body in a vertical direction which is perpendicular to the main plane of extension of the substrate body, and the mass of the substrate body equals approximately the mass of the cap body. Furthermore, a method for forming a pressure sensor device is provided.
    Type: Application
    Filed: October 2, 2017
    Publication date: August 29, 2019
    Inventors: Joerg Siegert, Willem Frederik Adrianus Besling, Coenraad Cornelis Tak, Martin SCHREMS, FRANZ SCHRANK
  • Patent number: 10332931
    Abstract: The semiconductor device comprises a semiconductor wafer with an integrated circuit, formed by a plurality of dies, a further semiconductor wafer, which differs from the semiconductor wafer in diameter and semiconductor material, the semiconductor wafer and the further semiconductor wafer being bonded to one another by means of a bonding layer, and an electrically conductive contact layer arranged on the further semiconductor wafer opposite to the bonding layer.
    Type: Grant
    Filed: March 9, 2017
    Date of Patent: June 25, 2019
    Assignee: ams AG
    Inventors: Cathal Cassidy, Joerg Siegert, Franz Schrank
  • Patent number: 10283541
    Abstract: A photosensor (2) is arranged in a semiconductor substrate (1) at a main surface (10), a dielectric layer (4) is arranged on or above the main surface, the dielectric layer including a metal layer (6) electrically connected with the photosensor, and an aperture layer (16) formed from an opaque or semitransparent material is arranged on or above the dielectric layer. The aperture layer is provided with an array of transparent aperture zones (18) above the photosensor, each of the aperture zones penetrating the aperture layer.
    Type: Grant
    Filed: November 9, 2015
    Date of Patent: May 7, 2019
    Assignee: ams AG
    Inventors: Joerg Siegert, Franz Schrank, Martin Schrems
  • Publication number: 20190035835
    Abstract: A top surface of a substrate is provided with a detection element for detecting electromagnetic radiation. A refractive element is formed by a portion of a cover element, which is attached to the substrate, so that the refractive element is arranged facing the detection element. The refractive element may be arranged within a recess of the cover element, so that a cavity is formed between the detection element and the refraction element.
    Type: Application
    Filed: December 15, 2016
    Publication date: January 31, 2019
    Inventors: Jens HOFRICHTER, Franz SCHRANK, Joerg SIEGERT
  • Publication number: 20190025505
    Abstract: A semiconductor device has a semiconductor substrate and a first metallization stack arranged on the substrate. The substrate has and/or carries a plurality of electronic circuit elements. The first metallization stack has electrically insulating layers and at least one metallization layer. The semiconductor device further has a second metallization stack arranged on the first metallization stack and comprising further electrically insulating layers and an optical waveguide layer. The optical waveguide layer has at least one optical waveguide structure. Furthermore, one of the electrically insulating layers and one of the further electrically insulating layers are in direct contact with each other and form a pair of directly bonded layers.
    Type: Application
    Filed: August 25, 2016
    Publication date: January 24, 2019
    Applicant: ams AG
    Inventors: Jochen KRAFT, Joerg SIEGERT
  • Patent number: 9991177
    Abstract: According to the improved concept, a method for analyzing a semiconductor element comprising polymer residues located on a surface of the semiconductor element is provided. The method comprises marking at least a fraction of the residues by exposing the semiconductor element to a fluorescent substance and detecting the marked residues by visualizing the marked residues on the surface of the semiconductor element using fluorescence microscopy.
    Type: Grant
    Filed: November 29, 2017
    Date of Patent: June 5, 2018
    Assignee: ams AG
    Inventors: Helene Gehles, Thomas Bodner, Joerg Siegert
  • Publication number: 20180090393
    Abstract: According to the improved concept, a method for analyzing a semiconductor element comprising polymer residues located on a surface of the semiconductor element is provided. The method comprises marking at least a fraction of the residues by exposing the semiconductor element to a fluorescent substance and detecting the marked residues by visualizing the marked residues on the surface of the semiconductor element using fluorescence microscopy.
    Type: Application
    Filed: November 29, 2017
    Publication date: March 29, 2018
    Inventors: Helene GEHLES, Thomas BODNER, Joerg SIEGERT
  • Patent number: 9929035
    Abstract: A relief structure is formed on a surface of a carrier provided for accommodating a wafer, which is fastened to the carrier by a removable adhesive contacting the carrier. The relief structure, which may be spatially confined to the center of the carrier, reduces the strength of adhesion between the wafer and the carrier. If the adhesive is appropriately selected and maintains the connection between the wafer and the carrier at elevated temperatures, further process steps can be performed at temperatures of typically 300° C. or more. The subsequent mechanical separation of the adhesive joint is facilitated by the relief structure on the carrier.
    Type: Grant
    Filed: December 19, 2013
    Date of Patent: March 27, 2018
    Assignee: ams AG
    Inventors: Thomas Bodner, Joerg Siegert, Martin Schrems
  • Patent number: 9852955
    Abstract: According to the improved concept, a method for analyzing a semiconductor element comprising polymer residues located on a surface of the semiconductor element is provided. The method comprises marking at least a fraction of the residues by exposing the semiconductor element to a fluorescent substance and detecting the marked residues by visualizing the marked residues on the surface of the semiconductor element using fluorescence microscopy.
    Type: Grant
    Filed: November 3, 2016
    Date of Patent: December 26, 2017
    Assignee: AMS AG
    Inventors: Helene Gehles, Thomas Bodner, Joerg Siegert
  • Publication number: 20170309665
    Abstract: A photosensor (2) is arranged in a semiconductor substrate (1) at a main surface (10), a dielectric layer (4) is arranged on or above the main surface, the dielectric layer including a metal layer (6) electrically connected with the photosensor, and an aperture layer (16) formed from an opaque or semitransparent material is arranged on or above the dielectric layer. The aperture layer is provided with an array of transparent aperture zones (18) above the photosensor, each of the aperture zones penetrating the aperture layer.
    Type: Application
    Filed: November 9, 2015
    Publication date: October 26, 2017
    Inventors: Joerg SIEGERT, Franz SCHRANK, Martin SCHREMS
  • Patent number: 9753218
    Abstract: The semiconductor device comprises a substrate (1) of semiconductor material, a dielectric layer (2) above the substrate, a waveguide (3) arranged in the dielectric layer, and a mirror region (4) arranged on a surface of a mirror support (5) integrated on the substrate. A mirror is thus formed facing the waveguide. The surface of the mirror support and hence the mirror are inclined with respect to the waveguide.
    Type: Grant
    Filed: November 17, 2014
    Date of Patent: September 5, 2017
    Assignee: AMS AG
    Inventors: Jochen Kraft, Joerg Siegert, Ewald Stueckler
  • Publication number: 20170179183
    Abstract: The semiconductor device comprises a semiconductor wafer with an integrated circuit, formed by a plurality of dies, a further semiconductor wafer, which differs from the semiconductor wafer in diameter and semiconductor material, the semiconductor wafer and the further semiconductor wafer being bonded to one another by means of a bonding layer, and an electrically conductive contact layer arranged on the further semiconductor wafer opposite to the bonding layer.
    Type: Application
    Filed: March 9, 2017
    Publication date: June 22, 2017
    Inventors: Cathal CASSIDY, Joerg SIEGERT, Franz SCHRANK
  • Publication number: 20170133281
    Abstract: According to the improved concept, a method for analyzing a semiconductor element comprising polymer residues located on a surface of the semiconductor element is provided. The method comprises marking at least a fraction of the residues by exposing the semiconductor element to a fluorescent substance and detecting the marked residues by visualizing the marked residues on the surface of the semiconductor element using fluorescence microscopy.
    Type: Application
    Filed: November 3, 2016
    Publication date: May 11, 2017
    Inventors: Helene RICHTER, Thomas BODNER, Joerg SIEGERT
  • Patent number: 9608035
    Abstract: The method of wafer-scale integration of semiconductor devices comprises the steps of providing a semiconductor wafer (1), a further semiconductor wafer (2), which differs from the first semiconductor wafer in at least one of diameter, thickness and semiconductor material, and a handling wafer (3), arranging the further semiconductor wafer on the handling wafer, and bonding the further semiconductor wafer to the semiconductor wafer. The semiconductor device may comprise an electrically conductive contact layer (6) arranged on the further semiconductor wafer (2) and a metal layer connecting the contact layer with an integrated circuit.
    Type: Grant
    Filed: April 5, 2013
    Date of Patent: March 28, 2017
    Assignee: AMS AG
    Inventors: Cathal Cassidy, Joerg Siegert, Franz Schrank