Abstract: An apparatus includes a resonant converter controller having a converter voltage sensing terminal, a reference voltage terminal, a converter current sensing terminal, first and second converter capacitor terminals, and first and second control outputs. The resonant converter controller is configured to: receive a current sensing signal at the converter current sensing terminal; generate a first signal based on the current sensing signal; generate a second signal representing a difference between a first voltage at the converter voltage sensing terminal and a reference voltage at the reference voltage terminal; and generate first and second switching signals at, respectively, the first and second control outputs responsive to the first signal, the second signal, and a capacitor voltage between the first and second converter capacitor terminals to regulate the first voltage based on the reference voltage.

Abstract: The present disclosure generally relates to a semiconductor device that includes a gate electrical contact that forms junctions with different energy barrier heights to a gate layer. In an example, a semiconductor device includes a semiconductor substrate, a drain electrical contact, a source electrical contact, a barrier layer, a gate layer, and a gate electrical contact. The drain and source electrical contacts are on the semiconductor substrate. The barrier layer is over a channel region of the semiconductor substrate between the drain and source electrical contacts. The gate layer is over the barrier layer. The gate layer includes first and second semiconductor portions. The gate electrical contact contacts the gate layer. The gate electrical contact includes first and second metal portions. The first and second metal portions form first and second junctions with the first and second semiconductor portions, respectively. The first and second junctions have different energy barrier heights.

Abstract: The present disclosure generally relates to integrated devices with a conductive barrier structure. In an example, a semiconductor device includes a substrate, a conductive barrier structure, a channel layer, a barrier layer, a gate, and a conductive structure. The substrate is of a first semiconductor material. The conductive barrier structure is on the substrate. The channel layer is of a second semiconductor material and is on the conductive barrier structure. The barrier layer is on the channel layer, and the channel layer is between the barrier layer and the conductive barrier structure. The gate is over the barrier layer opposing the channel layer. The conductive structure is electrically coupled between the conductive barrier structure, the channel layer, and the barrier layer.

Abstract: Described embodiments include a rectifier circuit comprising a first resistor with first and second resistor terminals, and a second resistor with third and fourth resistor terminals. The first and third resistor terminals are coupled to an auxiliary power terminal. A current source is coupled between the second resistor terminal and a ground terminal. An amplifier has a first amplifier input coupled to the second resistor terminal, and a second amplifier input coupled to the fourth resistor terminal. A first transistor is coupled between the fourth resistor terminal and a damping terminal, and has a first control terminal coupled to the first amplifier output. A gate drive circuit has an input coupled to the damping terminal. A second transistor is coupled between the damping terminal and a bootstrap supply terminal, and has a second control terminal coupled to an output of the gate drive circuit.

Abstract: An apparatus includes: a first transistor coupled between a primary-side terminal and a bias terminal, the first transistor having a first control terminal; a second transistor coupled between the bias terminal and a ground terminal, the second transistor having a second control terminal; and a control circuit having a control input, a reference input, and first and second control outputs, the control input coupled to the bias terminal, the first control output coupled to the first control terminal, the second control output coupled to the second control terminal, and the control circuit configured to provide first and second control signals having a same switching frequency at the respective first and second control outputs responsive to a first voltage at the control input and a second voltage at the reference input.

Abstract: Described embodiments include a rectifier circuit comprising a first resistor with first and second resistor terminals, and a second resistor with third and fourth resistor terminals. The first and third resistor terminals are coupled to an auxiliary power terminal. A current source is coupled between the second resistor terminal and a ground terminal. An amplifier has a first amplifier input coupled to the second resistor terminal, and a second amplifier input coupled to the fourth resistor terminal. A first transistor is coupled between the fourth resistor terminal and a damping terminal, and has a first control terminal coupled to the first amplifier output. A gate drive circuit has an input coupled to the damping terminal. A second transistor is coupled between the damping terminal and a bootstrap supply terminal, and has a second control terminal coupled to an output of the gate drive circuit.

Abstract: A system includes a first battery, a second battery, an integrated circuit, a capacitor, and an inductor. The first battery has first and second battery terminals. The second battery has a third and fourth battery terminals. The second battery terminal is coupled to the third battery terminal. The integrated circuit includes a first transistor, a second transistor, a third transistor, and a fourth transistor. The first transistor is coupled between the first battery terminal and a capacitor terminal. The second transistor is coupled between the capacitor terminal and the second battery terminal. The third transistor is coupled between the third battery terminal and an inductor terminal. The fourth transistor is coupled between the inductor terminal and the fourth battery terminal. The capacitor and the inductor are coupled in series. The capacitor is coupled to the capacitor terminal and the inductor coupled to the inductor terminal.

Abstract: An integrated circuit includes first, second, third, and fourth transistors, and a control circuit. The first transistor is coupled between a first battery terminal and a first inductor terminal. The first transistor has a first transistor control terminal. The second transistor is coupled between the first inductor terminal and a second battery terminal. The second transistor has a second transistor control terminal. The third transistor is coupled between a third battery terminal and a second inductor terminal. The third transistor has a third transistor control terminal. The third battery terminal is coupled to the second battery terminal. The fourth transistor is coupled between the second inductor terminal and a fourth battery terminal. The fourth transistor has a fourth transistor control terminal. The control circuit has a control input and first, second, third, and fourth control outputs that are respectively coupled to the first, second, third, and fourth transistor control terminals.

Abstract: In described examples, an integrated circuit includes first and second current sources, first and second switches, a dV/dt phase detector, a control circuit, and source, gate, and drain terminals for coupling to, respectively, a source, gate, and drain of a power FET. The first switch is coupled between the first current source and the gate terminal. The second switch is coupled between the second current source and the gate terminal. The dV/dt phase detector detects a dV/dt phase of the power FET and outputs to the control circuit. The control circuit controls the first and second switches to perform a turn-on sequence of the power FET, including: closing the first switch while keeping the second switch open; and after receiving a signal from the dV/dt phase detector indicating the dV/dt phase has started, opening the first switch, and closing the second switch.

Abstract: One example includes an apparatus that includes an insulating layer and an electrically conductive layer on the insulating layer. The conductive layer includes a plurality of electrically isolated and conductive regions. A first switch is on a first of the conductive regions, and the first switch has a first terminal and a second terminal. A second switch is on a second of the conductive regions, and the second switch has a third terminal and fourth terminal. A passive component has a fifth terminal and a sixth terminal. The first and third terminals are coupled to the first conductive region. The fourth and sixth terminals are coupled to the second conductive region. The second and fifth terminals are coupled to a third of the conductive regions.

Abstract: A controller circuit is configured to receive a measurement signal representing a power converter state and receive a control signal representing a power converter resonant period. Based on the power converter state and the power converter resonant period, the controller circuit determines for a switching cycle: a charging interval, a first dead time interval, a discharging interval, and a second dead time interval. The first dead time interval is after the charging interval. The discharging interval is after the first dead time interval. The second dead time interval is after the discharging interval. The controller circuit provides a first drive signal and a second drive signal based on the charging interval, the first dead time interval, the discharging interval, and the second dead time interval.

Abstract: In one example, a controller circuit is configured to: receive a first measurement signal representing a power converter input voltage; receive a second measurement signal representing a power converter output voltage; receive an indication of whether a voltage across a switch is positive during a state change of the switch; based on the first and second measurement signals and the indication, determine: a charging interval; a first dead time interval after the charging interval; a discharging interval; and a second dead time interval after the discharging interval; and provide a first control signal at the first control output, and provide a second control signal at the second control output, in which the states of the first and second control signals vary across the charging interval, the first and second dead time intervals, and the discharging the interval.

Abstract: A startup circuit adapted to be coupled to an input voltage supply and operable to supply an output voltage at an output terminal, the startup circuit including: a first transistor having a first control terminal, a first current terminal and a second current terminal, the first current terminal adapted to be coupled to the input voltage supply and the second current terminal coupled to the output terminal; a precharge circuit having a first terminal, a second terminal and a third terminal, the second terminal adapted to be coupled to the input voltage supply and the third terminal coupled to the first control terminal; a current limiter coupled to the precharge circuit, the first control terminal and the second current terminal; a second transistor having a second control terminal, a third current terminal and a fourth current terminal, the third current terminal coupled to the precharge circuit and the second control terminal adapted to be coupled to a control signal; and a third transistor having a third c

Abstract: Described embodiments include a rectifier circuit comprising a first resistor with first and second resistor terminals, and a second resistor with third and fourth resistor terminals. The first and third resistor terminals are coupled to an auxiliary power terminal. A current source is coupled between the second resistor terminal and a ground terminal. An amplifier has a first amplifier input coupled to the second resistor terminal, and a second amplifier input coupled to the fourth resistor terminal. A first transistor is coupled between the fourth resistor terminal and a damping terminal, and has a first control terminal coupled to the first amplifier output. A gate drive circuit has an input coupled to the damping terminal. A second transistor is coupled between the damping terminal and a bootstrap supply terminal, and has a second control terminal coupled to an output of the gate drive circuit.

Abstract: This invention relates to a natural resource and reserve management system, a corresponding method and a resultant natural asset inventory. The system has means for amalgamating and integrating data from disparate expert technical systems and applications, including computer developed or generated data, into at least one common, spatially-referenced database for use by at least one commercially available inventory management application, in order to provide integrated natural asset management in a natural resource inventory. The natural resources and reserves may comprise of depletable mineral resources and reserves, the amalgamation and integration may be conducted continually, and the data may be from disparate expert technical systems and applications in order to provide integrated mineral asset management in a mineral resource inventory.

Abstract: Methods, systems, and apparatus to facilitate high side control of a switching power converter are disclosed. An example apparatus includes a latch including a first node coupled to a first source of a first switch and an output coupled to a first gate of the first switch; a first diode coupled to the first node and a second node; a second diode coupled to the second node and ground; a second switch coupled to a voltage source and the second node; and a third switch including a third gate coupled to the second switch, a third source coupled to the second node, and a third drain coupled to the latch.

Abstract: A startup circuit adapted to be coupled to an input voltage supply and operable to supply an output voltage at an output terminal, the startup circuit including: a first transistor having a first control terminal, a first current terminal and a second current terminal, the first current terminal adapted to be coupled to the input voltage supply and the second current terminal coupled to the output terminal; a precharge circuit having a first terminal, a second terminal and a third terminal, the second terminal adapted to be coupled to the input voltage supply and the third terminal coupled to the first control terminal; a current limiter coupled to the precharge circuit, the first control terminal and the second current terminal; a second transistor having a second control terminal, a third current terminal and a fourth current terminal, the third current terminal coupled to the precharge circuit and the second control terminal adapted to be coupled to a control signal; and a third transistor having a third c

Abstract: A startup circuit includes an enhancement mode transistor with a drain coupled to a startup circuit input, a source coupled to a first node, and a gate coupled to a second node. The startup circuit includes a current limiting circuit that controls a current path between the second node and a startup circuit output node based on a current sense voltage signal representing a current through the enhancement mode transistor, and a voltage regulation circuit controls a voltage of the second node to regulate a startup circuit output voltage of the startup circuit output node.

Abstract: In some examples, a system comprises a bi-directional gallium nitride (GaN) device including first and second switches and a substrate, the first switch including a first gate and a first source, the second switch including a second gate and a second source, and the substrate shared between the first and second switches. The system include a third switch coupled to the first source and the substrate. The system includes a fourth switch coupled to the second source and the substrate and a comparator having inputs coupled to the first and second sources and outputs coupled to the third and fourth switches.

Abstract: A startup circuit includes an enhancement mode transistor with a drain coupled to a startup circuit input, a source coupled to a first node, and a gate coupled to a second node. The startup circuit includes a current limiting circuit that controls a current path between the second node and a startup circuit output node based on a current sense voltage signal representing a current through the enhancement mode transistor, and a voltage regulation circuit controls a voltage of the second node to regulate a startup circuit output voltage of the startup circuit output node.