Patents by Inventor Johan Swerts

Johan Swerts has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20200365195
    Abstract: The disclosed technology relates generally to semiconductor devices, and more particularly to a layer stack for a magnetic tunnel junction (MTJ) device, and a method of forming the same. According to an aspect, a layer stack for a (MTJ) device comprises a seed layer structure, a pinning layer structure arranged above the seed layer structure, and above the pinning layer structure a Fe-comprising reference layer structure and a free layer structure separated by a tunnel barrier layer. The seed layer structure comprises a Ru-comprising layer and a Cr-comprising layer. The Cr-comprising layer forms an upper layer of the seed layer structure.
    Type: Application
    Filed: May 12, 2020
    Publication date: November 19, 2020
    Inventors: Sebastien Couet, Johan Swerts
  • Publication number: 20200341079
    Abstract: The disclosed technology relates generally to semiconductor devices and more particularly to magnetic tunnel junction devices. According to an aspect, an MTJ device comprises a spin-orbit-torque (SOT)-layer. The MTJ device additionally comprises a first free layer, a second free layer, a reference layer and a tunnel barrier layer arranged between the second free layer and the reference layer. The MTJ device further comprises a spacer layer arranged as an interfacial layer between the first free layer and the second free layer. The SOT-layer is adapted to switch a magnetization direction of the first free layer through SOT. The first free layer is adapted to generate a magnetic stray field acting on the second free layer such that a magnetization direction of the second free layer is responsive to a magnetization direction of the first free layer. According to another aspect, a circuit comprises the MTJ device.
    Type: Application
    Filed: April 22, 2020
    Publication date: October 29, 2020
    Inventors: Johan Swerts, Kevin Garello
  • Patent number: 10770213
    Abstract: The disclosed technology generally relates to a magnetoresistive device and more particularly to a magnetoresistive device comprising chromium. According to an aspect, a method of forming a magnetoresistive device comprises forming a magnetic tunnel junction (MTJ) structure over a substrate. The MTJ structure includes, in a bottom-up direction away from the substrate, a free layer, a tunnel barrier layer and a reference layer. The method additionally includes forming a pinning layer over the MTJ structure, wherein the pinning layer pins a magnetization direction of the reference layer. The method additionally includes forming capping layer comprising chromium (Cr) over the pinning layer. The method further includes annealing the capping layer under a condition sufficient to cause diffusion of Cr from the capping layer into at least the pinning layer. According to another aspect, a magnetoresistive device is formed according to the method.
    Type: Grant
    Filed: May 10, 2019
    Date of Patent: September 8, 2020
    Assignee: IMEC vzw
    Inventors: Johan Swerts, Sebastien Couet
  • Patent number: 10749106
    Abstract: The disclosed technology generally relates to semiconductor devices and more particularly to semiconductor devices comprising a magnetic tunnel junction (MTJ). In an aspect, a method of forming a magnetoresistive random access memory (MRAM) includes forming a layer stack above a substrate, where the layer stack includes a ferromagnetic reference layer, a tunnel barrier layer and a ferromagnetic free layer and a spin-orbit-torque (SOT)-generating layer. The method additionally includes, subsequent to forming the layer stack, patterning the layer stack to form a MTJ pillar.
    Type: Grant
    Filed: November 1, 2017
    Date of Patent: August 18, 2020
    Assignee: IMEC vzw
    Inventors: Hanns Christoph Adelmann, Gouri Sankar Kar, Johan Swerts, Sebastien Couet
  • Publication number: 20200185016
    Abstract: According to an example embodiment an MTJ unit is provided. The MTJ unit includes: a first MTJ comprising a first free layer, a first tunnel barrier layer and a first reference layer. The first MTJ is switchable between a parallel state and an anti-parallel state through spin-torque transfer (STT). The MTJ unit comprises a second MTJ arranged above the first MTJ and comprising, a second reference layer, a second tunnel barrier layer and a second free layer. The second MTJ is switchable between a parallel state and an anti-parallel state through STT. The MTJ unit comprises a pinning layer arranged between the first reference layer and the second reference layer and configured to fix a magnetization direction of the first reference layer and the second reference layer.
    Type: Application
    Filed: December 6, 2019
    Publication date: June 11, 2020
    Inventors: Sushil Sakhare, Manu Komalan Perumkunnil, Johan Swerts, Gouri Sankar Kar, Trong Huynh Bao
  • Patent number: 10573688
    Abstract: The disclosed technology generally relates to magnetic devices, and more particular to a magnetic structure, and a magnetic tunnel junction device and a magnetic random access memory including the magnetic structure. According to an aspect, a magnetic structure for a magnetic tunnel junction (MTJ) device includes a free layer, a tunnel barrier layer, a reference layer, a hard magnetic layer, and an inter-layer stack arranged between the hard magnetic layer and the reference layer. The inter-layer stack includes a first ferromagnetic sub-layer, a second ferromagnetic sub-layer and a non-magnetic spacer sub-layer. The non-magnetic spacer sub-layer is arranged in contact with and between the first ferromagnetic sub-layer and the second ferromagnetic sub-layer and is adapted to provide a ferromagnetic coupling of a magnetization of the first ferromagnetic sub-layer and a magnetization of the second ferromagnetic sub-layer.
    Type: Grant
    Filed: September 20, 2018
    Date of Patent: February 25, 2020
    Assignee: IMEC vzw
    Inventor: Johan Swerts
  • Publication number: 20190348208
    Abstract: The disclosed technology generally relates to a magnetoresistive device and more particularly to a magnetoresistive device comprising chromium. According to an aspect, a method of forming a magnetoresistive device comprises forming a magnetic tunnel junction (MTJ) structure over a substrate. The MTJ structure includes, in a bottom-up direction away from the substrate, a free layer, a tunnel barrier layer and a reference layer. The method additionally includes forming a pinning layer over the MTJ structure, wherein the pinning layer pins a magnetization direction of the reference layer. The method additionally includes forming capping layer comprising chromium (Cr) over the pinning layer. The method further includes annealing the capping layer under a condition sufficient to cause diffusion of Cr from the capping layer into at least the pinning layer. According to another aspect, a magnetoresistive device is formed according to the method.
    Type: Application
    Filed: May 10, 2019
    Publication date: November 14, 2019
    Inventors: Johan Swerts, Sebastien Couet
  • Patent number: 10333059
    Abstract: The disclosed technology generally relates to forming a semiconductor structure and more particularly to forming a stack of layers of a semiconductor structure using a sacrificial layer that is removed during deposition of a functional layer. In one aspect, the disclosed technology relates to a method of protecting a top surface of a layer in a semiconductor structure. The method comprises: providing the layer on a substrate, the layer having an initial thickness and an initial composition; forming a sacrificial metal layer on and in contact with the layer, the sacrificial metal layer comprising a light metal element; and depositing by physical vapor deposition a functional metal layer on and in contact with the sacrificial metal layer. The sacrificial metal layer is removed by sputtering during the deposition of the functional metal layer, such that an interface is formed between the layer and the functional metal layer.
    Type: Grant
    Filed: March 24, 2016
    Date of Patent: June 25, 2019
    Assignee: IMEC vzw
    Inventors: Johan Swerts, Sofie Mertens
  • Publication number: 20190189915
    Abstract: The disclosed technology generally relates semiconductor devices, and relates more particularly to a spin transfer torque device, a method of operating the spin-transfer torque device and a method of fabricating the spin-transfer torque device. According to one aspect, a spin-transfer torque device includes a magnetic flux guide layer and a set of magnetic tunnel junction (MTJ) pillars arranged above the magnetic flux guide layer. Each one of the pillars includes a separate free layer, a separate tunnel barrier layer and a separate reference layer. A coupling layer is arranged between the magnetic flux guide layer and the MTJ pillars, wherein a magnetization of the separate free layer of each of the each of the MTJ pillars is coupled, parallel or antiparallel, to a magnetization of the magnetic flux guide layer through the coupling layer.
    Type: Application
    Filed: November 30, 2018
    Publication date: June 20, 2019
    Inventors: Tsann Lin, Johan Swerts
  • Patent number: 10325710
    Abstract: The disclosed technology generally relates to a magnetoresistive device and more particularly to a magnetoresistive device comprising chromium. According to an aspect, a method of forming a magnetoresistive device comprises forming a magnetic tunnel junction (MTJ) structure over a substrate. The MTJ structure includes, in a bottom-up direction away from the substrate, a free layer, a tunnel barrier layer and a reference layer. The method additionally includes forming a pinning layer over the MTJ structure, wherein the pinning layer pins a magnetization direction of the reference layer. The method additionally includes forming capping layer comprising chromium (Cr) over the pinning layer. The method further includes annealing the capping layer under a condition sufficient to cause diffusion of Cr from the capping layer into at least the pinning layer. According to another aspect, a magnetoresistive device is formed according to the method.
    Type: Grant
    Filed: January 2, 2018
    Date of Patent: June 18, 2019
    Assignee: IMEC vzw
    Inventors: Johan Swerts, Sebastien Couet
  • Publication number: 20190088713
    Abstract: The disclosed technology generally relates to magnetic devices, and more particular to a magnetic structure, and a magnetic tunnel junction device and a magnetic random access memory including the magnetic structure. According to an aspect, a magnetic structure for a magnetic tunnel junction (MTJ) device includes a free layer, a tunnel barrier layer, a reference layer, a hard magnetic layer, and an inter-layer stack arranged between the hard magnetic layer and the reference layer. The inter-layer stack includes a first ferromagnetic sub-layer, a second ferromagnetic sub-layer and a non-magnetic spacer sub-layer. The non-magnetic spacer sub-layer is arranged in contact with and between the first ferromagnetic sub-layer and the second ferromagnetic sub-layer and is adapted to provide a ferromagnetic coupling of a magnetization of the first ferromagnetic sub-layer and a magnetization of the second ferromagnetic sub-layer.
    Type: Application
    Filed: September 20, 2018
    Publication date: March 21, 2019
    Inventor: Johan Swerts
  • Publication number: 20190067564
    Abstract: The disclosed technology generally relates to magnetic memory devices, and more particularly to spin transfer torque magnetic random access memory (STT-MRAM) devices having a magnetic tunnel junction (MTJ), and further relates to methods of fabricating the STT-MRAM devices. In an aspect, a magnetoresistive random access memory (MRAM) device has a magnetic tunnel junction (MTJ). The MTJ includes a magnetic reference layer comprising CoFeB, a magnetic free layer comprising CoFeB, and a barrier layer comprising MgO. The barrier layer is interposed between the magnetic reference layer and the magnetic free layer. The barrier layer has a thickness adapted to tunnel electrons between the magnetic reference layer and the magnetic free layer sufficient to cause a change in the magnetization direction of the variable magnetization under a bias. The MTJ further comprises a buffer layer comprising one or more of Co, Fe, CoFe and CoFeB, where the buffer layer is doped with one or both of C and N.
    Type: Application
    Filed: August 13, 2018
    Publication date: February 28, 2019
    Inventors: Johan Swerts, Kiroubanand Sankaran, Tsann Lin, Geoffrey Pourtois
  • Patent number: 10170687
    Abstract: The disclosed technology relates generally to magnetic devices, and more particularly to spin torque majority gate devices such as spin torque magnetic devices (STMG), and to methods of fabricating the same. In one aspect, a majority gate device includes a plurality of input zones and an output zone. A magnetic tunneling junction (MTJ) is formed in each of the input zones and the output zone, where the MTJ includes a non-magnetic layer interposed between a free layer stack and a hard layer. The free layer stack in turn includes a bulk perpendicular magnetic anisotropy (PMA) layer on a seed layer, a magnetic layer formed on and in contact with the bulk PMA layer, and a non-magnetic layer formed on the magnetic layer. Each of the bulk PMA layer and the seed layer is configured as a common layer for each of the input zones and the output zone.
    Type: Grant
    Filed: December 21, 2016
    Date of Patent: January 1, 2019
    Assignee: IMEC vzw
    Inventors: Johan Swerts, Mauricio Manfrini, Christoph Adelmann
  • Patent number: 10050192
    Abstract: The disclosed technology generally relates to magnetic memory devices, and more particularly to spin transfer torque magnetic random access memory (STT-MRAM) devices having a magnetic tunnel junction (MTJ), and further relates to methods of fabricating the STT-MRAM devices. In an aspect, a magnetoresistive random access memory (MRAM) device has a magnetic tunnel junction (MTJ). The MTJ includes a magnetic reference layer including CoFeB, a magnetic free layer comprising CoFeB, and a barrier layer including MgO. The barrier layer is interposed between the magnetic reference layer and the magnetic free layer. The barrier layer has a thickness adapted to tunnel electrons between the magnetic reference layer and the magnetic free layer sufficient to cause a change in the magnetization direction of the variable magnetization under a bias. The MTJ further comprises a buffer layer comprising one or more of Co, Fe, CoFe and CoFeB, where the buffer layer is doped with one or both of C and N.
    Type: Grant
    Filed: December 8, 2016
    Date of Patent: August 14, 2018
    Assignee: IMEC vzw
    Inventors: Johan Swerts, Kiroubanand Sankaran, Tsann Lin, Geoffrey Pourtois
  • Publication number: 20180190419
    Abstract: The disclosed technology generally relates to a magnetoresistive device and more particularly to a magnetoresistive device comprising chromium. According to an aspect, a method of forming a magnetoresistive device comprises forming a magnetic tunnel junction (MTJ) structure over a substrate. The MTJ structure includes, in a bottom-up direction away from the substrate, a free layer, a tunnel barrier layer and a reference layer. The method additionally includes forming a pinning layer over the MTJ structure, wherein the pinning layer pins a magnetization direction of the reference layer. The method additionally includes forming capping layer comprising chromium (Cr) over the pinning layer. The method further includes annealing the capping layer under a condition sufficient to cause diffusion of Cr from the capping layer into at least the pinning layer. According to another aspect, a magnetoresistive device is formed according to the method.
    Type: Application
    Filed: January 2, 2018
    Publication date: July 5, 2018
    Inventors: Johan Swerts, Sebastien Couet
  • Publication number: 20180123031
    Abstract: The disclosed technology generally relates to semiconductor devices and more particularly to semiconductor devices comprising a magnetic tunnel junction (MTJ). In an aspect, a method of forming a magnetoresistive random access memory (MRAM) includes forming a layer stack above a substrate, where the layer stack includes a ferromagnetic reference layer, a tunnel barrier layer and a ferromagnetic free layer and a spin-orbit-torque (SOT)-generating layer. The method additionally includes, subsequent to forming the layer stack, patterning the layer stack to form a MTJ pillar.
    Type: Application
    Filed: November 1, 2017
    Publication date: May 3, 2018
    Inventors: Hanns Christoph Adelmann, Gouri Sankar Kar, Johan Swerts, Sebastien Couet
  • Publication number: 20170179373
    Abstract: The disclosed technology relates generally to magnetic devices, and more particularly to spin torque majority gate devices such as spin torque magnetic devices (STMG), and to methods of fabricating the same. In one aspect, a majority gate device includes a plurality of input zones and an output zone. A magnetic tunneling junction (MTJ) is formed in each of the input zones and the output zone, where the MTJ includes a non-magnetic layer interposed between a free layer stack and a hard layer. The free layer stack in turn includes a bulk perpendicular magnetic anisotropy (PMA) layer on a seed layer, a magnetic layer formed on and in contact with the bulk PMA layer, and a non-magnetic layer formed on the magnetic layer. Each of the bulk PMA layer and the seed layer is configured as a common layer for each of the input zones and the output zone.
    Type: Application
    Filed: December 21, 2016
    Publication date: June 22, 2017
    Inventors: Johan Swerts, Mauricio MANFRINI, Christoph ADELMANN
  • Publication number: 20170170390
    Abstract: The disclosed technology generally relates to magnetic memory devices, and more particularly to spin transfer torque magnetic random access memory (STT-MRAM) devices having a magnetic tunnel junction (MTJ), and further relates to methods of fabricating the STT-MRAM devices. In an aspect, a magnetoresistive random access memory (MRAM) device has a magnetic tunnel junction (MTJ). The MTJ includes a magnetic reference layer comprising CoFeB, a magnetic free layer comprising CoFeB, and a barrier layer comprising MgO. The barrier layer is interposed between the magnetic reference layer and the magnetic free layer. The barrier layer has a thickness adapted to tunnel electrons between the magnetic reference layer and the magnetic free layer sufficient to cause a change in the magnetization direction of the variable magnetization under a bias. The MTJ further comprises a buffer layer comprising one or more of Co, Fe, CoFe and CoFeB, where the buffer layer is doped with one or both of C and N.
    Type: Application
    Filed: December 8, 2016
    Publication date: June 15, 2017
    Inventors: Johan Swerts, Kiroubanand Sankaran, Tsann Lin, Geoffrey Pourtois
  • Publication number: 20160284987
    Abstract: The disclosed technology generally relates to forming a semiconductor structure and more particularly to forming a stack of layers of a semiconductor structure using a sacrificial layer that is removed during deposition of a functional layer. In one aspect, the disclosed technology relates to a method of protecting a top surface of a layer in a semiconductor structure. The method comprises: providing the layer on a substrate, the layer having an initial thickness and an initial composition; forming a sacrificial metal layer on and in contact with the layer, the sacrificial metal layer comprising a light metal element; and depositing by physical vapor deposition a functional metal layer on and in contact with the sacrificial metal layer. The sacrificial metal layer is removed by sputtering during the deposition of the functional metal layer, such that an interface is formed between the layer and the functional metal layer.
    Type: Application
    Filed: March 24, 2016
    Publication date: September 29, 2016
    Inventors: Johan SWERTS, Sofie MERTENS
  • Patent number: 9343298
    Abstract: The disclosure provides a method for producing a stack of layers on a semiconductor substrate. The method includes producing a substrate a first conductive layer; and producing by ALD a sub-stack of layers on said conductive layer, at least one of said layers of the sub-stack being a TiO2 layer, the other layers of the sub-stack being layers of a dielectric material having a composition suitable to form a cubic perovskite phase upon crystallization of said sub-stack of layers. Crystallization is obtained via heat treatment. When used in a metal-insulator-metal capacitor, the stack of layers can provide improved characteristics as a consequence of the TiO2 layer being present in the sub-stack.
    Type: Grant
    Filed: September 26, 2011
    Date of Patent: May 17, 2016
    Assignee: IMEC
    Inventors: Mihaela Ioana Popovici, Johan Swerts, Malgorzata Pawlak, Kazuyuki Tomida, Min-Soo Kim, Jorge Kittl, Sven Van Elshocht