Patents by Inventor Johan Swerts
Johan Swerts has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20180190419Abstract: The disclosed technology generally relates to a magnetoresistive device and more particularly to a magnetoresistive device comprising chromium. According to an aspect, a method of forming a magnetoresistive device comprises forming a magnetic tunnel junction (MTJ) structure over a substrate. The MTJ structure includes, in a bottom-up direction away from the substrate, a free layer, a tunnel barrier layer and a reference layer. The method additionally includes forming a pinning layer over the MTJ structure, wherein the pinning layer pins a magnetization direction of the reference layer. The method additionally includes forming capping layer comprising chromium (Cr) over the pinning layer. The method further includes annealing the capping layer under a condition sufficient to cause diffusion of Cr from the capping layer into at least the pinning layer. According to another aspect, a magnetoresistive device is formed according to the method.Type: ApplicationFiled: January 2, 2018Publication date: July 5, 2018Inventors: Johan Swerts, Sebastien Couet
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Publication number: 20180123031Abstract: The disclosed technology generally relates to semiconductor devices and more particularly to semiconductor devices comprising a magnetic tunnel junction (MTJ). In an aspect, a method of forming a magnetoresistive random access memory (MRAM) includes forming a layer stack above a substrate, where the layer stack includes a ferromagnetic reference layer, a tunnel barrier layer and a ferromagnetic free layer and a spin-orbit-torque (SOT)-generating layer. The method additionally includes, subsequent to forming the layer stack, patterning the layer stack to form a MTJ pillar.Type: ApplicationFiled: November 1, 2017Publication date: May 3, 2018Inventors: Hanns Christoph Adelmann, Gouri Sankar Kar, Johan Swerts, Sebastien Couet
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Publication number: 20170179373Abstract: The disclosed technology relates generally to magnetic devices, and more particularly to spin torque majority gate devices such as spin torque magnetic devices (STMG), and to methods of fabricating the same. In one aspect, a majority gate device includes a plurality of input zones and an output zone. A magnetic tunneling junction (MTJ) is formed in each of the input zones and the output zone, where the MTJ includes a non-magnetic layer interposed between a free layer stack and a hard layer. The free layer stack in turn includes a bulk perpendicular magnetic anisotropy (PMA) layer on a seed layer, a magnetic layer formed on and in contact with the bulk PMA layer, and a non-magnetic layer formed on the magnetic layer. Each of the bulk PMA layer and the seed layer is configured as a common layer for each of the input zones and the output zone.Type: ApplicationFiled: December 21, 2016Publication date: June 22, 2017Inventors: Johan Swerts, Mauricio MANFRINI, Christoph ADELMANN
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Publication number: 20170170390Abstract: The disclosed technology generally relates to magnetic memory devices, and more particularly to spin transfer torque magnetic random access memory (STT-MRAM) devices having a magnetic tunnel junction (MTJ), and further relates to methods of fabricating the STT-MRAM devices. In an aspect, a magnetoresistive random access memory (MRAM) device has a magnetic tunnel junction (MTJ). The MTJ includes a magnetic reference layer comprising CoFeB, a magnetic free layer comprising CoFeB, and a barrier layer comprising MgO. The barrier layer is interposed between the magnetic reference layer and the magnetic free layer. The barrier layer has a thickness adapted to tunnel electrons between the magnetic reference layer and the magnetic free layer sufficient to cause a change in the magnetization direction of the variable magnetization under a bias. The MTJ further comprises a buffer layer comprising one or more of Co, Fe, CoFe and CoFeB, where the buffer layer is doped with one or both of C and N.Type: ApplicationFiled: December 8, 2016Publication date: June 15, 2017Inventors: Johan Swerts, Kiroubanand Sankaran, Tsann Lin, Geoffrey Pourtois
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Publication number: 20160284987Abstract: The disclosed technology generally relates to forming a semiconductor structure and more particularly to forming a stack of layers of a semiconductor structure using a sacrificial layer that is removed during deposition of a functional layer. In one aspect, the disclosed technology relates to a method of protecting a top surface of a layer in a semiconductor structure. The method comprises: providing the layer on a substrate, the layer having an initial thickness and an initial composition; forming a sacrificial metal layer on and in contact with the layer, the sacrificial metal layer comprising a light metal element; and depositing by physical vapor deposition a functional metal layer on and in contact with the sacrificial metal layer. The sacrificial metal layer is removed by sputtering during the deposition of the functional metal layer, such that an interface is formed between the layer and the functional metal layer.Type: ApplicationFiled: March 24, 2016Publication date: September 29, 2016Inventors: Johan SWERTS, Sofie MERTENS
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Patent number: 9343298Abstract: The disclosure provides a method for producing a stack of layers on a semiconductor substrate. The method includes producing a substrate a first conductive layer; and producing by ALD a sub-stack of layers on said conductive layer, at least one of said layers of the sub-stack being a TiO2 layer, the other layers of the sub-stack being layers of a dielectric material having a composition suitable to form a cubic perovskite phase upon crystallization of said sub-stack of layers. Crystallization is obtained via heat treatment. When used in a metal-insulator-metal capacitor, the stack of layers can provide improved characteristics as a consequence of the TiO2 layer being present in the sub-stack.Type: GrantFiled: September 26, 2011Date of Patent: May 17, 2016Assignee: IMECInventors: Mihaela Ioana Popovici, Johan Swerts, Malgorzata Pawlak, Kazuyuki Tomida, Min-Soo Kim, Jorge Kittl, Sven Van Elshocht
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Patent number: 8921228Abstract: A method for forming a noble metal layer by Plasma Enhanced Atomic Layer Deposition (PE-ALD) is disclosed. The method includes providing a substrate in a PE-ALD chamber, the substrate comprising a first region having an exposed first material and a second region having an exposed second material. The first material comprises a metal nitride or a nitridable metal, and the second material comprises a non-nitridable metal or silicon oxide. The method further includes depositing selectively by PE-ALD a noble metal layer on the second region and not on the first region, by repeatedly performing a deposition cycle including (a) supplying a noble metal precursor to the PE-ALD chamber and contacting the noble metal precursor with the substrate in the presence of a carrier gas followed by purging the noble metal precursor, and (b) exposing the substrate to plasma while supplying ammonia and the carrier gas into the PE-ALD chamber.Type: GrantFiled: October 3, 2012Date of Patent: December 30, 2014Assignee: IMECInventors: Johan Swerts, Sven Van Elshocht, Annelies Delabie
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Patent number: 8649154Abstract: Methods of manufacturing metal-insulator-metal capacitor structures, and the metal-insulator-metal capacitor structures obtained, are disclosed. In one embodiment, a method includes providing a substrate, forming on the substrate a first metal layer comprising a first metal, and using atomic layer deposition with an H2O oxidant to deposit on the first metal layer a protective layer comprising TiO2. The method further includes using atomic layer deposition with an O3 oxidant to deposit on the protective layer a dielectric layer of a dielectric material, and forming on the dielectric layer a second metal layer comprising a second metal. In another embodiment, a metal-insulator-metal capacitor includes a bottom electrode comprising a first metal, a protective layer deposited on the bottom electrode and comprising TiO2, a dielectric layer deposited on the protective layer and comprising a dielectric material, and a top electrode formed on the dielectric layer and comprising a second metal.Type: GrantFiled: September 28, 2011Date of Patent: February 11, 2014Assignee: IMECInventors: Mihaela Ioana Popovici, Johan Swerts, Jorge Kittl, Sven Van Elshocht
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Patent number: 8518793Abstract: A method for forming a MIM capacitor structure includes the steps of obtaining a base structure provided with a recess, the recess exposing a conductive bottom electrode plug; selectively growing Ru on the bottom electrode plug, based on a difference in incubation time of Ru growth on the bottom electrode plug compared to the base structure material; oxidizing the selectively grown Ru; depositing a Ru-comprising bottom electrode over the oxidized Ru; forming a dielectric layer on the Ru-comprising bottom electrode; and—forming a conductive top electrode over the dielectric layer.Type: GrantFiled: October 17, 2012Date of Patent: August 27, 2013Assignee: IMECInventors: Min-Soo Kim, Christian Caillat, Johan Swerts
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Patent number: 8405166Abstract: The present disclosure is related to a dielectric layer comprising a rare-earth aluminate (RExAl2-xO3 with 0<x<2) and having a perovskite crystalline structure, wherein the rare-earth aluminate comprises a rare-earth element having an atomic number higher than or equal to 63 and lower than or equal to 71. The disclosure also relates to method of manufacturing of a dielectric stack and a dielectric stack comprising said rare-earth aluminate dielectric layer and further comprising a template stack comprising at least an upper template layer, wherein the upper template layer has a perovskite structure, and wherein the upper template layer is underlying and in contact with the rare-earth aluminate dielectric layer. In a preferred embodiment the dielectric stack further comprises a lower template layer having a crystalline structure, wherein the lower template layer is underlying and in contact with the upper template layer.Type: GrantFiled: December 7, 2010Date of Patent: March 26, 2013Assignee: IMECInventors: Christoph Adelmann, Johan Swerts, Sven Van Elshocht, Jorge Kittl
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Publication number: 20120092807Abstract: The disclosure provides a method for producing a stack of layers on a semiconductor substrate. The method includes producing a substrate a first conductive layer; and producing by ALD a sub-stack of layers on said conductive layer, at least one of said layers of the sub-stack being a TiO2 layer, the other layers of the sub-stack being layers of a dielectric material having a composition suitable to form a cubic perovskite phase upon crystallization of said sub-stack of layers. Crystallization is obtained via heat treatment. When used in a metal-insulator-metal capacitor, the stack of layers can provide improved characteristics as a consequence of the TiO2 layer being present in the sub-stack.Type: ApplicationFiled: September 26, 2011Publication date: April 19, 2012Applicant: IMECInventors: Mihaela Ioana Popovici, Johan Swerts, Malgorzata Pawlak, Kazuyuki Tomida, Min-Soo Kim, Jorge Kittl, Sven Van Elshocht
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Publication number: 20120075767Abstract: Methods of manufacturing metal-insulator-metal capacitor structures, and the metal-insulator-metal capacitor structures obtained, are disclosed. In one embodiment, a method includes providing a substrate, forming on the substrate a first metal layer comprising a first metal, and using atomic layer deposition with an H2O oxidant to deposit on the first metal layer a protective layer comprising TiO2. The method further includes using atomic layer deposition with an O3 oxidant to deposit on the protective layer a dielectric layer of a dielectric material, and forming on the dielectric layer a second metal layer comprising a second metal. In another embodiment, a metal-insulator-metal capacitor includes a bottom electrode comprising a first metal, a protective layer deposited on the bottom electrode and comprising TiO2, a dielectric layer deposited on the protective layer and comprising a dielectric material, and a top electrode formed on the dielectric layer and comprising a second metal.Type: ApplicationFiled: September 28, 2011Publication date: March 29, 2012Applicant: IMECInventors: Mihaela Ioana Popovici, Johan Swerts, Jorge Kittl, Sven Van Elshocht
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Publication number: 20110147900Abstract: The present disclosure is related to a dielectric layer comprising a rare-earth aluminate (RExAl2-xO3 with 0<x<2) and having a perovskite crystalline structure, wherein the rare-earth aluminate comprises a rare-earth element having an atomic number higher than or equal to 63 and lower than or equal to 71. The disclosure also relates to method of manufacturing of a dielectric stack and a dielectric stack comprising said rare-earth aluminate dielectric layer and further comprising a template stack comprising at least an upper template layer, wherein the upper template layer has a perovskite structure, and wherein the upper template layer is underlying and in contact with the rare-earth aluminate dielectric layer. In a preferred embodiment the dielectric stack further comprises a lower template layer having a crystalline structure, wherein the lower template layer is underlying and in contact with the upper template layer.Type: ApplicationFiled: December 7, 2010Publication date: June 23, 2011Applicant: IMECInventors: Christoph Adelmann, Johan Swerts, Sven Van Elshocht, Jorge Kittl
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Patent number: 7629270Abstract: A nitrogen precursor that has been activated by exposure to a remotely excited species is used as a reactant to form nitrogen-containing layers. The remotely excited species can be, e.g., N2, Ar, and/or He, which has been excited in a microwave radical generator. Downstream of the microwave radical generator and upstream of the substrate, the flow of excited species is mixed with a flow of NH3. The excited species activates the NH3. The substrate is exposed to both the activated NH3 and the excited species. The substrate can also be exposed to a precursor of another species to form a compound layer in a chemical vapor deposition. In addition, already-deposited layers can be nitrided by exposure to the activated NH3 and to the excited species, which results in higher levels of nitrogen incorporation than plasma nitridation using excited N2 alone, or thermal nitridation using NH3 alone, with the same process temperatures and nitridation durations.Type: GrantFiled: August 24, 2005Date of Patent: December 8, 2009Assignee: ASM America, Inc.Inventors: Johan Swerts, Hilde De Witte, Jan Willem Maes, Christophe F. Pomarede, Ruben Haverkort, Yuet Mei Wan, Marinus J. De Blank, Cornelius A. Van Der Jeugd, Jacobus Johannes Beulens
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Publication number: 20060110943Abstract: A nitrogen precursor that has been activated by exposure to a remotely excited species is used as a reactant to form nitrogen-containing layers. The remotely excited species can be, e.g., N2, Ar, and/or He, which has been excited in a microwave radical generator. Downstream of the microwave radical generator and upstream of the substrate, the flow of excited species is mixed with a flow of NH3. The excited species activates the NH3. The substrate is exposed to both the activated NH3 and the excited species. The substrate can also be exposed to a precursor of another species to form a compound layer in a chemical vapor deposition. In addition, already-deposited layers can be nitrided by exposure to the activated NH3 and to the excited species, which results in higher levels of nitrogen incorporation than plasma nitridation using excited N2 alone, or thermal nitridation using NH3 alone, with the same process temperatures and nitridation durations.Type: ApplicationFiled: August 24, 2005Publication date: May 25, 2006Inventors: Johan Swerts, Hilde De Witte, Jan Maes, Christophe Pomarede, Ruben Haverkort, Yuet Wan, Marinus De Blank, Cornelius Van Der Jeugd, Jacobus Beulens