Patents by Inventor Johann Gaboriau

Johann Gaboriau has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20180335458
    Abstract: Sensing electronics may be used to measure capacitance of components, such as speakers in mobile devices. A sensing circuit may include a charge-sense front end with sine wave excitation, an analog-to-digital conversion block, and a digital demodulator. The component being measured by the sensing electronics may be excited by a high-frequency sine wave excitation. The digitization of the output from the component may be performed using a bandpass filter synchronized with the excitation signal by centering the bandpass filter near (e.g., within 5% of) the frequency of the excitation signal.
    Type: Application
    Filed: May 18, 2017
    Publication date: November 22, 2018
    Applicant: Cirrus Logic International Semiconductor Ltd.
    Inventors: John L. Melanson, Anindya Bhattacharya, Axel Thomsen, Eric Smith, Vamsikrishna Parupalli, Mark May, Johann Gaboriau, Junsong Li
  • Patent number: 9941848
    Abstract: In accordance with embodiments of the present disclosure, a transconductance with capacitances feedback compensation amplifier may include a capacitor in parallel with an inner feedback loop of the amplifier for providing cascade compensation to the amplifier.
    Type: Grant
    Filed: October 21, 2014
    Date of Patent: April 10, 2018
    Assignee: Cirrus Logic, Inc.
    Inventors: Ramin Zanbaghi, Aaron Brennan, Johann Gaboriau, Prashanth Drakshapalli, Vamsikrishna Parupalli
  • Patent number: 9847706
    Abstract: In accordance with embodiments of the present disclosure, systems and methods may include an input configured to indicate a switching node voltage of a switching node of a power converter comprising a first switch device coupled at its non-gate terminals between a ground voltage and the switching node and a second switch device coupled at its non-gate terminals between an output supply node and the switching node. The systems and methods may also include a predriver circuit coupled to the input and a gate terminal of the first switch device, the predriver circuit configured to drive an input voltage signal to the gate terminal of the first switch device and configured to select an effective impedance of the gate terminal of the first switch device based on the input.
    Type: Grant
    Filed: March 14, 2013
    Date of Patent: December 19, 2017
    Assignee: Cirrus Logic, Inc.
    Inventors: Lingli Zhang, Dan Shen, Johann Gaboriau
  • Patent number: 9590574
    Abstract: An audio switching power amplifier having an output with controlled-slope transitions maintains efficiency while avoiding uncontrolled non-overlap intervals during switching transitions. A pair of transistors forming a half-bridge that supplies an output signal at an output terminal of the amplifier are operated so that neither transistor is fully on during an overlap time period. A current source provides an output current to the output terminal during the non-overlap time period to control the output voltage while changing the transistor that conducts the output current from a first one of the pair of transistors to a second one of the pair of transistors. The current source may be provided by operation of one of the transistors in a current source configuration. The voltage of a gate of one of the transistors can be compared with a threshold to provide an indication of the current.
    Type: Grant
    Filed: February 10, 2014
    Date of Patent: March 7, 2017
    Assignee: CIRRUS LOGIC, INC.
    Inventors: Shahrzad Naraghi, Johann Gaboriau, John L. Melanson
  • Patent number: 9323256
    Abstract: In accordance with these and other embodiments of the present disclosure, a system and method include supplying, by a single boost converter, power to a first circuit that provides a circuit operation and power to a second circuit that provides another circuit operation. The system and method also include receiving, by a controller coupled to the single boost controller, an operating condition signal indicative of at least one of: (i) a power delivered by the single boost converter, and (ii) a temperature of the single integrated circuit. The system and method further include allocating, by the controller, power deliverable by the single boost converter between the first circuit and second circuit in response to the operating condition signal.
    Type: Grant
    Filed: February 25, 2013
    Date of Patent: April 26, 2016
    Assignee: Cirrus Logic, Inc.
    Inventors: Lingli Zhang, Johann Gaboriau, Mehul Marolia, Aiman Alhoussami
  • Patent number: 9252764
    Abstract: In accordance with embodiments of the present disclosure, an apparatus may include an input for indicating a characteristic of an output load current of a switched output stage comprising at least one driver device and a predriver circuit coupled to the input and a gate terminal of the at least one driver device, the predriver circuit for driving an input voltage signal to the gate terminal and configured to select an effective impedance of the gate terminal based on the input for indicating the output load current. In accordance with these and other embodiments of the disclosure, a method may include receiving an input for indicating a characteristic of an output load current of a switched output stage comprising at least one driver device and selecting an effective impedance of a gate terminal of the at least one driver device based on the input for indicating the output load current.
    Type: Grant
    Filed: March 12, 2013
    Date of Patent: February 2, 2016
    Assignee: Cirrus Logic, Inc.
    Inventors: Dan Shen, Lingli Zhang, Johann Gaboriau
  • Patent number: 8970258
    Abstract: In accordance with embodiments of the present disclosure, systems and methods may include a switch coupled at its gate terminal to an input signal voltage, the input signal voltage for controlling a gate voltage of a gate terminal of a driver device coupled at its non-gate terminals between a rail voltage and an output node. The systems and methods may also include a diode having a first terminal and a second terminal, the diode coupled to a non-gate terminal of the switch such that when the switch is enabled, the first terminal is electrically coupled to the gate terminal of the driver device and the second terminal is electrically coupled to the output node.
    Type: Grant
    Filed: March 14, 2013
    Date of Patent: March 3, 2015
    Assignee: Cirrus Logic, Inc.
    Inventors: Dan Shen, Johann Gaboriau, Lingli Zhang, Christian Larsen
  • Patent number: 8872561
    Abstract: In accordance with these and other embodiments of the present disclosure, an apparatus and a method may include receiving a first input configured to indicate an output voltage of an output node of a switched output stage comprising a pull-down driver device coupled at its non-gate terminals between a ground voltage and the output node and a pull-up driver device coupled at its non-gate terminals between a supply voltage and the output node. The method may also include receiving a second input configured to indicate a gate voltage of a gate terminal of a first one of the pull-up driver device and the pull-down driver device. The method may further include detecting direction of an output current flowing into or out of the output node based on the first input and the second input.
    Type: Grant
    Filed: March 14, 2013
    Date of Patent: October 28, 2014
    Assignee: Cirrus Logic, Inc.
    Inventors: Dan Shen, Lingli Zhang, Johann Gaboriau
  • Patent number: 8841894
    Abstract: An audio switching power amplifier having an output with controlled-slope transitions maintains efficiency while avoiding uncontrolled non-overlap intervals during switching transitions. A pair of transistors forming a half-bridge that supplies an output signal at an output terminal of the amplifier are operated so that neither transistor is fully on during an overlap time period. A current source provides an output current to the output terminal during the non-overlap time period to control the output voltage while changing the transistor that conducts the output current from a first one of the pair of transistors to a second one of the pair of transistors. The current source may be provided by operation of one of the transistors in a current source configuration. The voltage of a gate of one of the transistors can be compared with a threshold to provide an indication of the current.
    Type: Grant
    Filed: December 16, 2011
    Date of Patent: September 23, 2014
    Assignee: Cirrus Logic, Inc.
    Inventors: Shahrzad Naraghi, Johann Gaboriau, John L. Melanson
  • Publication number: 20140266310
    Abstract: In accordance with these and other embodiments of the present disclosure, an apparatus and a method may include receiving a first input configured to indicate an output voltage of an output node of a switched output stage comprising a pull-down driver device coupled at its non-gate terminals between a ground voltage and the output node and a pull-up driver device coupled at its non-gate terminals between a supply voltage and the output node. The method may also include receiving a second input configured to indicate a gate voltage of a gate terminal of a first one of the pull-up driver device and the pull-down driver device. The method may further include detecting direction of an output current flowing into or out of the output node based on the first input and the second input.
    Type: Application
    Filed: March 14, 2013
    Publication date: September 18, 2014
    Applicant: CIRRUS LOGIC, INC.
    Inventors: Dan Shen, Lingli Zhang, Johann Gaboriau
  • Publication number: 20140266109
    Abstract: In accordance with embodiments of the present disclosure, systems and methods may include an input configured to indicate a switching node voltage of a switching node of a power converter comprising a first switch device coupled at its non-gate terminals between a ground voltage and the switching node and a second switch device coupled at its non-gate terminals between an output supply node and the switching node. The systems and methods may also include a predriver circuit coupled to the input and a gate terminal of the first switch device, the predriver circuit configured to drive an input voltage signal to the gate terminal of the first switch device and configured to select an effective impedance of the gate terminal of the first switch device based on the input.
    Type: Application
    Filed: March 14, 2013
    Publication date: September 18, 2014
    Applicant: CIRRUS LOGIC, INC.
    Inventors: Lingli Zhang, Dan Shen, Johann Gaboriau
  • Publication number: 20140266126
    Abstract: In accordance with embodiments of the present disclosure, systems and methods may include a switch coupled at its gate terminal to an input signal voltage, the input signal voltage for controlling a gate voltage of a gate terminal of a driver device coupled at its non-gate terminals between a rail voltage and an output node. The systems and methods may also include a diode having a first terminal and a second terminal, the diode coupled to a non-gate terminal of the switch such that when the switch is enabled, the first terminal is electrically coupled to the gate terminal of the driver device and the second terminal is electrically coupled to the output node.
    Type: Application
    Filed: March 14, 2013
    Publication date: September 18, 2014
    Applicant: CIRRUS LOGIC, INC.
    Inventors: Dan Shen, Johann Gaboriau, Lingli Zhang, Christian Larsen
  • Patent number: 8093951
    Abstract: An audio switching power amplifier having an output pulse voltage selected in conformity with an indication of the output signal amplitude provides lower electromagnetic interference (EMI) in class-D amplifier implementations, in particular, in inductor-less designs. The output pulse voltage may be selected by providing multiple switching circuits, such as half or fully bridge switches, with each switching circuit connected to a different power supply. One of the switching circuits is activated by the switching controller, while the others are disabled, providing selection of the output pulse voltage. Selection of a lower pulse voltage, when the maximum voltage is not required, reduces the generated EMI. The switching frequency of the class-D amplifier may also be controlled in conformity with the output signal amplitude, so that at higher output levels a lower switching rate is selected, reducing the generated EMI.
    Type: Grant
    Filed: September 28, 2009
    Date of Patent: January 10, 2012
    Assignee: Cirrus Logic, Inc.
    Inventors: Lingli Zhang, Dan Shen, Johann Gaboriau, Eric J. Swanson
  • Patent number: 7570118
    Abstract: A thermal overload protection circuit and method for protecting switching power amplifier circuits provides protection against latch-up and other failures due to energy returned from an inductive load when the amplifier output is disabled in response to a thermal overload condition. Upon detection of a thermal overload condition, rather than immediately disabling the switching power output stage, the switching power output stage is driven toward a fifty-percent duty cycle of operation for a predetermined time period so that energy stored in inductance of the load is reduced, preventing back-currents that would otherwise may cause latch-up within the integrated circuit when the switching power output stage is disabled. After the time period has elapsed, the switching power output stage is disabled. Alternatively, the current through the inductive load is measured and the switching power stage is disabled after the magnitude of the current has fallen below a threshold.
    Type: Grant
    Filed: September 27, 2007
    Date of Patent: August 4, 2009
    Assignee: Cirrus Logic, Inc.
    Inventors: Johann Gaboriau, Lingli Zhang, Randy Boudreaux
  • Patent number: 7554399
    Abstract: A protection circuit and method for protecting switching power amplifier circuits during reset provides protection against latch-up and other failures due to energy returned from an inductive load when the amplifier is reset. Upon receipt of a reset indication, rather than immediately disabling the switching power output stage, the switching power output stage is driven toward a fifty-percent duty cycle of operation for a time period so that energy stored in inductance of the load is reduced, preventing back-currents that would otherwise may cause latch-up of the output stage when the switching power output stage is disabled. After the time period has elapsed, the switching power output stage is disabled. Alternatively, the current through the inductive load is measured and the switching power stage is disabled after the magnitude of the current has fallen below a threshold.
    Type: Grant
    Filed: September 27, 2007
    Date of Patent: June 30, 2009
    Assignee: Cirrus Logic, Inc.
    Inventors: Johann Gaboriau, Lingli Zhang
  • Patent number: 7554409
    Abstract: An over-current protection circuit protection circuit and method for protecting switching power amplifier circuits provides protection against latch-up and other failures due to energy returned from an inductive load when one or more transistors in the amplifier output are disabled in response to an over-current condition. Upon detection of an over-current condition, the transistor corresponding to the over-current conduction direction is disabled. At the same time, the transistor corresponding to the conduction direction opposite the over-current direction is enabled for a predetermined time period, or until the magnitude of the load current has dropped, so that energy stored in inductance of the load is reduced, preventing back-currents that would otherwise cause latch-up and consequent destruction of the output stage when the switching power output stage is disabled. After the predetermined time period has elapsed or the load current has dropped below a threshold, the entire output stage is disabled.
    Type: Grant
    Filed: September 27, 2007
    Date of Patent: June 30, 2009
    Assignee: Cirrus Logic, Inc.
    Inventors: Lingli Zhang, Johann Gaboriau
  • Patent number: 7432842
    Abstract: A multi-channel signal processing system reduces electromagnetic interference (EMI) by staggering pulse edges of one or more pulse-width modulated signals (PWM signals) to prevent pulse edge overlap with at least one of the other PWM signals and inverting at least one of the PWM signals. Staggering and inverting the PWM signals reduces the total EMI power at any given time generated by the multi-channel signal processing system. Pulse edges can be staggered by advancing or delaying a pulse edge for one or more channels. Pulses can be staggered and inverted using static interleave and inversion subsystems or dynamically using controllable interleave and inversion control systems. In at least one embodiment, the multi-channel signal processing system includes high power, half-bridge amplifiers for each channel. The timing and phases of the PWM signals can be determined to reduce EMI from the half-bridge amplifiers caused by the PWM signals.
    Type: Grant
    Filed: December 20, 2006
    Date of Patent: October 7, 2008
    Assignee: Cirrus Logic, Inc.
    Inventors: John L. Melanson, Johann Gaboriau, Brian D. Trotter
  • Patent number: 7327296
    Abstract: The signal processing system includes a pulse width modulator (PWM) that receives input signals from a delta sigma modulator. The PWM generates an output signal having successive frames of PWM patterns. Modifying loop filter data, such as a loop filter output signal, of the delta sigma modulator modifies a delta-sigma modulator quantizer output signal, which in turn changes the frame-to-frame duty cycles of the pulse width modulator output. PWM patterns corresponding to substantially similar delta sigma modulator input signal levels have substantially identical pulse widths. The signal processing system shifts rising and falling edges of pulse width modulator output signals relative to pulse width modulated signals generated from unmodified signals by a quanta of time greater than any deviation between the pulse widths. The signal processing system shifts pulse edges of PWM patterns to spread the spectrum of intra-channel and inter-channel harmonic frequencies.
    Type: Grant
    Filed: September 22, 2006
    Date of Patent: February 5, 2008
    Assignee: Cirrus Logic, Inc.
    Inventors: Johann Gaboriau, John L. Melanson, Brian D. Trotter
  • Patent number: 7224218
    Abstract: A pre-charge apparatus and method for controlling startup transients in a capacitively-coupled switching power stage provide lower cost and improved startup transient performance in Class D amplifiers, as well as in other AC power converter applications. A charging source is activated at startup to control the charging of an external capacitor from a single power supply rail to an operating point voltage equal to the average DC output of the switching circuit, while a control circuit disables the output power stage of the switching converter. The current source may be a constant-current source and/or may be controlled via feedback from the voltage or current at the output terminal of the converter to taper the current level to more accurately control the charging. A discharge circuit can also be provided to discharge the output terminal to an opposite power supply rail before commencing the controlled charging.
    Type: Grant
    Filed: June 24, 2005
    Date of Patent: May 29, 2007
    Assignee: Cirrus Logic, Inc.
    Inventors: Jiandong Jiang, Lingli Zhang, Johann Gaboriau, John L. Melanson
  • Patent number: 7209064
    Abstract: The signal processing system includes a pulse width modulator (PWM) that receives a quantizer output signal from a delta sigma modulator. Each quantizer output signal represents one of N quantization levels. For at least one of the quantization levels, the PWM can generate multiple, different PWM patterns. Thus, each quantization level in at least a subset of the N quantization levels is associated with at least two PWM patterns. In at least one embodiment, the subset of quantization levels represents the quantization of low level samples of a quantizer input signal. By associating multiple PWM patterns to at least the subset of the quantization levels, the pulse edges of the PWM patterns in a frame are shifted in time with respect to subsequent PWM patterns, which spreads the spectrum of harmonic frequencies of the PWM output signal. Spreading the spectrum of harmonic frequencies of the PWM output signal can reduce electromagnetic interference (EMI).
    Type: Grant
    Filed: June 30, 2006
    Date of Patent: April 24, 2007
    Assignee: Cirrus Logic, Inc.
    Inventors: Johann Gaboriau, John L. Melanson