Patents by Inventor Johanna M. Swan

Johanna M. Swan has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 10976822
    Abstract: In accordance with disclosed embodiments, there are provided systems, methods, and apparatuses for implementing increased human perception of haptic feedback systems. For instance, there is disclosed in accordance with one embodiment there is wearable device, having therein: a wearable device case; a plurality of actuators within the wearable device case, each of which to vibrate independently or in combination; in which one surface of each of the plurality of actuators is exposed at a surface of the wearable device case; an elastomer surrounding the sides of each of the plurality of actuators within the wearable device case to hold the actuators in position within the wearable device case; and electrical interconnects from each of the plurality of actuators to internal semiconductor components of the wearable device. Other related embodiments are disclosed.
    Type: Grant
    Filed: October 1, 2016
    Date of Patent: April 13, 2021
    Assignee: Intel Corporation
    Inventors: Georgios C. Dogiamis, Aleksandar Aleksov, Johanna M. Swan
  • Patent number: 10969576
    Abstract: Disclosed herein are maskless imaging tools and display systems that include piezoelectrically actuated mirrors and methods of forming such devices. The maskless imaging tool may include a light source. Additionally, the tool may include one or more piezoelectrically actuated mirrors for receiving light from the light source. The piezoelectrically actuated mirrors are actuatable about one or more axes to reflect the light from the light source to a workpiece positioned to receive light from the piezoelectrically actuated mirror. Disclosed herein is a maskless imaging tool that is a laser direct imaging lithography (LDIL) tool. The maskless imaging tool may also be a via-drill tool. Disclosed herein is also a piezoelectrically actuated mirror used in a projection system. For example, the projection system may be integrated into a pair of glasses.
    Type: Grant
    Filed: April 1, 2016
    Date of Patent: April 6, 2021
    Assignee: Intel Corporation
    Inventors: Aleksandar Aleksov, Feras Eid, Sasha N. Oster, Shawna M. Liff, Johanna M. Swan, Thomas L. Sounart, Baris Bicen, Valluri R. Rao
  • Patent number: 10971453
    Abstract: Various embodiments disclosed relate to a semiconductor package. The present semiconductor package includes a substrate. The substrate is formed from alternating conducting layers and dielectric layers. A first active electronic component is disposed on an external surface of the substrate, and a second active electronic component is at least partially embedded within the substrate. A first interconnect region is formed from a plurality of interconnects between the first active electronic component and the second active electronic component. Between the first active electronic component and the substrate a second interconnect region is formed from a plurality of interconnects. Additionally, a third interconnect region is formed from a plurality of interconnects between the second active electronic component and the substrate.
    Type: Grant
    Filed: September 30, 2016
    Date of Patent: April 6, 2021
    Assignee: Intel Corporation
    Inventors: Adel A. Elsherbini, Johanna M. Swan, Shawna M. Liff, Henning Braunisch, Krishna Bharath, Javier Soto Gonzalez, Javier A. Falcon
  • Patent number: 10969574
    Abstract: Embodiments of the invention include a piezo-electric mirror in an microelectronic package and methods of forming the package. According to an embodiment the microelectronic package may include an organic substrate with a cavity formed in the organic substrate. In some embodiments, an actuator is anchored to the organic substrate and extends over the cavity. For example, the actuator may include a first electrode and a piezo-electric layer formed on the first electrode. A second electrode may be formed on the piezo-electric layer. Additionally, a mirror may be formed on the actuator. Embodiments allow for the piezo-electric layer to be formed on an organic package substrate by using low temperature crystallization processes. For example, the piezo-electric layer may be deposited in an amorphous state. Thereafter, a laser annealing process that includes a pulsed laser may be used to crystallize the piezo-electric layer.
    Type: Grant
    Filed: April 1, 2016
    Date of Patent: April 6, 2021
    Assignee: Intel Corporation
    Inventors: Sasha N. Oster, Feras Eid, Johanna M. Swan, Shawna M. Liff, Aleksandar Aleksov, Thomas L. Sounart, Baris Bicen, Valluri R. Rao
  • Patent number: 10964992
    Abstract: There is disclosed in one example an electromagnetic wave launcher apparatus, including: an interface to an electromagnetic waveguide; a first launcher configured to launch a high-frequency electromagnetic signal onto a first cross-sectional portion of the waveguide; and a second launcher configured to launch a lower-frequency electromagnetic signal onto a second cross-sectional portion of the waveguide.
    Type: Grant
    Filed: November 9, 2018
    Date of Patent: March 30, 2021
    Assignee: Intel Corporation
    Inventors: Georgios Dogiamis, Adel A. Elsherbini, Henning Braunisch, Gilbert W. Dewey, Telesphor Kamgaing, Hyung-Jin Lee, Johanna M. Swan
  • Patent number: 10964178
    Abstract: In accordance with disclosed embodiments, there are provided systems, methods, and apparatuses for implementing increased human perception of haptic feedback systems. For instance, there is disclosed in accordance with one embodiment there is wearable device, having therein: a wearable device case; a plurality of actuators within the wearable device case, each of which to vibrate independently or in combination; one or more pins attached to each of the plurality of actuators, one end of each of the plurality of pins affixed to the actuators extrudes beyond surface of the wearable device case and is exposed outside of the wearable device case; electrical interconnects from each of the plurality of actuators to internal semiconductor components of the wearable device. Other related embodiments are disclosed.
    Type: Grant
    Filed: October 1, 2016
    Date of Patent: March 30, 2021
    Assignee: Intel Corporation
    Inventors: Aleksandar Aleksov, Georgios C. Dogiamis, Johanna M. Swan
  • Publication number: 20210091443
    Abstract: Embodiments may relate to an assembly that includes a first package substrate with a first electromagnetic cavity. The assembly may further include a second package substrate with a second electromagnetic cavity that is adjacent to the first electromagnetic cavity. The first and second electromagnetic cavities may form a millimeter wave (mmWave) resonant cavity of a mmWave filter. Other embodiments may be described or claimed.
    Type: Application
    Filed: September 20, 2019
    Publication date: March 25, 2021
    Applicant: Intel Corporation
    Inventors: Aleksandar Aleksov, Telesphor Kamgaing, Georgios Dogiamis, Feras Eid, Johanna M. Swan
  • Patent number: 10950919
    Abstract: An apparatus comprises a waveguide section including an outer layer of conductive material tubular in shape and having multiple ends; and a joining feature on at least one of the ends of the waveguide section configured for joining to a second separate waveguide section.
    Type: Grant
    Filed: September 30, 2016
    Date of Patent: March 16, 2021
    Assignee: Intel Corporation
    Inventors: Telesphor Kamgaing, Georgios C. Dogiamis, Sasha N. Oster, Adel A. Elsherbini, Brandon M. Rawlings, Aleksandar Aleksov, Shawna M. Liff, Richard J. Dischler, Johanna M. Swan
  • Patent number: 10951248
    Abstract: Embodiments may relate to a radio frequency (RF) front-end module (FEM) with a first filter and a second filter. The RF FEM may include a termination inductor coupled to ground, and a switch that is to selectively couple the first filter and the second filter to the termination inductor. Other embodiments may be described or claimed.
    Type: Grant
    Filed: December 23, 2019
    Date of Patent: March 16, 2021
    Assignee: Intel Corporation
    Inventors: Telesphor Kamgaing, Feras Eid, Georgios Dogiamis, Aleksandar Aleksov, Johanna M. Swan
  • Publication number: 20210067132
    Abstract: Embodiments may relate to a radio frequency (RF) front-end module (FEM). The RF FEM may include an integrated die with an active portion and an acoustic wave resonator (AWR) portion adjacent to the active portion. The RF FEM may further include a lid coupled with the die. The lid may at least partially overlap the AWR portion at a surface of the die. Other embodiments may be described or claimed.
    Type: Application
    Filed: August 26, 2019
    Publication date: March 4, 2021
    Applicant: Intel Corporation
    Inventors: Telesphor Kamgaing, Georgios Dogiamis, Feras Eid, Aleksandar Aleksov, Johanna M. Swan
  • Publication number: 20210066184
    Abstract: Disclosed herein are capacitor-wirebond pad structures for integrated circuit (IC) packages, as well as related methods and devices. For example, in some embodiments, an IC package may include a die and an IC package support. The IC package support may include a capacitor, and the capacitor may include a first capacitor plate, a second capacitor plate, and a capacitor dielectric between the first capacitor plate and the second capacitor plate. The die may be wirebonded to the first capacitor plate.
    Type: Application
    Filed: August 28, 2019
    Publication date: March 4, 2021
    Applicant: INTEL CORPORATION
    Inventors: Aleksandar Aleksov, Feras Eid, Georgios Dogiamis, Telesphor Kamgaing, Johanna M. Swan
  • Publication number: 20210066265
    Abstract: Disclosed herein are tunable capacitor arrangements in integrated circuit (IC) package substrates, as well as related methods and devices. For example, in some embodiments, an IC package substrate may include a first embedded capacitor, a second embedded capacitor, and a fuse electrically coupled between the first embedded capacitor and the second embedded capacitor such that when the fuse is in a closed state, the first embedded capacitor and the second embedded capacitor are connected in parallel, and when the fuse is in an open state, the first embedded capacitor and the second embedded capacitor are not connected in parallel.
    Type: Application
    Filed: August 28, 2019
    Publication date: March 4, 2021
    Applicant: Intel Corporation
    Inventors: Feras Eid, Aleksandar Aleksov, Telesphor Kamgaing, Georgios Dogiamis, Johanna M. Swan, Sivakumar Nagarajan, Nitin A. Deshpande, Omkar G. Karhade, William James Lambert
  • Patent number: 10937594
    Abstract: Embodiments of the invention include a microelectronic device that includes a plurality of organic dielectric layers and a capacitor formed in-situ with at least one organic dielectric layer of the plurality of organic dielectric layers. The capacitor includes first and second conductive electrodes and an ultra-high-k dielectric layer that is positioned between the first and second conductive electrodes.
    Type: Grant
    Filed: June 27, 2017
    Date of Patent: March 2, 2021
    Assignee: Intel Corporation
    Inventors: Thomas L. Sounart, Aleksandar Aleksov, Feras Eid, Georgios C. Dogiamis, Johanna M. Swan, Kristof Darmawikarta
  • Patent number: 10921349
    Abstract: Embodiments of the invention include a current sensing device for sensing current in an organic substrate. The current sensing device includes a released base structure that is positioned in proximity to a cavity of the organic substrate and a piezoelectric film stack that is positioned in proximity to the released base structure. The piezoelectric film stack includes a piezoelectric material in contact with first and second electrodes. A magnetic field is applied to the current sensing device and this causes movement of the released base structure and the piezoelectric stack which induces a voltage (potential difference) between the first and second electrodes.
    Type: Grant
    Filed: July 1, 2016
    Date of Patent: February 16, 2021
    Assignee: Intel Corporation
    Inventors: Georgios C. Dogiamis, Adel A. Elsherbini, Shawna M. Liff, Johanna M. Swan, Jelena Culic-Viskota, Thomas L. Sounart, Feras Eid, Sasha N. Oster
  • Patent number: 10921524
    Abstract: Embodiments include a sensor node, a method of forming the sensor node, and a vehicle with a communication system that includes sensor nodes. A sensor node includes an interconnect with an input connector, an output connector, and an opening on one or more sidewalls. The sensor node also includes a package with one or more sidewalls, a top surface, and a bottom surface, where at least one of the sidewalls of the package is disposed on the opening of interconnect. The sensor node may have a control circuit on the package, a first millimeter-wave launcher on the package, and a sensor coupled to the control circuit, where the sensor is coupled to the control circuit with an electrical cable. The sensor node may include that at least one of the sidewalls of the package is crimped by the opening and adjacent and co-planar to an inner wall of the interconnect.
    Type: Grant
    Filed: December 30, 2017
    Date of Patent: February 16, 2021
    Assignee: Intel Corporation
    Inventors: Adel A. Elsherbini, Georgios C. Dogiamis, Sasha N. Oster, Erich N. Ewy, Telesphor Kamgaing, Johanna M. Swan
  • Patent number: 10923429
    Abstract: A multi-chip package includes a substrate (110) having a first side (111), an opposing second side (112), and a third side (213) that extends from the first side to the second side, a first die (120) attached to the first side of the substrate and a second die (130) attached to the first side of the substrate, and a bridge (140) adjacent to the third side of the substrate and attached to the first die and to the second die. No portion of the substrate is underneath the bridge. The bridge creates a connection between the first die and the second die. Alternatively, the bridge may be disposed in a cavity (615, 915) in the substrate or between the substrate and a die layer (750). The bridge may constitute an active die and may be attached to the substrate using wirebonds (241, 841, 1141, 1541).
    Type: Grant
    Filed: July 27, 2020
    Date of Patent: February 16, 2021
    Assignee: Intel Corporation
    Inventors: Henning Braunisch, Chia-Pin Chiu, Aleksandar Aleksov, Hinmeng Au, Stefanie M. Lotz, Johanna M. Swan, Sujit Sharan
  • Publication number: 20210043573
    Abstract: Disclosed herein are structures and assemblies that may be used for thermal management in integrated circuit (IC) packages.
    Type: Application
    Filed: August 6, 2019
    Publication date: February 11, 2021
    Applicant: Intel Corporation
    Inventors: Feras Eid, Telesphor Kamgaing, Georgios Dogiamis, Aleksandar Aleksov, Johanna M. Swan
  • Publication number: 20210043541
    Abstract: Disclosed herein are structures and assemblies that may be used for thermal management in integrated circuit (IC) packages.
    Type: Application
    Filed: August 6, 2019
    Publication date: February 11, 2021
    Applicant: Intel Corporation
    Inventors: Feras Eid, Telesphor Kamgaing, Georgios Dogiamis, Aleksandar Aleksov, Johanna M. Swan
  • Publication number: 20210044030
    Abstract: Embodiments may relate to a radio frequency (RF) multi-chip module that includes a first RF die and a second RF die. The first and second RF dies may be coupled with a package substrate at an inactive side of the respective dies. A bridge may be coupled with an active side of the first and second RF dies die such that the first and second RF dies are communicatively coupled through the bridge, and such that the first and second RF dies are at least partially between the package substrate and the bridge. Other embodiments may be described or claimed.
    Type: Application
    Filed: August 7, 2019
    Publication date: February 11, 2021
    Applicant: Intel Corporation
    Inventors: Aleksandar Aleksov, Feras Eid, Georgios Dogiamis, Telesphor Kamgaing, Johanna M. Swan
  • Publication number: 20210043544
    Abstract: Disclosed herein are structures and assemblies that may be used for thermal management in integrated circuit (IC) packages.
    Type: Application
    Filed: August 6, 2019
    Publication date: February 11, 2021
    Applicant: Intel Corporation
    Inventors: Feras Eid, Telesphor Kamgaing, Georgios Dogiamis, Aleksandar Aleksov, Johanna M. Swan