Patents by Inventor Johannes Lodermeyer

Johannes Lodermeyer has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 10923364
    Abstract: A method comprises: arranging a plurality of semiconductor chips above a carrier, wherein active main surfaces of the semiconductor chips face the carrier; filling a cavity with a molding material; pressing the semiconductor chips arranged on the carrier into the molding material; and separating the molding material with the semiconductor chips embedded therein from the carrier, wherein main surfaces of the semiconductor chips that are situated opposite the active main surfaces are covered by the molding material.
    Type: Grant
    Filed: August 31, 2018
    Date of Patent: February 16, 2021
    Assignee: Infineon Technologies AG
    Inventors: Kristina Mayer, Michael Ledutke, Johannes Lodermeyer
  • Patent number: 10734352
    Abstract: A metallic interconnection and a semiconductor arrangement including the same are described, wherein a method of manufacturing the same may include: providing a first structure including a first metallic layer having protruding first microstructures; providing a second structure including a second metallic layer having protruding second microstructures; contacting the first and second microstructures to form a mechanical connection between the structures, the mechanical connection being configured to allow fluid penetration; removing one or more non-metallic compounds on the first metallic layer and the second metallic layer with a reducing agent that penetrates the mechanical connection and reacts with the one or more non-metallic compounds; and heating the first metallic layer and the second metallic layer at a temperature causing interdiffusion of the first metallic layer and the second metallic layer to form the metallic interconnection between the structures.
    Type: Grant
    Filed: October 1, 2018
    Date of Patent: August 4, 2020
    Assignee: Infineon Technologies AG
    Inventors: Irmgard Escher-Poeppel, Khalil Hosseini, Johannes Lodermeyer, Joachim Mahler, Thorsten Meyer, Georg Meyer-Berg, Ivan Nikitin, Reinhard Pufall, Edmund Riedl, Klaus Schmidt, Manfred Schneegans, Patrick Schwarz
  • Patent number: 10571682
    Abstract: A microelectromechanical systems (MEMS) package assembly and a method of manufacturing the same is provided. The MEMS package assembly includes a substrate, a housing coupled to the substrate to form a cavity, wherein the housing includes a transparent plate disposed above and parallel to the substrate and is configured to permit a transmission of light therethrough, and a MEMS chip disposed within the cavity and including a first main surface proximal to the transparent plate and a second main surface opposite to the first main surface and coupled to the substrate. The MEMS chip is oriented such that the first main surface is tilted at a tilt angle with respect to the transparent plate.
    Type: Grant
    Filed: August 10, 2017
    Date of Patent: February 25, 2020
    Assignee: Infineon Technologies AG
    Inventors: Ludwig Heitzer, Derek Debie, Klaus Elian, Cyrus Ghahremani, Johannes Lodermeyer, Oskar Neuhoff, Johann Strasser
  • Patent number: 10549985
    Abstract: A semiconductor package includes a semiconductor die having a sensor structure disposed at a first side of the semiconductor die, and a first port extending through the semiconductor die from the first side to a second side of the semiconductor die opposite the first side, so as to provide a link to the outside environment. Corresponding methods of manufacture are also provided.
    Type: Grant
    Filed: August 31, 2017
    Date of Patent: February 4, 2020
    Assignee: Infineon Technologies AG
    Inventors: Dominic Maier, Matthias Steiert, Chau Fatt Chiang, Christian Geissler, Bernd Goller, Thomas Kilger, Johannes Lodermeyer, Franz-Xaver Muehlbauer, Chee Yang Ng, Beng Keh See, Claus Waechter
  • Patent number: 10539779
    Abstract: A microelectromechanical systems (MEMS) package assembly and a method of manufacturing the same is provided. The MEMS package assembly includes a substrate, a housing coupled to the substrate to form a cavity, wherein the housing includes a transparent plate disposed above and parallel to the substrate and is configured to permit a transmission of light therethrough, and a MEMS chip disposed within the cavity and including a first main surface proximal to the transparent plate and a second main surface opposite to the first main surface and coupled to the substrate. The MEMS chip is oriented such that the first main surface is tilted at a tilt angle with respect to the transparent plate.
    Type: Grant
    Filed: August 10, 2017
    Date of Patent: January 21, 2020
    Assignee: Infineon Technologies AG
    Inventors: Ludwig Heitzer, Derek Debie, Klaus Elian, Cyrus Ghahremani, Johannes Lodermeyer, Oskar Neuhoff, Johann Strasser
  • Publication number: 20200021002
    Abstract: A semiconductor device including an Integrated Circuit (IC) package and a plastic waveguide. The IC package includes a semiconductor chip; and an embedded antenna formed within a Redistribution Layer (RDL) coupled to the semiconductor chip, wherein the RDL is configured to transport a Radio Frequency (RF) signal between the semiconductor chip and the embedded antenna. The plastic waveguide is attached to the IC package and configured to transport the RF signal between the embedded antenna and outside of the IC package.
    Type: Application
    Filed: July 11, 2018
    Publication date: January 16, 2020
    Inventors: Maciej Wojnowski, Dirk Hammerschmidt, Walter Hartner, Johannes Lodermeyer, Chiara Mariotti, Thorsten Meyer
  • Publication number: 20190198455
    Abstract: A semiconductor apparatus comprises: a circuit board; a semiconductor package having a main surface, wherein the semiconductor package is arranged on the circuit board and the main surface faces the circuit board; a radio-frequency line element of the semiconductor package, which radio-frequency line element is arranged on the main surface or inside the semiconductor package, wherein the radio-frequency line element is designed to transmit a signal at a frequency of greater than 10 GHz; and an underfiller material arranged between the circuit board and the semiconductor package, wherein the radio-frequency line element and the underfiller material do not overlap in an orthogonal projection onto the main surface.
    Type: Application
    Filed: December 20, 2018
    Publication date: June 27, 2019
    Inventors: Walter HARTNER, Christian GEISSLER, Thomas KILGER, Johannes LODERMEYER, Franz-Xaver MUEHLBAUER, Martin Richard NIESSNER, Claus WAECHTER
  • Publication number: 20190103378
    Abstract: A metallic interconnection and a semiconductor arrangement including the same are described, wherein a method of manufacturing the same may include: providing a first structure including a first metallic layer having protruding first microstructures; providing a second structure including a second metallic layer having protruding second microstructures; contacting the first and second microstructures to form a mechanical connection between the structures, the mechanical connection being configured to allow fluid penetration; removing one or more non-metallic compounds on the first metallic layer and the second metallic layer with a reducing agent that penetrates the mechanical connection and reacts with the one or more non-metallic compounds; and heating the first metallic layer and the second metallic layer at a temperature causing interdiffusion of the first metallic layer and the second metallic layer to form the metallic interconnection between the structures.
    Type: Application
    Filed: October 1, 2018
    Publication date: April 4, 2019
    Inventors: Irmgard Escher-Poeppel, Khalil Hosseini, Johannes Lodermeyer, Joachim Mahler, Thorsten Meyer, Georg Meyer-Berg, Ivan Nikitin, Reinhard Pufall, Edmund Riedl, Klaus Schmidt, Manfred Schneegans, Patrick Schwarz
  • Publication number: 20190074198
    Abstract: A method comprises: arranging a plurality of semiconductor chips above a carrier, wherein active main surfaces of the semiconductor chips face the carrier; filling a cavity with a molding material; pressing the semiconductor chips arranged on the carrier into the molding material; and separating the molding material with the semiconductor chips embedded therein from the carrier, wherein main surfaces of the semiconductor chips that are situated opposite the active main surfaces are covered by the molding material.
    Type: Application
    Filed: August 31, 2018
    Publication date: March 7, 2019
    Inventors: Kristina MAYER, Michael LEDUTKE, Johannes LODERMEYER
  • Publication number: 20190049716
    Abstract: A microelectromechanical systems (MEMS) package assembly and a method of manufacturing the same is provided. The MEMS package assembly includes a substrate, a housing coupled to the substrate to form a cavity, wherein the housing includes a transparent plate disposed above and parallel to the substrate and is configured to permit a transmission of light therethrough, and a MEMS chip disposed within the cavity and including a first main surface proximal to the transparent plate and a second main surface opposite to the first main surface and coupled to the substrate. The MEMS chip is oriented such that the first main surface is tilted at a tilt angle with respect to the transparent plate.
    Type: Application
    Filed: August 10, 2017
    Publication date: February 14, 2019
    Applicant: Infineon Technologies AG
    Inventors: Ludwig HEITZER, Derek DEBIE, Klaus ELIAN, Cyrus GHAHREMANI, Johannes LODERMEYER, Oskar NEUHOFF, Johann STRASSER
  • Publication number: 20180148322
    Abstract: A semiconductor package includes a semiconductor die having a sensor structure disposed at a first side of the semiconductor die, and a first port extending through the semiconductor die from the first side to a second side of the semiconductor die opposite the first side, so as to provide a link to the outside environment. Corresponding methods of manufacture are also provided.
    Type: Application
    Filed: August 31, 2017
    Publication date: May 31, 2018
    Inventors: Dominic Maier, Matthias Steiert, Chau Fatt Chiang, Christian Geissler, Bernd Goller, Thomas Kilger, Johannes Lodermeyer, Franz-Xaver Muehlbauer, Chee Yang Ng, Beng Keh See, Claus Waechter
  • Publication number: 20170283247
    Abstract: A semiconductor device includes a microelectromechanical system (MEMS) die, a lid, and an integrated circuit die. The lid is over the MEMS die and defines a cavity between the lid and the MEMS die. The integrated circuit die is attached to an inner side of the lid. The integrated circuit die is electrically coupled to the MEMS die.
    Type: Application
    Filed: April 4, 2016
    Publication date: October 5, 2017
    Applicant: Infineon Technologies AG
    Inventors: Thorsten Meyer, Dominic Maier, Johannes Lodermeyer, Bernd Stadler
  • Patent number: 9437516
    Abstract: A semiconductor package includes a semiconductor die and a metal clip. In one embodiment, the semiconductor die is embedded in an insulating material and has a first surface facing in a first direction, a second surface facing in a second direction opposite the first direction and an edge extending between the first and second surfaces. The metal clip is embedded in the insulating material above the die and bonded to the second surface of the die. Part of the metal clip extends laterally beyond the edge of the die and vertically in the first direction to provide galvanic redistribution at the second surface of the die. Other embodiments of semiconductor packages are also provided.
    Type: Grant
    Filed: January 7, 2014
    Date of Patent: September 6, 2016
    Assignee: Infineon Technologies Austria AG
    Inventors: Ralf Otremba, Josef Höglauer, Manfred Schindler, Johannes Lodermeyer, Thorsten Scharf
  • Patent number: 9331060
    Abstract: A device includes a first power semiconductor chip with a first contact pad and a second contact pad on a first face and a third contact pad on the second face. The device further includes a second power semiconductor chip with a first contact pad and a second contact pad on a first face and a third contact pad on the second face. The first and second power semiconductor chips are arranged one above another, and the first face of the first power semiconductor chip faces in the direction of the first face of the second power semiconductor chip. In addition, the first power semiconductor chip is located laterally at least partially outside of the outline of the second power semiconductor chip.
    Type: Grant
    Filed: February 9, 2015
    Date of Patent: May 3, 2016
    Assignee: Infineon Technologies AG
    Inventors: Ralf Otremba, Josef Hoeglauer, Joachim Mahler, Johannes Lodermeyer
  • Publication number: 20150194362
    Abstract: A semiconductor package includes a semiconductor die and a metal clip. In one embodiment, the semiconductor die is embedded in an insulating material and has a first surface facing in a first direction, a second surface facing in a second direction opposite the first direction and an edge extending between the first and second surfaces. The metal clip is embedded in the insulating material above the die and bonded to the second surface of the die. Part of the metal clip extends laterally beyond the edge of the die and vertically in the first direction to provide galvanic redistribution at the second surface of the die. Other embodiments of semiconductor packages are also provided.
    Type: Application
    Filed: January 7, 2014
    Publication date: July 9, 2015
    Inventors: Ralf Otremba, Josef Höglauer, Manfred Schindler, Johannes Lodermeyer, Thorsten Scharf
  • Publication number: 20150155271
    Abstract: A device includes a first power semiconductor chip with a first contact pad and a second contact pad on a first face and a third contact pad on the second face. The device further includes a second power semiconductor chip with a first contact pad and a second contact pad on a first face and a third contact pad on the second face. The first and second power semiconductor chips are arranged one above another, and the first face of the first power semiconductor chip faces in the direction of the first face of the second power semiconductor chip. In addition, the first power semiconductor chip is located laterally at least partially outside of the outline of the second power semiconductor chip.
    Type: Application
    Filed: February 9, 2015
    Publication date: June 4, 2015
    Inventors: Ralf Otremba, Josef Hoeglauer, Joachim Mahler, Johannes Lodermeyer
  • Patent number: 8975711
    Abstract: A device includes a first power semiconductor chip with a first contact pad and a second contact pad on a first face and a third contact pad on the second face. The device further includes a second power semiconductor chip with a first contact pad and a second contact pad on a first face and a third contact pad on the second face. The first and second power semiconductor chips are arranged one above another, and the first face of the first power semiconductor chip faces in the direction of the first face of the second power semiconductor chip. In addition, the first power semiconductor chip is located laterally at least partially outside of the outline of the second power semiconductor chip.
    Type: Grant
    Filed: December 8, 2011
    Date of Patent: March 10, 2015
    Assignee: Infineon Technologies AG
    Inventors: Ralf Otremba, Josef Hoeglauer, Joachim Mahler, Johannes Lodermeyer
  • Patent number: 8603864
    Abstract: A method of fabricating a semiconductor device. One embodiment provides a metal carrier. A semiconductor chip is provided. A porous layer is produced at a surface of at least one of the carrier and the semiconductor chip. The semiconductor chip is placed on the carrier. The resulting structure is heated until the semiconductor chip is attached to the carrier.
    Type: Grant
    Filed: September 11, 2008
    Date of Patent: December 10, 2013
    Assignee: Infineon Technologies AG
    Inventors: Edmund Riedl, Ivan Nikitin, Johannes Lodermeyer, Robert Bergmann, Karsten Guth
  • Publication number: 20130146991
    Abstract: A device includes a first power semiconductor chip with a first contact pad and a second contact pad on a first face and a third contact pad on the second face. The device further includes a second power semiconductor chip with a first contact pad and a second contact pad on a first face and a third contact pad on the second face. The first and second power semiconductor chips are arranged one above another, and the first face of the first power semiconductor chip faces in the direction of the first face of the second power semiconductor chip. In addition, the first power semiconductor chip is located laterally at least partially outside of the outline of the second power semiconductor chip.
    Type: Application
    Filed: December 8, 2011
    Publication date: June 13, 2013
    Applicant: Infineon Technologies AG
    Inventors: Ralf Otremba, Josef Hoeglauer, Joachim Mahler, Johannes Lodermeyer
  • Patent number: 7989930
    Abstract: A semiconductor package includes a leadframe defining a die pad, a chip electrically coupled to the die pad, encapsulation material covering the chip and the die pad, and a plurality of lead ends exposed relative to the encapsulation material and configured for electrical communication with the chip, and a nitrogen-containing hydrocarbon coating disposed over at least the lead ends of the leadframe, where the hydrocarbon coating is free of metal particles.
    Type: Grant
    Filed: October 25, 2007
    Date of Patent: August 2, 2011
    Assignee: Infineon Technologies AG
    Inventors: Edmund Riedl, Joachim Mahler, Johannes Lodermeyer, Mathias Vaupel, Steffen Jordan