Abstract: A hand-held electronic device with a keyboard, thumbwheel, display and associated software is optimized for use of the device with the thumbs. The associated software has a plurality of features to optimize efficient use of the limited keyboard space and encourage the use of the device by thumb-based data entry through the thumbwheel and/or through a combination of minimal number of keystrokes. Software features include international character scrolling, and auto-capitalization. The keys on the device keyboard are optimally shaped and configured for thumb-based input. In addition, the thumbwheel is inclined between the front and a side edge of the device so as to be reachable by either the thumb or index finger of the user's hand at the side edge of the device.

Abstract: A hand-held electronic device with a keyboard, thumbwheel, display and associated software is optimized for use of the device with the thumbs. The associated software has a plurality of features to optimize efficient use of the limited keyboard space and encourage the use of the device by thumb-based data entry through the thumbwheel and/or through a combination of minimal number of keystrokes. Software features include international character scrolling, and auto-capitalization. The keys on the device keyboard are optimally shaped and configured for thumb-based input. In addition, the thumbwheel is inclined between the front and a side edge of the device so as to be reachable by either the thumb or index finger of the user's hand at the side edge of the device.

Abstract: A method for fabricating a metal-oxide-semiconductor device structure. The method includes introducing a dopant species concurrently into a semiconductor active layer that overlies an insulating layer and a gate electrode overlying the semiconductor active layer by ion implantation. The thickness of the semiconductor active layer, the thickness of the gate electrode, and the kinetic energy of the dopant species are chosen such that the projected range of the dopant species in the semiconductor active layer and insulating layer lies within the insulating layer and a projected range of the dopant species in the gate electrode lies within the gate electrode. As a result, the semiconductor active layer and the gate electrode may be doped simultaneously during a single ion implantation and without the necessity of an additional implant mask.

Abstract: A cover for a display device and a case for a communication device are provided. The cover comprises: external dimensions shaped to fit said cover in a case for said communication device; a top surface; a bottom surface; a non-opaque region adapted to cover said display device allowing a user to see said display device; and a region defining a top of an enclosure cavity for a speaker associated with said communication device. Sound holes in the cover are preferably present. A recess around the region is provided for fitting with a cover for the recess. A communication device comprising the cover is also provided. The case comprises: an exterior frame; a first opening in the frame; an internal wall defined within the exterior frame; a first cavity located in the internal wall; and an air channel to connect the first cavity to a region in the case.

Abstract: A conductive layer in an integrated circuit is formed as a sandwich having multiple sublayers, including at least two sublayers of oriented carbon nanotubes. A first sublayer is created by growing carbon nanotubes in a first direction parallel to the chip substrate from a catalyst in the presence of a reactant gas flow in the first direction, and a second sublayer is created by growing carbon nanotubes in a second direction parallel to the substrate and different from the first direction from a catalyst in the presence of a reactant gas flow in the second direction. The first and second directions are preferably substantially perpendicular. The conductive layer sandwich preferably contains one or more additional sublayers of a conductive material, such as a metal.

Abstract: A hand-held electronic device with a keyboard, thumbwheel, display and associated software is optimized for use of the device with the thumbs. The associated software has a plurality of features to optimize efficient use of the limited keyboard space and encourage the use of the device by thumb-based data entry through the thumbwheel and/or through a combination of minimal number of keystrokes. Software features include international character scrolling, and auto-capitalization. The keys on the device keyboard are optimally shaped and configured for thumb-based input. In addition, the thumbwheel is inclined between the front and a side edge of the device so as to be reachable by either the thumb or index finger of the user's hand at the side edge of the device.

Abstract: A new lithographic process comprises reducing the linewidth of an image while maintaining the lithographic process window, and using this process to fabricate pitch split structures comprising nm order (e.g., about 22 nm) node semiconductor devices. The process comprises applying a lithographic resist layer on a surface of a substrate and patterning and developing the lithographic resist layer to form a nm order node image having an initial line width. Overcoating the nm order node image with an acidic polymer produces an acidic polymer coated image. Heating the acidic polymer coated image gives a heat treated coating on the image, the heating being conducted at a temperature and for a time sufficient to reduce the initial linewidth to a subsequent narrowed linewidth. Developing the heated treated coating removes it from the image resulting in a free-standing trimmed lithographic feature on the substrate. Optionally repeating the foregoing steps further reduces the linewidth of the narrowed line.

Abstract: A method for fabricating a metal-oxide-semiconductor device structure. The method includes introducing a dopant species concurrently into a semiconductor active layer that overlies an insulating layer and a gate electrode overlying the semiconductor active layer by ion implantation. The thickness of the semiconductor active layer, the thickness of the gate electrode, and the kinetic energy of the dopant species are chosen such that the projected range of the dopant species in the semiconductor active layer and insulating layer lies within the insulating layer and a projected range of the dopant species in the gate electrode lies within the gate electrode. As a result, the semiconductor active layer and the gate electrode may be doped simultaneously during a single ion implantation and without the necessity of an additional implant mask.

Abstract: A structure and a method for forming the same. The method includes providing a structure which includes (a) a to-be-patterned layer, (b) a photoresist layer on top of the to-be-patterned layer wherein the photoresist layer includes a first opening, and (c) a cap region on side walls of the first opening. A first top surface of the to-be-patterned layer is exposed to a surrounding ambient through the first opening. The method further includes performing a first lithography process resulting in a second opening in the photoresist layer. The second opening is different from the first opening. A second top surface of the to-be-patterned layer is exposed to a surrounding ambient through the second opening.

Abstract: A digital camera is mounted to a circuit-board in a cellphone. The camera is mounted in a plastic main-body, and is supported therein on a bed of springs, which provides a stable resilient mechanical support. The springs double as connector-strips, being electrically-active connector-strips for conducting electrical signals and services between the component and a circuit-board. The connector-strips are solidly attached to the circuit-board, by being soldered thereto. The main-body is not attached directly to the circuit-board, but rather is attached directly to the connector-strips. These measures ensure that the camera is mechanically isolated from the circuit-board whereby, if the cellphone is dropped or knocked, the inertia of the camera does not damage the circuit board.

Abstract: Acceleration and voltage measurement devices and methods of fabricating acceleration and voltage measurement devices. The acceleration and voltage measurement devices including an electrically conductive plate on a top surface of a first insulating layer; a second insulating layer on a top surface of the conductive plate, the top surface of the plate exposed in an opening in the second insulating layer; conductive nanotubes suspended across the opening, and electrically conductive contacts to the nanotubes.

Abstract: A rotor for a generator includes a cylindrical rotor body with axial winding slots which are arranged in a distributed manner over the circumference and in which are arranged conductor elements which extend in the axial direction. A cooling medium from a sub-slot which is arranged at the bottom of the winding slot is fed along the axis in periodic intervals to the conductor elements. Beneath the conductor elements provision is made for ripple springs which in each case press the conductor elements of a winding slot against a slot wedge which closes off the winding slot at the top. With such a rotor, an adequate spring force is achieved by the ripple springs being arranged at the bottom of the sub-slot and, via an axial profile which is arranged in the sub-slot, acting by their spring force upon the conductor elements which lie above them.

Abstract: A longwall mining system includes at least one face end roof support having a longitudinal length, and at least one near end roof support adjacent the face end roof support. The near end roof support has a longitudinal length substantially shorter than the face end roof support longitudinal length. There is also at least one face roof support adjacent the near end roof support, and the face roof support has a longitudinal length substantially shorter than the near end roof support longitudinal length. There is also a forward conveyor extending forward to and attached to the face end roof support, the at least one near end roof support, and the at least one face roof support, and a rearward conveyor extending rearward of and attached to the face end roof support, the at least one near end roof support, and the at least one face roof support.

Abstract: A new lithographic process comprises reducing the linewidth of an image while maintaining the lithographic process window, and using this process to fabricate pitch split structures comprising nm order (e.g., about 22 nm) node semiconductor devices. The process comprises applying a lithographic resist layer on a surface of a substrate and patterning and developing the lithographic resist layer to form a nm order node image having an initial line width. Overcoating the nm order node image with an acidic polymer produces an acidic polymer coated image. Heating the acidic polymer coated image gives a heat treated coating on the image, the heating being conducted at a temperature and for a time sufficient to reduce the initial linewidth to a subsequent narrowed linewidth. Developing the heated treated coating removes it from the image resulting in a free-standing trimmed lithographic feature on the substrate. Optionally repeating the foregoing steps further reduces the linewidth of the narrowed line.

Abstract: Methods for synthesizing carbon nanotubes and structures formed thereby, includes forming carbon nanotubes on a plurality of synthesis sites supported by a first substrate, interrupting nanotube synthesis, mounting a free end of each carbon nanotube to a second substrate, and removing the first substrate. Each carbon nanotube is capped by one of the synthesis sites, to which growth reactants have ready access.

Abstract: Carbon nanotube field effect transistors, arrays of carbon nanotube field effect transistors, device structures, and arrays of device structures. A stacked device structure includes a gate electrode layer and catalyst pads each coupled electrically with a source/drain contact. The gate electrode layer is divided into multiple gate electrodes and at least one semiconducting carbon nanotube is synthesized by a chemical vapor deposition process on each of the catalyst pads. The gate electrode has a sidewall covered by a gate dielectric and at least one semiconducting carbon nanotube adjacent to the sidewall of the gate electrode. Source/drain contacts are electrically coupled with opposite ends of the semiconducting carbon nanotube to complete the device structure. Multiple device structures may be configured either as a memory circuit or as a logic circuit.

Abstract: A conductive layer in an integrated circuit is formed as a sandwich having multiple sublayers, including at least one sublayer of oriented carbon nanotubes. The conductive layer sandwich preferably contains two sublayers of carbon nanotubes, in which the carbon nanotube orientation in one sublayer is substantially perpendicular to that of the other layer. The conductive layer sandwich preferably contains one or more additional sublayers of a conductive material, such as a metal. In one embodiment, oriented carbon nanotubes are created by forming a series of elongated parallel catalyst strips on a horizontal surface, and growing carbon nanotubes from the catalyst in the presence of a directional flow of reactant gases.

Abstract: A method for forming carbon nanotube field effect transistors, arrays of carbon nanotube field effect transistors, and device structures and arrays of device structures formed by the methods. The methods include forming a stacked structure including a gate electrode layer and catalyst pads each coupled electrically with a source/drain contact. The gate electrode layer is divided into multiple gate electrodes and at least one semiconducting carbon nanotube is synthesized by a chemical vapor deposition process on each of the catalyst pads. The completed device structure includes a gate electrode with a sidewall covered by a gate dielectric and at least one semiconducting carbon nanotube adjacent to the sidewall of the gate electrode. Source/drain contacts are electrically coupled with opposite ends of the semiconducting carbon nanotube to complete the device structure. Multiple device structures may be configured either as a memory circuit or as a logic circuit.

Abstract: A method of forming an image in a photoresist layer. The method includes, providing a substrate; forming the photoresist layer over the substrate; forming a contamination gettering topcoat layer over the photoresist layer, the contamination gettering topcoat layer including one or more polymers and one or more cation complexing agents; exposing the photoresist layer to actinic radiation through a photomask having opaque and clear regions, the opaque regions blocking the actinic radiation and the clear regions being transparent to the actinic radiation, the actinic radiation changing the chemical composition of regions of the photoresist layer exposed to the radiation forming exposed and unexposed regions in the photoresist layer; and removing either the exposed regions of the photoresist layer or the unexposed regions of the photoresist layer. The contamination gettering topcoat layer includes one or more polymers, one or more cation complexing agents and a casting solvent.

Abstract: A conductive layer in an integrated circuit is formed as a sandwich having multiple sublayers, including at least one sublayer of oriented carbon nanotubes. The conductive layer sandwich preferably contains two sublayers of carbon nanotubes, in which the carbon nanotube orientation in one sublayer is substantially perpendicular to that of the other layer. The conductive layer sandwich preferably contains one or more additional sublayers of a conductive material, such as a metal. In one embodiment, oriented carbon nanotubes are created by forming a series of parallel surface ridges, covering the top and one side of the ridges with a catalyst inhibitor, and growing carbon nanotubes horizontally from the uncovered vertical sides of the ridges. In another embodiment, oriented carbon nanotubes are grown on the surface of a conductive material in the presence of a directional flow of reactant gases and a catalyst.