Abstract: A method of manufacturing a microelectromechanical device includes forming at least two conductive layers on a substrate. An isolation layer is formed between the two conductive layers. The conductive layers are electrically coupled together and then the isolation layer is removed to form a gap between the conductive layers. The electrical coupling of the layers mitigates or eliminates the effects of electrostatic charge build up on the device during the removal process.

Abstract: In one embodiment, the invention provides a method for fabricating a microelectromechanical systems device. The method comprises fabricating a first layer comprising a film having a characteristic electromechanical response, and a characteristic optical response, wherein the characteristic optical response is desirable and the characteristic electromechanical response is undesirable; and modifying the characteristic electromechanical response of the first layer by at least reducing charge build up thereon during activation of the microelectromechanical systems device.

Abstract: A thin film transistor and a liquid crystal display panel are provided. These devices include a layer of ammonia-free silicon nitride formed between the gate and the gate insulator of the device.

Abstract: A thin film transistor and a liquid crystal display panel are provided. These devices include a layer of ammonia-free silicon nitride formed between the gate and the gate insulator of the device.

Abstract: A method for passivating copper, aluminum, or other refractory metal films using ammonia-free silicon nitride and structures produced by the method. A thin film transistor for use in a liquid crystal display and a method of constructing the same, wherein the transistor has a gate, a source and a drain, and a gate insulator between the gate and an active silicon layer. The improvement is a layer of the ammonia-free silicon nitride deposited between the copper,aluminum, or other refractory metal gate and the gate insulator. Further,. the gate is copper, aluminum, or another refractory metal and is deposited directly on the substrate. The layer of ammonia-free silicon nitride is also deposited on portions of the substrate adjacent the gate and the gate line extending therefrom. The layer is made in a plasma-enhanced chemical vapor deposition process wherein the gas mixture comprises one part silane to 135 parts nitrogen to 100 parts helium and 100 parts hydrogen.

Abstract: A dilution refrigerator includes a still; a mixing chamber; a pump to pump coolant from the still through a still outlet port and a heat exchanger connected between the still and mixing chamber whereby coolant flows under the assistance of the pump from the still to the mixing chamber and from the mixing chamber to the still through respective first and second adjacent paths in the heat exchanger. An access path extends to the mixing chamber. A probe is provided for insertion along the access path, the probe having a displacer which substantially fills the cross-section of the access path in use. Any coolant from the mixing chamber which flows along the access path past the displacer can flow from the access path into the still. The still outlet port is separate from the access path.

Abstract: A method for passivating copper, aluminum, or other refractory metal films using ammonia-free silicon nitride and structures produced by the method. A thin film transistor for use in a liquid crystal display and a method of constructing the same, wherein the transistor has a gate, a source and a drain, and a gate insulator between the gate and an active silicon layer. The improvement is a layer of the ammonia-free silicon nitride deposited between the copper, aluminum, or other refractory metal gate and the gate insulator. Further, the gate is copper, aluminum, or another refractory metal and is deposited directly on the substrate. The layer of ammonia-free silicon nitride is also deposited on portions of the substrate adjacent the gate and the gate line extending therefrom. The layer is made in a plasma-enhanced chemical vapor deposition process wherein the gas mixture comprises one part silane to 135 parts nitrogen to 100 parts helium and 100 parts hydrogen.

Abstract: A layer for passivating copper, aluminum, or other refractory metal films using ammonia-free silicon nitride and structures produced by the method. A thin film transistor for use in a liquid crystal display, wherein the transistor has a gate, a source and a drain, and a gate insulator between the gate and an active silicon layer. The improvement is a layer of the ammonia-free silicon nitride deposited between the copper, aluminum, or other refractory metal gate and the gate insulator. Further, the gate is copper, aluminum, or another refractory metal and is deposited directly on the substrate. The layer of ammonia-free silicon nitride is also deposited on portions of the substrate adjacent the gate and the gate line extending therefrom. The structure provides stable and low-resistance electrical contact between copper, aluminum, or another refractory metal gate lines and a metallization layer of aluminum and/or molybdenum, includes using a conductive material, such as an indium tin oxide bridge.

Abstract: A substrate having silicon receptive surface areas is maintained in a plasma enhanced chemical vapor deposition (PECVD) chamber at a temperature, and under sufficient gas flow, pressure and applied energy conditions to form a gas plasma. The gas plasma is typically made up of hydrogen, but may be made up of mixtures of hydrogen with other gasses. A discontinuous flow of silane gas of predetermined duration and predetermined time spacing is introduced to produce at least one timed pulse of silane gas containing plasma, whereby a thin layer of silicon is deposited on the receptive areas of the substrate. The thin layer of silicon is exposed to the hydrogen gas plasma between the brief deposition time cycles and may result in the modification of the silicon layer by the hydrogen plasma.

Abstract: Unpinned epitaxial metal-oxide-compound semiconductor structures are disclosed and a method of fabricating such structures is described. Epitaxial layers of compound semiconductor are grown by MBE which result in the formation of a smooth surface having a stabilized reconstruction. An elemental semiconductor layer is deposited epitaxially in situ with the compound semiconductor layer which unpins the surface Fermi level. A layer of insulator material is then deposited on the elemental semiconductor layer by PECVD. In one embodiment, the compound semiconductor is GaAs and the elemental semiconductor is Si. The insulator material is a layer of high quality SiO.sub.2. A metal gate is deposited on the SiO.sub.2 layer to form an MOS device. The epitaxial GaAs layer has a density of states which permits the interface Fermi level to be moved through the entire forbidden energy gap. In another embodiment, the SiO.sub.

Abstract: A method for depositing high quality silicon dioxide in a plasma enhanced chemical vapor deposition tool is described. The reactant gases are introduced into the tool together with a large amount of an inert carrier gas. A plasma discharge is established in tool by using a high RF power density thereby depositing high quality silicon dioxide at very high deposition rates. In a single wafer tool, the RF power density is in the range of 1-4 W/cm.sup.2 and the deposition rate is from 600-1500 angstroms per minute for depositing high quality SiO.sub.2 films.

Abstract: Thin film field effect transistors are disclosed having direct or near direct contact of the source and drain electrodes to the channel region. Inverted gate and non-inverted gate types are fabricated by forming metallic source and drain electrodes within a layer of semiconductor material in contact with the channel region. The electrodes are formed by converting monocrystalline, polycrystalline or amorphous silicon regions to a refractory metal such as tungsten by using a non-self-limiting metal hexafluoride reduction process. The tungsten conversion process is isotropic and provides self-alignment of the source and drain electrodes with the gate in the non-inverted gate TFT. The process is low temperature, allowing the use of amorphous silicon as the semiconductor material. The transistors are especially useful for formation on large glass substrates for fabricating large flat panel displays.

Abstract: Unpinned epitaxial metal-oxide-compound semiconductor structures are disclosed and a method of fabricating such structures is described. Epitaxial layers of compound semiconductor are grown by MBE which result in the formation of a smooth surface having a stabilized reconstruction. An elemental semiconductor layer is deposited epitaxially in-situ with the compound semiconductor layer which unpins the surface Fermi level. A layer of insulator material is then deposited on the elemental semiconductor layer by PECVD. In one embodiment, the compound semiconductor is GaAs and the elemental semiconductor is Si. The insulator material is a layer of high quality SiO.sub.2. A metal gate is deposited on the SiO.sub.2 layer to form an MOS device. The epitaxial GaAs layer has a density of states which permits the interface Fermi level to be moved through the entire forbidden energy gap. In another embodiment, the SiO.sub.