Abstract: Improved methods, systems, and apparatuses are disclosed for testing LGA devices. One example embodiment include vertical routing of test nest assembly cooling lines in order to minimize the test nest footprint and increase available test sites on a single test card. Another example embodiment includes isolating and adjusting external loads and moments into the heatsink/cold plate, wherein these loads and moments involve controlling the centroid to restore more ideal thermal performance of the heatsink/chip interface. Still another example embodiment includes a nest architecture facilitating easy and low-cost replacement of LGA sockets. Finally, another example embodiment includes efficient condensation control of test nest assembly parts by using dry-air exhaust.

Abstract: Improved methods, systems, and apparatuses are disclosed for testing LGA devices. One example embodiment include vertical routing of test nest assembly cooling lines in order to minimize the test nest footprint and increase available test sites on a single test card. Another example embodiment includes isolating and adjusting external loads and moments into the heatsink/cold plate, wherein these loads and moments involve controlling the centroid to restore more ideal thermal performance of the heatsink/chip interface. Still another example embodiment includes a nest architecture facilitating easy and low-cost replacement of LGA sockets. Finally, another example embodiment includes efficient condensation control of test nest assembly parts by using dry-air exhaust.

Abstract: Improved methods, systems, and apparatuses are disclosed for testing LGA devices. One example embodiment include vertical routing of test nest assembly cooling lines in order to minimize the test nest footprint and increase available test sites on a single test card. Another example embodiment includes isolating and adjusting external loads and moments into the heatsink/cold plate, wherein these loads and moments involve controlling the centroid to restore more ideal thermal performance of the heatsink/chip interface. Still another example embodiment includes a nest architecture facilitating easy and low-cost replacement of LGA sockets. Finally, another example embodiment includes efficient condensation control of test nest assembly parts by using dry-air exhaust.

Abstract: Improved methods, systems, and apparatuses are disclosed for testing LGA devices. One example embodiment include vertical routing of test nest assembly cooling lines in order to minimize the test nest footprint and increase available test sites on a single test card. Another example embodiment includes isolating and adjusting external loads and moments into the heatsink/cold plate, wherein these loads and moments involve controlling the centroid to restore more ideal thermal performance of the heatsink/chip interface. Still another example embodiment includes a nest architecture facilitating easy and low-cost replacement of LGA sockets. Finally, another example embodiment includes efficient condensation control of test nest assembly parts by using dry-air exhaust.

Abstract: Improved methods, systems, and apparatuses are disclosed for testing LGA devices. One example embodiment include vertical routing of test nest assembly cooling lines in order to minimize the test nest footprint and increase available test sites on a single test card. Another example embodiment includes isolating and adjusting external loads and moments into the heatsink/cold plate, wherein these loads and moments involve controlling the centroid to restore more ideal thermal performance of the heatsink/chip interface. Still another example embodiment includes a nest architecture facilitating easy and low-cost replacement of LGA sockets. Finally, another example embodiment includes efficient condensation control of test nest assembly parts by using dry-air exhaust.

Abstract: Improved methods, systems, and apparatuses are disclosed for testing LGA devices. One example embodiment include vertical routing of test nest assembly cooling lines in order to minimize the test nest footprint and increase available test sites on a single test card. Another example embodiment includes isolating and adjusting external loads and moments into the heatsink/cold plate, wherein these loads and moments involve controlling the centroid to restore more ideal thermal performance of the heatsink/chip interface. Still another example embodiment includes a nest architecture facilitating easy and low-cost replacement of LGA sockets. Finally, another example embodiment includes efficient condensation control of test nest assembly parts by using dry-air exhaust.

Abstract: Improved methods, systems, and apparatuses are disclosed for testing LGA devices. One example embodiment include vertical routing of test nest assembly cooling lines in order to minimize the test nest footprint and increase available test sites on a single test card. Another example embodiment includes isolating and adjusting external loads and moments into the heatsink/cold plate, wherein these loads and moments involve controlling the centroid to restore more ideal thermal performance of the heatsink/chip interface. Still another example embodiment includes a nest architecture facilitating easy and low-cost replacement of LGA sockets. Finally, another example embodiment includes efficient condensation control of test nest assembly parts by using dry-air exhaust.

Abstract: A data storage controller providing network attached storage and storage area network functionality comprising a network processor (37) and providing for volume management (preferably one or more of mirroring, RAID5, and copy on write backup), caching of data stored, protocol acceleration of low level protocols (preferably one or more of ATM, Ethernet, Fibre Channel, Infiniband, Serial SCSI, Serial ATA, and any other serializable protocol), and protocol acceleration of higher level protocols (preferably one or more of IP, ICMP, TCP, UDP, RDMA, RPC, security protocols, preferably one or both of IPSEC and SSL, SCSI, and file system services, preferably one or both of NFS and CIFS).

Abstract: LGA connectors are fabricated with buttons or spring contacts preformed to different heights to accommodate the initial topography of a typical module or PCB of a particular product type. This is accomplished during fabrication by measuring topographies of mating surfaces of a first electronic device and of a second electronic device; fabricating interposer contacts to form opposing non-planar sides having respective inverse topographies for contacting the mating surfaces; and sandwiching the interposer between the first and second electronic devices with the opposing sides in contact with respective mating serfaces. For those LGA types made by molding techniques such as the metal-in-polymer type (eg. Tyco Electronics MPI, or Shin Etsu RP) or the Metal-on-Elastomer type (IBM), using molds with the desired topography provides the desired LGA topography.

Abstract: The present invention differs fundamentally from prior art because it provides for machining a substantial number of relatively thin annular tooling plates (10), fitting them together side-by-side in two opposed mold sides, and engraving the tread pattern into the interior face of the assembled plates in two or more complementary mold parts to form a unique tire mold (12). In one form of the disclosed construction two halves are built up and internally engraved to form a two-piece clamshell mold. This building up of annular plates (10) applies also to the construction of segmented molds, wherein there are multiple complementary mold sections which are joined to provide a complete circumferential mold. Thus, the invention applies to both two-piece clamshell molds and segmented molds. The invention encompasses an all engraved mold and all venting (22) in the circumferential direction.

Abstract: System and apparatus which inhibit movement of contaminated particles out of a toilet bowl enclosure are disclosed. Such systems and apparatus include at least one barrier coupled to a seat or lid of a toilet. The barrier or barriers may be configured to inhibit particles from moving out of the toilet bowl enclosure, but may allow air to move into the toilet bowl enclosure. Such a system may also include a valve to allow air to flow into the toilet bowl enclosure. Various configurations, methods and materials of construction are described.

Abstract: Improved methods, systems, and apparatuses are disclosed for testing LGA devices. One example embodiment include vertical routing of test nest assembly cooling lines in order to minimize the test nest footprint and increase available test sites on a single test card. Another example embodiment includes isolating and adjusting external loads and moments into the heatsink/cold plate, wherein these loads and moments involve controlling the centroid to restore more ideal thermal performance of the heatsink/chip interface. Still another example embodiment includes a nest architecture facilitating easy and low-cost replacement of LGA sockets. Finally, another example embodiment includes efficient condensation control of test nest assembly parts by using dry-air exhaust.

Abstract: A method and apparatus for fast initialization of storage devices. An apparatus is described including a redundant array of storage devices that comprises a logical volume of storage. The logical volume further comprises a plurality of stripes. A bit mapped vector provides state initialization information for each of the plurality of stripes in lieu of initializing each of the stripes. A storage controller initializes each of the plurality of stripes by using accesses to the redundant array while concurrently allowing access to the plurality of stripes. Initialization of a stripe can be done by processing a write access. Associated written data to the stripe and updating its corresponding redundancy effectively initializes that stripe. The bit mapped vector is updated to reflect the initialization of that stripe. In addition, while the redundant array is idle, further initialization of un-initialized stripes occurs while concurrently allowing access to the redundant array.

Abstract: In an integrated circuit packaging structure, such as in a SCM, DCM, or MCM, a method and apparatus for increasing heat spreader size and thus thermal performance is disclosed. The packaging structure includes a first substrate; an electronic device operably coupled to a top surface defining the first substrate; a heat spreader having a first surface operably coupled to a top surface defining the electronic device and an opposite second surface in thermal communication with a second substrate; and a frame defining an opening therethrough. The frame is further defined by an inwardly extending ledge configured to allow the heat spreader to extend at least to a peripheral edge defining a perimeter of the first substrate. In an exemplary embodiment, the second substrate includes one of a heat sink, cooling plate, thermal spreader, heat pipe, thermal hat, package lid, or other cooling member.

Abstract: A chip testing system with improved thermal performance. In a preferred embodiment, a nest assembly of a chip testing apparatus includes tooling balls and a fitted frame for improving alignment of a coldplate and a chip surface. In preferred embodiments, the coldplate is of unibody design. Thermal performance is also improved by balancing the forces exerted on the coldplate using an adjustable hose mounting bracket. The bracket allows the forces exerted by the hoses on the coldplate to be adjusted so they balance and cancel other unwanted forces on the cold plate.

Abstract: An innovative chip testing system and method includes controlling temperature and condensation during testing. Coarse temperature is controlled by providing a desired fluid flow rate and fluid temperature to a cold plate. Fine temperature control is provided by a feedback loop which controls the power dissipation of cartridge heaters installed within the cold plate. Condensation control is provided by insulating various components of the system, manipulation of dry compressed air in enclosures to reduce surface dew point temperatures, usage of cartridge heaters in a card backside stiffener plate, and by providing a heatsink assembly which prevents condensation on the insulation.

Abstract: An innovative chip testing system and method includes controlling temperature and condensation during testing. Coarse temperature is controlled by providing a desired fluid flow rate and fluid temperature to a cold plate. Fine temperature control is provided by a feedback loop which controls the power dissipation of cartridge heaters installed within the cold plate. Condensation control is provided by insulating various components of the system, manipulation of dry compressed air in enclosures to reduce surface dew point temperatures, usage of cartridge heaters in a card backside stiffener plate, and by providing a heatsink assembly which prevents condensation on the insulation.

Abstract: A method and apparatus for fast initialization of storage devices. An apparatus is described including a redundant array of storage devices that comprises a logical volume of storage. The logical volume further comprises a plurality of stripes. A bit mapped vector provides state initialization information for each of the plurality of stripes in lieu of initializing each of the stripes. A storage controller initializes each of the plurality of stripes by using accesses to the redundant array while concurrently allowing access to the plurality of stripes. Initialization of a stripe can be done by processing a write access. Associated written data to the stripe and updating its corresponding redundancy effectively initializes that stripe. The bit mapped vector is updated to reflect the initialization of that stripe. In addition, while the redundant array is idle, further initialization of un-initialized stripes occurs while concurrently allowing access to the redundant array.

Abstract: A surface roughness measuring method and apparatus for use in rail corrugations. The apparatus utilizes non-inertial sensors coupled to an on-board, real-time data processing unit. The method includes spacing a plurality of sensors along the surface at predetermined distances apart from one another, relatively moving the sensors and the surface, sampling data from the sensors at fixed sample distance intervals L, storing data from the sensors measured over a region of the surface, converting the data into second finite difference data over the region, converting the second finite difference data into data representative of a space curve of the surface, and displaying the space curve representative data to provide an indication of surface roughness.