Patents by Inventor John G. Meyers

John G. Meyers has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20180331004
    Abstract: A system in package and method of making as system in package are disclosed. The system in package has a substrate (102) with a plurality of passive devices (104) mounted thereon. A molding compound (106) envelopes the plurality of passive devices (104) to define a flat surface (116) substantially parallel to a surface of the substrate (102). A plurality of integrated circuit dies (110) is coupled successively to the flat surface (116).
    Type: Application
    Filed: December 16, 2015
    Publication date: November 15, 2018
    Applicant: Intel Corporation
    Inventors: Mao GUO, John G. MEYERS, Yong SHE, Bin LIU, Lingyan L. TAN
  • Publication number: 20180138133
    Abstract: Techniques and mechanisms to facilitate connection with one or more integrated circuit (IC) dies of a packaged device. In an embodiment, the packaged device includes a first substrate coupled to a first side of a package, and a second substrate coupled to a second side of the package opposite the first side. Circuitry, coupled via the first substrate to one or more IC dies disposed in the package, includes a circuit structure disposed at a cantilever portion of the first substrate. The cantilever portion extends past one or both of an edge of the first side and an edge of the second side. In another embodiment, a hardware interface disposed on the second substrate enables coupling of the packaged device to another device.
    Type: Application
    Filed: January 12, 2018
    Publication date: May 17, 2018
    Inventors: John G. Meyers, Bilal Khalaf, Sireesha Gogineni, Brian J. Long
  • Publication number: 20180096946
    Abstract: Electronic device package technology is disclosed. In one example, an electronic device includes a plurality of dies stacked on a substrate and a reference die on the plurality of dies and having a fiducial marker that indicates a spatial position of the plurality of dies for alignment of an electronics assembly tool. The fiducial marker can comprise a physical alteration of the reference die, such as indicia that is sawed or laser/plasma/chemical etched. A transparent dielectric layer is disposed on the reference die such that the tool can locate the fiducial marker in three dimensional space through the transparent layer. The dielectric layer is etched corresponding to a photomask after a photoresist is disposed on the dielectric layer. The etched dielectric layer comprises at least one redistribution layer electrically coupled to the vertical wire interconnect structure to provide an ultra-thin package. A method of aligning an electronics assembly tool is disclosed.
    Type: Application
    Filed: September 30, 2016
    Publication date: April 5, 2018
    Applicant: Intel Corporation
    Inventors: John G. Meyers, Hyoung Il Kim, Yong She
  • Patent number: 9871007
    Abstract: Techniques and mechanisms to facilitate connection with one or more integrated circuit (IC) dies of a packaged device. In an embodiment, the packaged device includes a first substrate coupled to a first side of a package, and a second substrate coupled to a second side of the package opposite the first side. Circuitry, coupled via the first substrate to one or more IC dies disposed in the package, includes a circuit structure disposed at a cantilever portion of the first substrate. The cantilever portion extends past one or both of an edge of the first side and an edge of the second side. In another embodiment, a hardware interface disposed on the second substrate enables coupling of the packaged device to another device.
    Type: Grant
    Filed: September 25, 2015
    Date of Patent: January 16, 2018
    Assignee: Intel Corporation
    Inventors: John G. Meyers, Bilal Khalaf, Sireesha Gogineni, Brian J. Long
  • Publication number: 20170179987
    Abstract: A mobile device with the band having a first end coupled with the mobile device to affix the mobile device to an object, such as a wrist, and the connector port disposed at a second end of the band and electrically coupled with the mobile device, to provide a charge to the mobile device in response to a plug-in of the connector port into a charging device. Other embodiments may be described and/or claimed.
    Type: Application
    Filed: December 18, 2015
    Publication date: June 22, 2017
    Inventor: John G. Meyers
  • Publication number: 20170092602
    Abstract: Techniques and mechanisms to facilitate connection with one or more integrated circuit (IC) dies of a packaged device. In an embodiment, the packaged device includes a first substrate coupled to a first side of a package, and a second substrate coupled to a second side of the package opposite the first side. Circuitry, coupled via the first substrate to one or more IC dies disposed in the package, includes a circuit structure disposed at a cantilever portion of the first substrate. The cantilever portion extends past one or both of an edge of the first side and an edge of the second side. In another embodiment, a hardware interface disposed on the second substrate enables coupling of the packaged device to another device.
    Type: Application
    Filed: September 25, 2015
    Publication date: March 30, 2017
    Inventors: John G. Meyers, Bilal Khalaf, Sireesha Gogineni, Brian J. Long
  • Publication number: 20090133247
    Abstract: An apparatus for packaging a tape substrate is provided. The apparatus includes a plurality of robotic arms, a plurality of clamping elements attached to the robotic arms, a memory having a program stored therein, and a control module coupled to the memory to execute the program to perform a packaging process. The packaging process includes clamping a plurality of segments of a tape substrate to the clamping elements, encapsulating a first chip to a first side of a tape substrate to form a first capsule in a first segment, and securing a second segment of the tape substrate adjacent the first segment to a second clamping element. The packing process also includes moving the robotic arms relative to one another to stack the second segment over the first capsule. The first clamping element and second clamping element move independently of each other.
    Type: Application
    Filed: January 29, 2009
    Publication date: May 28, 2009
    Inventor: John G. Meyers
  • Patent number: 7533457
    Abstract: A method includes populating a circuit board with components, and encapsulating the circuit board and the components with a material. The method further includes separating the circuit board into a plurality of separate devices.
    Type: Grant
    Filed: June 30, 2005
    Date of Patent: May 19, 2009
    Assignee: Intel Corporation
    Inventors: Richard B Foehringer, Jason E Snodgress, Steven R. Eskildsen, John G. Meyers
  • Patent number: 7503155
    Abstract: A process and apparatus for packaging a tape substrate are provided. A first chip is encapsulated to a first side of a tape substrate to form a first capsule in a first segment of the tape substrate. The first segment of the tape substrate is secured to a first clamping element. A second segment of the tape substrate adjacent the first segment is secured to a second clamping element. At least one of the first segment and the second segment is moved to stack the second segment over the first capsule. The first clamping element and second clamping element can move independently of each other.
    Type: Grant
    Filed: August 26, 2002
    Date of Patent: March 17, 2009
    Inventor: John G. Meyers
  • Patent number: 7498201
    Abstract: Some embodiments of the invention relate to a method of packaging multiple dice into a semiconducting device. The method includes placing a first capsule that includes a first die onto a front side of a tape substrate, placing a second capsule that includes a second die onto the front side of the tape substrate, filling a recess in a surface of the first capsule with an adhesive and folding the tape substrate to attach the first capsule to the second capsule using the adhesive. The method may further include placing a third capsule that includes a third die onto the front side of the tape substrate such that folding the tape substrate includes positioning the third capsule against a back side of the tape substrate opposite to the second capsule.
    Type: Grant
    Filed: June 27, 2005
    Date of Patent: March 3, 2009
    Assignee: Intel Corporation
    Inventor: John G. Meyers
  • Patent number: 6927497
    Abstract: A semiconducting package includes a first capsule, a second capsule and an adhesive within a recess in a surface of the first capsule that secures the first capsule to the second capsule.
    Type: Grant
    Filed: August 22, 2002
    Date of Patent: August 9, 2005
    Assignee: Intel Corporation
    Inventor: John G. Meyers
  • Publication number: 20040209400
    Abstract: A process and apparatus for packaging a tape substrate are provided. A first chip is encapsulated to a first side of a tape substrate to form a first capsule in a first segment of the tape substrate. The first segment of the tape substrate is secured to a first clamping element. A second segment of the tape substrate adjacent the first segment is secured to a second clamping element. At least one of the first segment and the second segment is moved to stack the second segment over the first capsule. The first clamping element and second clamping element can move independently of each other.
    Type: Application
    Filed: August 26, 2002
    Publication date: October 21, 2004
    Inventor: John G. Meyers
  • Publication number: 20040036163
    Abstract: A semiconducting package includes a first capsule, a second capsule and an adhesive within a recess in a surface of the first capsule that secures the first capsule to the second capsule. A method of packaging multiple dice into a semiconducting device includes encapsulating a first die to form a first capsule and encapsulating a second die to form a second capsule, filling a recess in a surface of a first capsule with an adhesive, and securing the first capsule to the second capsule using the adhesive.
    Type: Application
    Filed: August 22, 2002
    Publication date: February 26, 2004
    Applicant: Intel Corporation
    Inventor: John G. Meyers