Abstract: A DMA controller includes at least one peripheral DMA channel for handling DMA transfers on a peripheral access bus; at least one memory DMA stream, including a memory destination channel and a memory source channel, for handling DMA transfers on first and second memory access buses; first and second address computation units for computing updated memory addresses for DMA transfers; first and second memory pipelines for supplying memory addresses to the first and second memory access buses, respectively, and for transferring data on the first and second memory access buses; and a multiplexer configured to supply first and second current memory addresses to selected ones of the first and second memory pipelines in response to a control signal.

Abstract: Applying policy rules to software installed on a device. A group of devices to receive policy rules for the software is identified. The devices belonging to the specified group is identified. A set of policy rules assigned to the devices in the specified group are identified. The policy rules assigned to the devices are aggregated into one or more policy documents. The one or more policy documents are received. The received policy documents are stored in a data store associated with the device. The set of policy rules specified by the received policy documents are applied to the software. A feedback is provided to the policy authority in response to the applying, and the feedback is indicative of whether the set of policy rules is applied to the software.

Abstract: Managing software states using policy rules in a policy document in a distributed network. A policy document is generated and the policy document includes a set of policy rules defining one or more desired configurations of one or more pieces of software on the target devices. Target information is associated with the policy document, and the target information corresponds to a selected set of the target devices and includes information relating to characteristics of the software of the selected set of target devices. The set of policy rules included in the policy document is compared with other policy rules for the software. The policy document is modified as a function of the comparison and conflict resolution preferences. The modified policy document is provided for deployment to the selected set of the target devices.

Abstract: A water curtain is provided which includes a drape assembly having a drape hood, material drape, float overflow shut-off, collection return, a drainage line solenoid which preferably is electric, a drainage line, a filter, drape solenoid which preferably is electric, a drape feed line, a pump, a pump power line, an on/off switch to a power source which preferably is a ground fault circuit interrupter (GFCI) power line for obvious safety concerns, a feed line, and a shutoff valve. The water supply may be electrically controlled by solenoid valves and has a float overflow shutoff control in some embodiments.

Abstract: A DMA controller includes at least one peripheral DMA channel for handling DMA transfers on a peripheral access bus; at least one memory DMA stream, including a memory destination channel and a memory source channel, for handling DMA transfers on first and second memory access buses; first and second address computation units for computing updated memory addresses for DMA transfers; and first and second memory pipelines for supplying memory addresses to the first and second memory access buses, respectively, and for transferring data on the first and second memory access buses. Channel control logic controls transfer of data through the DMA channels in response to parameters contained in at least one DMA descriptor having a programmable format.

Abstract: Accommodating a processor to process a number of different data formats includes loading a data word in a first format from a first storage device; reordering, before it reaches the arithmetic unit, the first format of the data word to a second format compatible with the native order of the arithmetic unit; and vector processing the data word in the arithmetic unit.

Abstract: A DMA controller includes at least one peripheral DMA channel for handling DMA transfers on a peripheral access bus; at least one memory DMA stream, including a memory destination channel and a memory source channel, for handling DMA transfers on first and second memory access buses; first and second address computation units for computing updated memory addresses for DMA transfers; and first and second memory pipelines for supplying memory addresses to the first and second memory access buses, respectively, and for transferring data on the first and second memory access buses. The DMA controller further includes a prioritizer configured to map DMA requests from different DMA requesters to the peripheral channels in response to programmable mapping information.

Abstract: Consistency errors may arise during replication of diverse data storage objects from servers in a data network. For preventing consistency errors, a server is programmed for responding to a request for a report of whether or not the server can replicate the dataset without causing a consistency error. Such a report is useful for replicating a consistency group of objects from more than one server. Preparation for replication can be begun at each of the servers, and if any of the servers fail to report that replication can be done without causing a consistency error, the preparation can be aborted so that write access by applications will not be disrupted while the potential problem is diagnosed and eliminated.

Abstract: A method and apparatus for an analog-to-digital video signal converter. The converter is controlled by a clock with controllable frequency and phase for sampling an analog signal. A circuit corrects the clock frequency using a period of a columnar frame differences as a function of columnar location. The sampling clock frequency is changed by an amount dependent on the period of the columnar differences. A second measure of the difference between successive frames is computed for a sequence of clock phases. The frequency of the clock is verified using a characteristic of the second measure. The characteristic can be the ratio of the maximum to the minimum of the second measure over selected clock phases. Other characteristics can be used such as a difference of a maximum and a minimum measure.

Abstract: A method and apparatus for an analog-to-digital video signal converter. The converter is controlled by a clock with controllable frequency and phase for sampling an analog signal. A measure of the difference between successive frames of the image is computed for a sequence of clock phases. The measure can be a count taken over pixels of the magnitude of the difference between a pixel in one frame and the corresponding pixel in a following frame exceeding a threshold value. The frequency of the clock is verified using a characteristic of the frame difference. The characteristic can be the ratio of the maximum measure to the minimum measure over the selected clock phases. Other characteristics can be used such as a difference of a maximum and a minimum measure.

Abstract: An evaporative cooler comprises a housing having an upper surface and at least one vertical wall defining a chamber. The upper surface can include at least one opening in communication with the chamber. The evaporative cooler can also comprise at least one drain slit assembly for distributing a fluid and further comprise at least one screen. The screen can define a portion of the vertical wall. The screen can have an interior surface and an exterior surface relative to the chamber. In addition, the screen can be disposed relative to the drain slit assembly such that the drain slit assembly distributes the fluid over the screen. The screen can be configured such that the fluid forms a surface fluid layer over the surfaces of the screen. The evaporative cooler can further comprise an air conveyor disposed within the housing for drawing air through the opening and into the chamber such that the air is conveyed through the screen and the fluid layer.

Abstract: A water curtain is provided which includes a drape assembly having a drape hood, material drape, float overflow shut-off, collection return, a drainage line solenoid which preferably is electric, a drainage line, a filter, drape solenoid which preferably is electric, a drape feed line, a pump, a pump power line, an on/off switch to a power source which preferably is a ground fault circuit interrupter (GFCI) power line for obvious safety concerns, a feed line, and a shutoff valve. The water supply may be electrically controlled by solenoid valves and has a float overflow shutoff control in some embodiments.

Abstract: A molding apparatus for making a cutting tool includes a cylindrically shaped elastic bag having an internal cavity for receiving a granulated material, such as a mixture of cobalt and carbide. The profile of the interior cavity substantially corresponds to the shape of the cutting tool being produced. The ends of the bag are open to provide access to the interior cavity of the bag. A substantially rigid tubular-shaped pressure sleeve encloses an outer circumference of the elastic bag. A pair of end caps operate to seal the open ends of the elastic bag and are engageable with the ends of the pressure sleeve. The granulated material can be formed into a solid coherent structure by placing the assembled mold containing the granulated material into a hydrostatic press for applying a substantially uniform compressive load to the outer periphery of the elastic bag.

Abstract: For disaster recovery of a file server at an active site, the files that define the user environment of the file server are replicated to a virtual server at a disaster recovery site. To switch over user access from the active site to the disaster recovery site, the disaster recovery system determines whether there are sufficient network interfaces and file system mounts at the disaster recovery site. If so, the required resources are reserved, and user access is switched over. If not, an operator is given a list of missing resources or discrepancies, and a choice of termination or forced failover. Interruptions during the failover can be avoided by maintaining a copy of user mappings and a copy of session information at the disaster recovery site, and keeping alive client-server connections and re-directing client requests from the active site to the disaster recovery site.

Abstract: A DMA controller includes at least one peripheral DMA channel for handling DMA transfers on a peripheral access bus; at least one memory DMA stream, including a memory destination channel and a memory source channel, for handling DMA transfers on first and second memory access buses; first and second address computation units for computing updated memory addresses for DMA transfers; and first and second memory pipelines for supplying memory addresses to the first and second memory access buses, respectively, and for transferring data on the first and second memory access buses. Channel control logic controls transfer of data through the DMA channels in response to parameters contained in at least one DMA descriptor having a programmable format.

Abstract: A DMA controller includes at least one peripheral DMA channel for handling DMA transfers on a peripheral access bus; at least one memory DMA stream, including a memory destination channel and a memory source channel, for handling DMA transfers on first and second memory access buses; first and second address computation units for computing updated memory addresses for DMA transfers; first and second memory pipelines for supplying memory addresses to the first and second memory access buses, respectively, and for transferring data on the first and second memory access buses; and a multiplexer configured to supply first and second current memory addresses to selected ones of the first and second memory pipelines in response to a control signal.

Abstract: A DMA controller includes at least one peripheral DMA channel for handling DMA transfers on a peripheral access bus; at least one memory DMA stream, including a memory destination channel and a memory source channel, for handling DMA transfers on first and second memory access buses; first and second address computation units for computing updated memory addresses for DMA transfers; and first and second memory pipelines for supplying memory addresses to the first and second memory access buses, respectively, and for transferring data on the first and second memory access buses. The DMA controller further includes a prioritizer configured to map DMA requests from different DMA requesters to the peripheral channels in response to programmable mapping information.

Abstract: Snares for snare drums which decouple tensioning from the dimension and shape of snare segments which contact the drum head. According to various embodiments, the snares include one or more tensioning members and a plurality of head contact members. The tensioning members may be connected to conventional snare strainer plates or end pieces. Some or all of the tensioning members support or carry one or more head contact members. The tensioning members may be wire, polymeric material or other desired material. The head contact members may be wire coils or helixes, formed of beads or other periodic or non-periodic shapes or structures or structured and configured as otherwise desired to be carried on tension members and cooperate effectively with the drum head for proper acoustical effect. The snares are adapted to be used with batter and bottom heads.

Abstract: A solderless method for assembling a semiconductor electronic flip-chip device to an electrical interconnecting substrate including the steps of forming a plurality of raised electrical contacts and plurality of contact pads. The pads correspond in number and physical location with the electrical contacts. The pads and contact mate when brought together. A quantity of plastic material is interposed between the electrical device and substrate. The plastic material is heated so that it softens and flows. The electronic device and substrate are urged together. The urging step displaces the molten plastic material from between the contacts and pads. The contacts and pads are jointed directly without any adhesive, solder or conducive filler therebetween to electrically interconnect the electronic device and substrate. The plastic material is allowed to cool whereby the electronic device and substrate are adhesively bonded together and electrically interconnected.

Abstract: A substrate and electrical connector assembly including a unitary panel structure with metal conductors having a rigid main body portion, a rigid marginal edge portion, and a thin flexible section extending between the rigid main body portion and the rigid marginal edge portion. The assembly also includes an at least one conductive lead deposited on a surface of the plastic panel structure which extends from the rigid main body portion across the flexible section to the rigid marginal edge portion. Further included is an at least one conductive terminal affixed to the rigid marginal edge portion which is in electrical connection with the at least one conductive lead. The at least one conductive terminal is adapted to receive a mating connector. The flexible section enables the rigid marginal edge portion to move relative to the rigid main body portion.